Fabrication process for dicing integrated circuit (IC) dies

TW202635075APending Publication Date: 2026-08-16TEXAS INSTRUMENTS INC
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Patent Information

Application Number
TW114140110
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-10-31
Filing Date
2025-10-17
Publication Date
2026-08-16

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Abstract

One example includes a method for dicing a semiconductor wafer that includes a plurality of integrated circuit (IC) dies. The method includes providing a plasma-etch through a portion of thickness of a substrate of the semiconductor wafer between fabricated circuits of the semiconductor wafer to provide an etched semiconductor wafer. The method also includes providing a pliable material on the fabricated circuits. The method also includes back-grinding the etched semiconductor wafer to separate the IC dies to provide separated IC dies. Each of the separated IC dies can include a respective one of the fabricated circuits. The method further includes providing the separated IC dies on a die-attach film (DAF), and removing the pliable material.
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