Semiconductor device and method of forming thereof

Abstract

A semiconductor device includes an electrostatic discharge (ESD) protection device that includes multiple stacked middle voltage and / or low voltage ESD protection circuits including transistors with thinner gate dielectric layers and correspondingly lower threshold voltages than gate dielectric layers and threshold voltages of higher voltage ESD protection circuits. Due to their thinner gate dielectric layers and correspondingly lower threshold voltages, transistors in the middle and / or low voltage ESD protection circuits, including transistors with large active region width values, may fully turn on in response to short charged device model (CDM) pulses. Combined bias voltages of multiple interconnected middle voltage and / or low voltage circuits in a stacked arrangement permits use of the stacked arrangement for high voltage applications. As a result, an ESD protection device that includes multiple stacked middle voltage and / or low voltage circuits may fully dissipate CDM current, leading to improved performance and adequate responses to ESD events.

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