Semiconductor packages with plasma-etched scallops
TW202635194APending Publication Date: 2026-08-16TEXAS INSTRUMENTS INC
View PDF 0 Cites 0 Cited by
Patent Information
- Application Number
- TW114140111
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-10-31
- Filing Date
- 2025-10-17
- Publication Date
- 2026-08-16
Smart Images

Figure 00000000_0000_ABST
Abstract
In examples, a semiconductor package includes a substrate including a first opening; a first semiconductor die coupled to the substrate and including a microelectromechanical systems (MEMS) membrane, the first semiconductor die including a scalloped outer surface having multiple concavities; a second semiconductor die coupled to the substrate and configured to control the first semiconductor die; bond wires coupling the first and second semiconductor dies to the substrate; and a protective enclosure covering the substrate, the first and second semiconductor dies, and the bond wires.
Need to check novelty before this filing date? Find Prior Art