A method for preparing a memory array

Abstract

comprising a plurality of capacitors (SC) and a plurality of access transistor (AT) respectively associated to each other’s. The method comprises depositing a mold oxide layer (MOL) on a receiving substrate (S), etching an exposed surface (MOL1) of the mold oxide layer (MOL) to form a plurality of holes extending through the mold oxide layer and forming bottom electrodes (BE) of the plurality of capacitors (SC) within the plurality of holes (H). The method further comprises transferring a semiconductor layer (SL) on contact portions (CP) of the bottom electrodes (BE) and patterning the semiconductor layer (SL) to define the plurality of access transistors (AT), wherein channels of the access transistors (AT) are in electrical contact with the contact portions (CP) of the bottom electrodes (BE).

Images