Semiconductor memory devices and their manufacturing methods

Abstract

A semiconductor memory device capable of suppressing fragmentation of a memory cell array and a method for manufacturing the same are provided. The semiconductor memory device according to this embodiment comprises: a first laminate, wherein a plurality of first conductive layers and a plurality of first insulating layers are alternately laminated one layer at a time in a first direction; a pillar, comprising a semiconductor layer extending in the first direction within the first laminate; a first material layer disposed within a slit, the slit penetrating the first laminate in the first direction and extending in a second direction intersecting the first direction; a second conductive layer disposed at one end of the slit; and a second material layer disposed within the first material layer from one end of the slit, wherein the sidewalls of the first and second material layers have conical surfaces inclined in opposite directions at a first cross-section orthogonal to the second direction.

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