Measuring structure
Patent Information
- Application Number
- TW114107082
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-02-26
- Publication Date
- 2026-09-01
- Estimated Expiration
- 2045-02-25
Smart Images

Figure TWG2TA001074005_001 
Figure TWG2TA001074005_002 
Figure TWG2TA001074005_003
Abstract
Description
Technical Field
[0001] This invention relates to a measurement structure, and more particularly to a measurement structure that can be used to measure resistance values. Prior Technology
[0002] The four-wire measurement method, also known as the Kelvin measurement method, is used to accurately measure resistance values. However, current four-wire measurement methods cannot effectively determine whether there are abnormalities in the semiconductor manufacturing process. Summary of the Invention
[0003] This invention provides a measurement structure that can help determine whether a semiconductor manufacturing process is abnormal.
[0004] This invention proposes a measurement structure, including a first conductive layer, a second conductive layer, a first contact window, a third conductive layer, a fourth conductive layer, and a second contact window. The second conductive layer is located on the first conductive layer. The first contact window is located between the first and second conductive layers. The third conductive layer is located on the sidewall of the first contact window. The first contact window is located on both the first and third conductive layers. The first and third conductive layers are separated from each other. The fourth conductive layer is located on the third conductive layer. The second contact window is located between the third and fourth conductive layers.
[0005] According to an embodiment of the present invention, in the above-described measurement structure, the first contact window can directly contact the top surface of the first conductive layer, the bottom surface of the second conductive layer, and the top surface of the third conductive layer.
[0006] According to one embodiment of the present invention, in the above-described measurement structure, the third conductive layer may be located directly above the first conductive layer.
[0007] According to one embodiment of the present invention, the above-described measurement structure may further include a dielectric layer. The dielectric layer is located between the third conductive layer and the first conductive layer.
[0008] According to one embodiment of the present invention, the above-described measurement structure may further include a gap wall. The gap wall is located between the sidewall of the first contact window and the sidewall of the third conductive layer.
[0009] According to an embodiment of the present invention, in the above-described measurement structure, the third conductive layer, the dielectric layer, and the spacer wall can be integrated with the transistor fabrication process.
[0010] According to one embodiment of the present invention, the above-described measurement structure further includes an isolation structure. The isolation structure is located next to the first conductive layer.
[0011] According to one embodiment of the present invention, in the above-described measurement structure, the dielectric layer may be located between the third conductive layer and the isolation structure.
[0012] According to an embodiment of the present invention, in the above-described measurement structure, the sidewall of the third conductive layer can directly contact the sidewall of the first contact window.
[0013] According to an embodiment of the present invention, in the above-described measurement structure, the first conductive layer, the dielectric layer, and the third conductive layer can be integrated with the capacitor manufacturing process.
[0014] Based on the above, in the measurement structure proposed in this invention, the second conductive layer is located on the first conductive layer. The first contact window is located between the first conductive layer and the second conductive layer. The third conductive layer is located on the sidewall of the first contact window. The first contact window is located on the first conductive layer and the third conductive layer. The first conductive layer and the third conductive layer are separated from each other. The fourth conductive layer is located on the third conductive layer. The second contact window is located between the third conductive layer and the fourth conductive layer. When measuring resistance using the 4-wire measurement method, the first conductive layer, the first contact window, and the second conductive layer can form a current conductive path. In some embodiments, when measuring resistance using the 4-wire measurement method, the first conductive layer, the first contact window, the third conductive layer, the second contact window, and the fourth conductive layer can form a voltage measurement conductive path. In other embodiments, when measuring resistance using the 4-wire measurement method, the second conductive layer, the first contact window, the third conductive layer, the second contact window, and the fourth conductive layer can form a voltage measurement conductive path. In this way, the measurement structure proposed in this invention can be used to measure the resistance value of the overlapping area of the conductive path of current and the conductive path of voltage measurement, and can help determine whether the semiconductor manufacturing process is abnormal.
[0015] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings for detailed explanation. Simple Explanation of the Diagram
[0016] Figure 1 is a perspective view of a measurement structure according to some embodiments of the present invention. Figure 2 is a perspective view of a measurement structure according to some other embodiments of the present invention. Figure 3 is a perspective view of a measurement structure according to some other embodiments of the present invention. Figure 4 is a perspective view of a measurement structure according to some other embodiments of the present invention. Implementation
[0017] The following description provides detailed examples and accompanying drawings, but these examples are not intended to limit the scope of the invention. For ease of understanding, the same components will be designated with the same symbols in the following description. Furthermore, the drawings are for illustrative purposes only and are not drawn to their original dimensions. In fact, the dimensions of various features may be arbitrarily increased or decreased for clarity of explanation.
[0018] Figure 1 is a perspective view of a measurement structure according to some embodiments of the present invention.
[0019] Referring to Figure 1, the measurement structure 10 includes a conductive layer 100, a conductive layer 102, a contact window 104, a conductive layer 106, a conductive layer 108, and a contact window 110. The conductive layer 100 may be a single-layer structure or a multi-layer structure. In some embodiments, the conductive layer 100 may include a first portion 100A and a second portion 100B (branch structure). The first portion 100A and the second portion 100B may have an overlapping region OL1. In some embodiments, the first portion 100A and the second portion 100B may be integrally formed. In some embodiments, the material of the conductive layer 100 is, for example, a metal silicide, such as cobalt silicide (CoSi), a doped semiconductor material, or a combination of a semiconductor material and a metal silicide, but the present invention is not limited thereto.
[0020] Conductive layer 102 is located on conductive layer 100. Conductive layer 102 may be a single-layer structure or a multi-layer structure. In some embodiments, conductive layer 102 may be a composite layer of barrier layer / metal layer / barrier layer. In some embodiments, the material of conductive layer 102 is, for example, aluminum, titanium, titanium nitride, copper, or a combination thereof.
[0021] Contact window 104 is located between conductive layer 100 and conductive layer 102. Contact window 104 may be a single-layer structure or a multi-layer structure. In some embodiments, contact window 104 may be a composite layer of barrier layer / metal layer. In some embodiments, the material of contact window 104 is, for example, tungsten, titanium, titanium nitride, tantalum (Ta), tantalum nitride (TaN), or a combination thereof.
[0022] In some embodiments, the contact window 104 may be connected to the overlapping region OL1. A first portion 100A located outside the overlapping region OL1 and a second portion 100B located outside the overlapping region OL1 may be located on different sides of the contact window 104. Furthermore, the shape of the conductive layer 100 may vary depending on the arrangement of the first portion 100A and the second portion 100B. In this embodiment, as shown in FIG1, the shape of the conductive layer 100 is, for example, L-shaped, but the invention is not limited thereto. In other embodiments, the shape of the conductive layer 100 is, for example, linear (not shown).
[0023] The conductive layer 106 is located on the sidewall S1 of the contact window 104. The contact window 104 is located on the conductive layers 100 and 106. The conductive layers 100 and 106 are separated from each other. In some embodiments, the material of the conductive layer 106 is, for example, doped polycrystalline silicon or a metal gate, but the present invention is not limited thereto.
[0024] Conductive layer 108 is located on conductive layer 106. Conductive layer 108 may be a single-layer structure or a multi-layer structure. In some embodiments, conductive layer 108 may be a composite layer of barrier layer / metal layer / barrier layer. In some embodiments, the material of conductive layer 108 is, for example, aluminum, titanium, titanium nitride, or a combination thereof.
[0025] The contact window 110 is located between the conductive layer 106 and the conductive layer 108. The contact window 110 can be a single-layer structure or a multi-layer structure. In some embodiments, the contact window 110 can be a composite layer of a barrier layer / metal layer. In some embodiments, the material of the contact window 110 is, for example, tungsten, titanium, titanium nitride, or a combination thereof.
[0026] In some embodiments, the contact window 104 can directly contact the top surface S2 of the conductive layer 100, the bottom surface S3 of the conductive layer 102, and the top surface S4 of the conductive layer 106. In some embodiments, the contact window 110 can directly contact the top surface S4 of the conductive layer 106 and the bottom surface S5 of the conductive layer 108.
[0027] In some embodiments, the measurement structure 10 may further include a spacer wall 112. The spacer wall 112 is located on the sidewalls of both sides of the conductive layer 106, for example, between the sidewall S1 of the contact window 104 and the sidewall S6 of the conductive layer 106. The spacer wall 112 may be a single-layer structure or a multi-layer structure. In some embodiments, the material of the spacer wall 112 is, for example, silicon oxide, silicon nitride, or a combination thereof.
[0028] In some embodiments, a portion of the conductive layer 106 may be located directly above the conductive layer 100. In some embodiments, the measurement structure 10 may further include a dielectric layer 114. The dielectric layer 114 is located between the conductive layer 106 and the conductive layer 100, thereby allowing the conductive layer 100 and the conductive layer 106 to be separated from each other. In some embodiments, the material of the dielectric layer 114 is, for example, silicon oxide. In this embodiment, the fabrication processes of the conductive layer 106, the dielectric layer 114, and the spacer 112 may be integrated with the transistor fabrication process.
[0029] In some embodiments, the measurement structure 10 further includes an isolation structure 116. The isolation structure 116 is located adjacent to the conductive layer 100. In some embodiments, the dielectric layer 114 may be located between the conductive layer 106 and the isolation structure 116. In some embodiments, the isolation structure 116 may be a shallow trench isolation structure. In some embodiments, the material of the isolation structure 116 is, for example, silicon oxide.
[0030] Furthermore, although not shown in the figure, the measurement structure 10 may include other necessary components (such as a substrate and other dielectric layers), the description of which is omitted here.
[0031] Based on the above embodiments, in the measurement structure 10, the conductive layer 102 is located on the conductive layer 100. The contact window 104 is located between the conductive layer 100 and the conductive layer 102. The conductive layer 106 is located on the sidewall S1 of the contact window 104. The contact window 104 is located on the conductive layer 100 and the conductive layer 106. The conductive layer 100 and the conductive layer 106 are separated from each other. The conductive layer 108 is located on the conductive layer 106. The contact window 110 is located between the conductive layer 106 and the conductive layer 108. In this embodiment, when measuring the resistance value using the four-wire measurement method, the conductive layer 100 (e.g., the first part 100A of the conductive layer 100), the contact window 104, and the conductive layer 102 can form a current conductive path, and the conductive layer 100 (e.g., the second part 100B of the conductive layer 100), the contact window 104, the conductive layer 106, the contact window 110, and the conductive layer 108 can form a voltage measurement conductive path. Furthermore, when measuring resistance using the four-wire method, a fixed current can be provided along the current conductive path, flowing from the first portion 100A of the conductive layer 100 to the conductive layer 102, while measuring the voltage difference between the second portion 100B of the conductive layer 100 and the conductive layer 108 located on the voltage measurement conductive path. In this way, the resistance value of the overlapping region between the current conductive path and the voltage measurement conductive path can be obtained using Ohm's law, which can help determine whether there are abnormalities in the semiconductor manufacturing process.
[0032] Figure 2 is a perspective view of a measurement structure according to some other embodiments of the present invention.
[0033] Please refer to Figures 1 and 2. The differences between the measurement structure 20 in Figure 2 and the measurement structure 10 in Figure 1 are as follows. In the measurement structure 20, the conductive layer 100 may not include the branch structure shown in Figure 1 (e.g., the second portion 100B), and the conductive layer 102 may include a first portion 102A and a second portion 102B (branch structure). The first portion 102A and the second portion 102B may have an overlapping region OL2. In some embodiments, the first portion 102A and the second portion 102B may be integrally formed.
[0034] In some embodiments, the contact window 104 may be connected to the overlapping region OL2. A first portion 102A located outside the overlapping region OL2 and a second portion 102B located outside the overlapping region OL2 may be located on different sides of the contact window 104. Furthermore, the shape of the conductive layer 102 may vary depending on the arrangement of the first portion 102A and the second portion 102B. In this embodiment, as shown in FIG2, the shape of the conductive layer 102 is, for example, L-shaped, but the invention is not limited thereto. In other embodiments, the shape of the conductive layer 102 is, for example, linear (not shown).
[0035] Furthermore, in Figures 1 and 2, identical or similar components are represented by the same symbols, and their descriptions are omitted.
[0036] Based on the above embodiments, in the measurement structure 20, the conductive layer 102 is located on the conductive layer 100. The contact window 104 is located between the conductive layer 100 and the conductive layer 102. The conductive layer 106 is located on the sidewall S1 of the contact window 104. The contact window 104 is located on the conductive layer 100 and the conductive layer 106. The conductive layer 100 and the conductive layer 106 are separated from each other. The conductive layer 108 is located on the conductive layer 106. The contact window 110 is located between the conductive layer 106 and the conductive layer 108. In the measurement structure 20, when measuring resistance using the four-wire measurement method, the conductive layer 100, contact window 104, and conductive layer 102 (e.g., the first portion 102A of conductive layer 102) form a current conduction path, and the conductive layer 102 (e.g., the second portion 102B of conductive layer 102), contact window 104, conductive layer 106, contact window 110, and conductive layer 108 form a voltage measurement conduction path. Furthermore, when measuring resistance using the four-wire measurement method, a fixed current can be provided from conductive layer 100 to the first portion 102A of conductive layer 102 along the aforementioned current conduction path, and the voltage difference between the second portion 102B of conductive layer 102 and conductive layer 108 located on the voltage measurement conduction path is measured. In this way, the resistance value of the overlapping area of the current conduction path and the voltage measurement conduction path can be obtained using Ohm's law, and this can help determine whether there are abnormalities in the semiconductor manufacturing process.
[0037] Figure 3 is a perspective view of a measurement structure according to some other embodiments of the present invention.
[0038] Please refer to Figures 1 and 3. The differences between the measurement structure 30 in Figure 3 and the measurement structure 10 in Figure 1 are as follows: In measurement structure 30, the conductive layer 100 may not include the spacer wall 112 and the isolation structure 116 shown in Figure 1. In measurement structure 30, the entire conductive layer 106 may be located directly above the conductive layer 100, and the dielectric layer 114 may be located between the conductive layer 106 and the conductive layer 100. In measurement structure 30, the sidewall S6 of the conductive layer 106 may directly contact the sidewall S1 of the contact window 104. In measurement structure 30, the conductive layer 100 may be a composite layer of barrier layer / metal layer / barrier layer. In measurement structure 30, the material of the conductive layer 100 may be, for example, aluminum, titanium, titanium nitride, or a combination thereof. In measurement structure 30, the material of the conductive layer 106 may be, for example, titanium, titanium nitride, tantalum (Ta), tantalum nitride (TaN), or a combination thereof. In the measurement structure 30, the dielectric layer 114 is made of materials such as silicon oxide, silicon nitride, or high-k materials. In the measurement structure 30, the fabrication processes of the conductive layers 100 and 106 and the dielectric layer 114 can be integrated with the capacitor fabrication process.
[0039] Furthermore, in Figures 1 and 3, identical or similar components are represented by the same symbols, and their descriptions are omitted.
[0040] Figure 4 is a perspective view of a measurement structure according to some other embodiments of the present invention.
[0041] Please refer to Figures 2 and 4. The differences between the measurement structure 40 in Figure 4 and the measurement structure 20 in Figure 2 are as follows: In measurement structure 40, the conductive layer 100 may not include the spacer wall 112 and the isolation structure 116 shown in Figure 2. In measurement structure 40, the entire conductive layer 106 may be located directly above the conductive layer 100, and the dielectric layer 114 may be located between the conductive layer 106 and the conductive layer 100. In measurement structure 40, the sidewall S6 of the conductive layer 106 may directly contact the sidewall S1 of the contact window 104. In measurement structure 40, the conductive layer 100 may be a composite layer of barrier layer / metal layer / barrier layer. In measurement structure 40, the material of the conductive layer 100 may be, for example, aluminum, titanium, titanium nitride, or a combination thereof. In measurement structure 40, the material of the conductive layer 106 may be, for example, titanium, titanium nitride, tantalum (Ta), tantalum nitride (TaN), or a combination thereof. In the measurement structure 40, the dielectric layer 114 is made of materials such as silicon oxide, silicon nitride, or high-k materials. In the measurement structure 40, the fabrication processes of the conductive layers 100 and 106 and the dielectric layer 114 can be integrated with the capacitor fabrication process.
[0042] Furthermore, in Figures 2 and 4, identical or similar components are represented by the same symbols, and their descriptions are omitted.
[0043] In summary, the measurement structure of the above embodiments includes a first conductive layer, a second conductive layer, a first contact window, a third conductive layer, a fourth conductive layer, and a second contact window. The second conductive layer is located on the first conductive layer. The first contact window is located between the first conductive layer and the second conductive layer. The third conductive layer is located on the sidewall of the first contact window. The first contact window is located on the first conductive layer and the third conductive layer. The first conductive layer and the third conductive layer are separated from each other. The fourth conductive layer is located on the third conductive layer. The second contact window is located between the third conductive layer and the fourth conductive layer. When measuring resistance using the 4-wire measurement method, the first conductive layer, the first contact window, and the second conductive layer can form a current conductive path. In some embodiments, when measuring resistance using the 4-wire measurement method, the first conductive layer, the first contact window, the third conductive layer, the second contact window, and the fourth conductive layer can form a voltage measurement conductive path. In other embodiments, when measuring resistance using the 4-wire measurement method, the second conductive layer, the first contact window, the third conductive layer, the second contact window, and the fourth conductive layer can form a voltage measurement conductive path. In this way, the measurement structure of the above embodiment can be used to measure the resistance value of the overlapping area of the conductive path of current and the conductive path of voltage measurement, and can help determine whether the semiconductor process is abnormal.
[0044] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.
[0045] 10, 20, 30, 40: Measurement structures 100, 102, 106, 108: Conductive layers 100A, 102A: Part 1 100B, 102B: Part Two 104, 110: Contact window 112: Interstitial wall 114: Dielectric layer 116: Isolation Structure OL1, OL2: Overlapping regions S1, S6: Sidewalls S2, S4: Top surface S3, S5: Bottom surface
Claims
1. A measurement structure, comprising: First conductive layer; The second conductive layer is located on the first conductive layer; The first contact window is located between the first conductive layer and the second conductive layer; A third conductive layer is located on the sidewall of the first contact window, wherein the first contact window is located on the first conductive layer and the third conductive layer, and the first conductive layer and the third conductive layer are separated from each other; a fourth conductive layer is located on the third conductive layer; and a second contact window is located between the third conductive layer and the fourth conductive layer.
2. The measurement structure as described in claim 1, wherein the first contact window directly contacts the top surface of the first conductive layer, the bottom surface of the second conductive layer, and the top surface of the third conductive layer.
3. The measurement structure as described in claim 1, wherein the third conductive layer is located directly above the first conductive layer.
4. The measurement structure as described in claim 3, further comprising: A dielectric layer is located between the third conductive layer and the first conductive layer.
5. The measurement structure as described in claim 4, further comprising: The gap wall is located between the sidewall of the first contact window and the sidewall of the third conductive layer.
6. The measurement structure as described in claim 5, wherein the third conductive layer, the dielectric layer, and the spacer wall system are fabricated in an integrated manner with the transistor process.
7. The measurement structure as described in claim 4, further comprising: An isolation structure is located next to the first conductive layer.
8. The measurement structure as claimed in claim 7, wherein the dielectric layer is further located between the third conductive layer and the isolation structure.
9. The measurement structure as described in claim 4, wherein the sidewall of the third conductive layer directly contacts the sidewall of the first contact window.
10. The measurement structure as claimed in claim 9, wherein the first conductive layer, the dielectric layer, and the third conductive layer are fabricated in an integrated manner with a capacitor manufacturing process.