Semiconductor package and method of manufacturing semiconductor package
TW202636980AInactive Publication Date: 2026-09-01TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information
- Application Number
- TW114113934
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-02-19
- Filing Date
- 2025-04-14
- Publication Date
- 2026-09-01
- Estimated Expiration
- Not applicable · inactive patent
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Abstract
A semiconductor package includes a first die, a plurality of conductive bumps and a second die. The first die includes a first substrate, a plurality of first through vias extending through the first substrate, a plurality of copper pads over a backside of the first substrate, wherein each of the plurality of copper pads is aluminum free, and a plurality of first connectors over a front side of the first substrate. The plurality of conductive bumps are disposed on the plurality of copper pads respectively. The second die is bonded over the first die and includes a second substrate, and a plurality of second connectors over a front side of the second substrate and directly bonded to the plurality of first connectors respectively.
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