Display panel
Patent Information
- Application Number
- TW114124680
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-03-13
- Filing Date
- 2025-06-30
- Publication Date
- 2026-09-16
- Estimated Expiration
- 2045-06-29
Smart Images

Figure TWG2TA001076183_001 
Figure TWG2TA001076183_002 
Figure TWG2TA001076183_003
Abstract
Claims
1. A display panel, comprising: A color filter substrate; A pixel array substrate is disposed opposite to the color filter substrate. The pixel array substrate includes a reflective layer and a planarization layer. The planarization layer has a via. The reflective layer is located on one side of the planarization layer and covers the via. A spacer is disposed between the color filter substrate and the pixel array substrate. One end of the spacer is located on the color filter substrate, and the other end of the spacer is disposed opposite to the via. The spacer includes a light-absorbing layer.
2. The display panel as described in claim 1, wherein the light-absorbing layer is located at one end of the spacer.
3. The display panel as claimed in claim 1, wherein the position of the light-absorbing layer overlaps with the reflective layer located within the via.
4. The display panel as claimed in claim 1, wherein the via has an inner diameter, and the spacer has a radial dimension in the via that is less than or equal to the inner diameter.
5. The display panel as claimed in claim 1, wherein the spacer is inserted into or abuts the through hole.
6. The display panel as claimed in claim 1, wherein the pixel array substrate includes a substrate and a plurality of scan lines and a plurality of data lines, the scan lines intersecting the data lines, and the pixel structure is disposed on the substrate and electrically connected to one of the data lines and one of the scan lines.
7. The display panel as claimed in claim 1, wherein the pixel structure includes a capacitor electrode and a common electrode, the capacitor electrode being electrically connected to the pixel electrode, the common electrode overlapping the pixel electrode and the capacitor electrode and located between the capacitor electrode and the pixel electrode, wherein the capacitor electrode and the common electrode have a first distance in the stacking direction, the common electrode and the pixel electrode have a second distance in the stacking direction, and the first distance is greater than the second distance.
8. The display panel as claimed in claim 7, wherein the pixel structure further includes a coating layer, a first passivation layer and a second passivation layer, the coating layer being disposed between the common electrode and the capacitor electrode, the first passivation layer being disposed between the capacitor electrode and the coating layer, and the second passivation layer being disposed between the common electrode and the pixel electrode.
9. The display panel as claimed in claim 8, wherein the sum of the film thickness of the coating layer and the film thickness of the first passivation layer is greater than the film thickness of the second passivation layer.
10. The display panel as claimed in claim 8, wherein the common electrode is a second common electrode, the pixel structure further includes a first common electrode overlapping the capacitor electrode, the first common electrode being located between the substrate and the capacitor electrode, and the first common electrode being electrically coupled to the capacitor electrode to form a first storage capacitor.
11. The display panel as claimed in claim 10, wherein the capacitor electrode is electrically coupled to the common electrode to form a second storage capacitor, and the common electrode is electrically coupled to the pixel electrode to form a third storage capacitor.
12. The display panel as described in claim 11, wherein the capacitance value of the third storage capacitor is greater than the capacitance value of the second storage capacitor.
13. The display panel as claimed in claim 12, wherein the overlapping area of the common electrode and the pixel electrode on the substrate is greater than the overlapping area of the common electrode and the capacitor electrode on the substrate.
