Power management component, printed circuit board, and smart power stage device

Abstract

A power management component that allows daisy chaining of parallel power management devices is disclosed. The power management component has a first side including input pins connectable to the power source. A second side parallel to the first side includes an output pin connectable to a power rail on a circuit board. The power management component has a pair of sides perpendicular to the first side each with at least one identical signal pin. The identical signal pins are connectable to a rainbow bridge interconnection between the power management component and another power management component to avoid routing signal lines over the power source or output source.

Description

Technical Field

[0001] This invention relates to a power management component, and more specifically to a rainbow bridge for interconnecting signal pins on a power management component, allowing for efficient daisy chaining of the power management component in high-power applications. Prior Technology

[0002] Servers are widely used in high-demand applications, such as network-based systems or data centers. The rise of cloud computing applications has increased the demand for data centers. Data centers consist of a large number of servers that store data and run applications accessed by remotely connected computing users. A typical data center has a physical rack structure with corresponding power and communication connections. Each rack may house multiple application servers and storage servers in different tiers. One server architecture may be a compute tray, which can be placed within a shelf. A rack may include one or more power shelves, which contain multiple power supply units that provide centralized power to other components within the rack, such as compute trays. Individual compute trays typically include hardware components such as processors, storage devices, network interface cards, power supplies, and other specialized hardware mounted on one or more printed circuit boards. Each server typically includes a Baseboard Management Controller (BMC) that manages the server's operation and transmits operational data to a central management station that manages the servers in the rack.

[0003] In recent server applications, a primary goal for designers is to reduce printed circuit board (PCB) size and increase power density. Higher power density necessitates dedicated power management integrated circuit (Power Management Integrated Circuit) devices to protect components on the PCB. Currently, there are two main categories of Power Management Integrated Circuit devices that can be mounted on PCBs to perform power management functions. These power management devices include electronic fuses (e.g., hot-swappable circuits) that limit current, and Smart Power Stage (SPS) devices, which integrate current regulation and protection.

[0004] Electronic fuses primarily control the hot-swappable connection between the compute tray and the power supply plane. Therefore, the electronic fuse determines whether input power from the power supply plane can be safely transmitted to the compute tray within the server rack system. The electronic fuse continuously monitors the voltage and current from the power supply plane. Through controlled start-up time and voltage slew, it ensures that excessive inrush current is not generated when the compute tray is connected. If any fault is detected, the electronic fuse disconnects the connection between the compute tray and the power supply plane, thus protecting the components on the compute tray from the fault. As the power demand of the compute tray increases, two or more synchronously operating electronic fuses may need to be connected in parallel to share the high current load from the power supply plane.

[0005] The role of intelligent power stage devices is to convert the output of a medium-power supply to a lower voltage to power devices within the computing tray, such as central processing units (CPUs), graphics processing units (GPUs), and application-specific integrated circuits (ASICs). In such applications, intelligent power stage devices typically employ a buck converter topology. To offload high-current loads and improve performance, multi-phase control schemes are often implemented. Each intelligent power stage device can be considered a buck converter, while an external intelligent power stage controller manages and controls the multiple intelligent power stage devices allocated to different phases. In recent core voltage (Vcore) applications, 16-phase or even 32-phase intelligent power stage devices may be required to support high-power graphics processing units or ASICs.

[0006] Figure 1A is a schematic diagram of a circuit board 10 in the prior art, which includes electronic fuses 12 and 14 connected in parallel to share high current pressure. A high-voltage / high-power plane 20 is connected to a power supply on a power rack. The power plane 20 is connected to the power input (IN) pins 22 of the electronic fuses 12 and 14. A set of power output (OUT) pins 24 from each electronic fuse 12 and 14 provides power to a voltage rail 30. Thus, voltage is supplied to components such as those on a printed circuit board through the power plane 20 and the voltage rail 30. In the parallel configuration of the electronic fuses 12 and 14, there are several signal routing connections between the electronic fuses 12 and 14 and other electronic fuses connected in parallel with them. For example, a power good (PG) signal line 32 and an over-temperature (Vtemp) signal line 34 are coupled to each pin of the electronic fuses 12 and 14. Signal lines 32 and 34 pass under the power plane 20. Other signal lines, such as the Enable (EN) signal line 36, the Soft Start Setting (DVDT) line 38, and the Current Reference (IREF) signal line 40, must be connected to the corresponding pins on electronic fuses 12 and 14. As shown in Figure 1A, due to the pin layout of electronic fuses 12 and 14, signal lines 36, 38, and 40 must pass below voltage rail 30.

[0007] Figure 1B shows a schematic diagram of a power management system on a computing tray circuit board 50 in the prior art. The power management system includes smart power stage chips 52 and 54. A high-voltage / high-power plane 60 is connected to a power supply on a power rack. The power plane 60 is connected to a voltage input pin 62 of each smart power stage chip 52 and 54. A ground strip 64 is connected to different ground input pins 66 on each smart power stage chip 52 and 54. A set of voltage output pins 68 on each smart power stage chip 52 and 54 outputs pulse voltage signals, which are routed to respective inductor / capacitor circuits 70 to provide regulated voltage to the power supply components on the circuit board.

[0008] A set of control signals is received through the control signal input pins on each smart power stage chip 52 and 54. A smart power stage controller sends pulse width modulation (PWM) signals to the pulse width modulation (PWM) control pins of each smart power stage chip 52 and 54 via separate control lines 72. The PWM signals control the pulse voltage outputs at the voltage output terminals of the smart power stage chips 52 and 54. Other input pins allow the transmission of operating data signals or the reception of command signals from the smart power stage chips 52 and 54. For example, a sensing current signal (IOUT) is sent from each smart power stage chip 52 and 54 via sensing current signal line 74. An enable (EN) signal line 76 allows an external signal to enable the smart power stage chips 52 and 54. A temperature monitoring (TMON) signal line 78 is connected to a corresponding pin of each smart power stage chip 52 and 54 to indicate over-temperature faults in the smart power stage chips 52 and 54. These signal lines 74, 76, and 78 must pass below the power plane 60.

[0009] As shown in Figures 1A and 1B, the interconnection routing of different control and data signals between power management components (electronic fuses or smart power stage chips) is relatively complex. These routes require several vias to cross the high-voltage / power plane and connect them. Other routes require vias to cross the voltage rail 30 in Figure 1A. Considering circuit performance, board area limitations, and board cost, this complex layout leads to disadvantages and inherent defects that reduce the power supply performance of the printed circuit board.

[0010] For example, the circuit board input path areas for these signal lines, copper fill, and current paths must bypass obstacles such as the high-voltage / high-power plane 20 and voltage rail 30 in Figure 1A. This requires vertical turns in the power plane to engage with power management devices. These turns degrade the performance of the power circuitry. Jagged, incomplete, and indirect power planes result in poor power flow characteristics and low heat dissipation. Furthermore, to synchronize parallel power management components, several signals must be interconnected between devices, leading to complex routing that requires vias and multiple layers for successful connections. If the number of printed circuit board layers is limited, a large number of vias or advanced via designs are needed for interconnection. Too many vias can lead to low noise immunity and crosstalk between signals. Circuit accuracy may be reduced, increasing the risk of errors in the compute tray. The holes formed by these vias in the internal ground copper fill can also disrupt current return paths, further degrading circuit performance. To mitigate these effects, circuit board designers typically need to conduct complex evaluations of layout routing and placement, requiring a sufficiently large board area, more layers, and advanced via technology for power management components. These solutions are costly and still pose a potential risk of signal noise and reduced power efficiency. Failure to carefully consider these factors can lead to poor performance or even circuit failure.

[0011] Therefore, there is an urgent need for a bridging architecture to simplify signal connections between power management components. There is also a need for a power management component design that allows for direct top-to-bottom placement of power inputs and outputs, thereby reducing the required printed circuit board area. Finally, there is a need for a power management design that positions signal pins in vias that eliminate interconnections between devices, resulting in clean and direct layout routing and copper filling. Summary of the Invention

[0012] The terminology used in the embodiments and similar terms (e.g., implementation, configuration, feature, example, and option) is intended to refer broadly to all objects of this disclosure and the following claims. Several statements containing these terms should be understood as not limiting the object described herein or the meaning or scope of the following claims. The embodiments of this disclosure covered herein are defined by the following claims and are not part of the content of this invention. This summary is a high-level overview of various features of this disclosure and introduces some concepts further described in the following implementation paragraphs. This summary is not intended to identify key or essential features of the object of the claims, nor is it intended to be used independently to determine the scope of the object of the claims. The object should be understood through reference to appropriate portions of the complete specification of this disclosure, any or all drawings, and each claim.

[0013] According to certain aspects of this disclosure, a power management component is disclosed for receiving electrical energy from a power source and performing a power management function. The power management component includes a first side and a second side. The first side includes an input pin connectable to a power source. The second side is parallel to the first side and has an output pin connectable to a power rail on a circuit board. The power management component includes a power management function circuit coupled between the input pin and the output pin. The power management component includes a pair of sides perpendicular to the first side. Each side includes at least one identical signal pin, which can receive an input signal transmitted by the other identical signal pin or transmit an output signal from the power management component.

[0014] According to certain aspects of this disclosure, a printed circuit board is disclosed. The printed circuit board includes a power plane connectable to a power supply rack having a power supply. A first power management component has a first side, a second side, a power management functional circuit, and a pair of sides. The first side includes an input pin connectable to the power plane; the second side is parallel to the first side and includes an output pin; the power management functional circuit is coupled between the input pin and the output pin; the sides are perpendicular to the first side, and each side includes at least one identical signal pin. A second power management component has a first side, a second side, a power management functional circuit, and a pair of sides. The first side includes an input pin connectable to the power plane; the second side is parallel to the first side and includes an output pin; the power management functional circuit is coupled between the input pin and the output pin; the sides are perpendicular to the first side. Each side includes at least one identical signal pin. A first rainbow bridge directly couples at least one identical signal pin of the first power management component to at least one identical signal pin of the second power management component.

[0015] According to certain aspects of this disclosure, a smart power stage device is disclosed. The smart power stage device includes an integrated circuit package having a first side, an opposing second side, and a pair of sides perpendicular to the first side. A voltage input pin is on the first side and can be connected to a power supply. An output pin is on the opposing second side. A buck converter is coupled between the voltage input pin and the output pin to provide a pulsed voltage signal to the output pin. A first pulse width modulation (PWM) signal pin is located on one of the opposing sides. A second PWM signal pin is located on the other side, wherein a PWM signal received from the first PWM signal pin is output from the second PWM signal pin and drives the buck converter.

[0016] The foregoing description is not intended to present every embodiment or feature of this disclosure. Rather, it provides only examples of some novel features and characteristics set forth herein. The foregoing description will become apparent, in conjunction with the accompanying drawings and the appended claims, from the following detailed description of representative embodiments and modes for carrying out the invention. Additional features of this disclosure will be apparent to those skilled in the art, given the detailed description of various embodiments with reference to the accompanying drawings and the simplified description of the symbols provided below. Simple Explanation of the Diagram

[0017] The present disclosure and its advantages, along with the accompanying drawings, will be better understood from the following description of exemplary embodiments in conjunction with the accompanying drawings. These drawings illustrate exemplary embodiments only and should therefore not be considered as limiting the various embodiments or the scope of the claims. Figure 1A is a circuit board layout diagram of a power management system with parallel electronic fuses in the prior art; Figure 1B is a circuit board layout diagram of a power management system with parallel intelligent power stage devices in the prior art; Figure 2 is a circuit diagram showing an example electronic fuse connected to an example rainbow bridge, according to certain aspects of this disclosure; Figure 3 is a circuit board layout diagram illustrating the arrangement of electronic fuses in Figure 2, based on certain aspects of this disclosure; Figure 4 is a circuit diagram of an example smart power stage device using an example rainbow bridge, based on certain aspects of this disclosure; Figure 5 is a circuit board layout diagram illustrating the arrangement of a smart power stage device, as shown in Figure 4, based on certain aspects of this disclosure. Figure 6 is a circuit diagram of an example smart power stage device according to certain aspects of this disclosure, which can be programmed to control a split-phase voltage output via a universal pulse width modulation signal; Figure 7 is a table of example resistance values ​​for setting the voltage of an output phase of a smart power stage device according to certain aspects of this disclosure; Figures 8A and 8B are circuit board layout diagrams of a power management system having four example smart power stage devices from Figure 6, according to certain aspects of this disclosure, which provide four-phase voltage output; Figure 9 is a control signal diagram of different smart power stage devices in Figures 8A and 8B, according to certain aspects of this disclosure, for providing power to the circuit board in four different phases. Implementation

[0018] This disclosure aims to provide power management components or devices having mating signal pins on opposite sides. The power management device or component performs various power management functions by receiving power from a power plane and sending power to a printed circuit board. Example power management components include electronic fuses for protecting against power failures and intelligent power stage devices that provide regulated power to the circuit board. Example power management components have integrated circuit packages and identical mating signal pins on opposite sides. These identical signal pins can receive input data or command signals transmitted from another identical signal pin, or transmit output data or command signals from the power management component. The mating signal pins located on opposite sides of the power management component allow for the use of a rainbow bridge structure to connect the power management components via multiple interconnects. These power management components are arranged in parallel to achieve power load distribution. Power input pins are located on one side perpendicular to the two sides with mating signal pins, while power output pins are located on the opposite side perpendicular to the two sides with mating signal pins. Therefore, the power plane can be directly connected to one side of each parallel power management component without interfering with the interconnection between the signal pins. The rainbow bridge design not only enables direct top-to-bottom placement of power planes, reducing the required PCB area by half, but also eliminates vias required for all interconnects, making PCB layout routing and copper filling simpler and more direct. By integrating power management components in a chain structure, better power flow performance, smaller PCB size, and lower PCB costs are achieved. In a power management device based on a smart power stage, the example pulse-width modulation (PWM) control scheme achieves efficient split-phase power supply using only a single PWM control line.

[0019] Various embodiments are described with reference to the accompanying drawings, throughout which similar reference numerals are used to designate similar or equivalent parts. The drawings are not drawn to scale and are provided solely to illustrate the features and characteristics of this disclosure. It should be understood that many specific details, relationships, and methods are set forth to provide a comprehensive understanding. However, it will be readily apparent to those skilled in the art that various embodiments may be practiced without one or more specific details or in other ways. In some cases, well-known structures or operations are not shown in detail for illustrative purposes. The various embodiments are not limited to the order in which actions or events are shown, as some actions may occur in a different order and / or simultaneously with other actions or events. Furthermore, not all actions or events shown are necessary to implement certain features and characteristics of this disclosure.

[0020] For the purposes of this embodiment, unless explicitly stated otherwise, the singular includes the plural and vice versa. The term "including" means "including but not limited to". Furthermore, approximate words such as "about (about), almost, substantially, approximately") and similar words may be meant herein as, for example, "at", "near, nearly at", "within 3-5% of", "within acceptable manufacturing tolerances", or any logical combination thereof. Additionally, the terms "vertical" or "horizontal" are intended to further include "within 3-5%" in the vertical or horizontal direction, respectively. Furthermore, directional terms such as "top", "bottom", "left", "right", "above", and "below" are intended to relate to the equivalent directions depicted in the reference illustrations; to be understood from the context of the referenced object or component, such as from its usual location; or other such descriptions.

[0021] Figure 2 shows a circuit diagram of a power management component 200, including two or more power management units for distributing power loads to components on a circuit board. In this example, the power management units are electronic fuses (E-fuses) 210 and 212 arranged in parallel. This parallel arrangement allows higher power systems to be protected because more electronic fuses can be used to distribute the power load. A high-voltage / high-power power supply is connected to a power supply on a power rack. The power supply is connected to the voltage input (IN) pin 220 on electronic fuses 210 and 212. The voltage output (OUT) pin 222 of each electronic fuse 210 and 212 provides power, delivering voltage to components on the printed circuit board.

[0022] In this parallel arrangement, various identical signal pins allow signal routing connections between electronic fuses 210 and 212 and with other parallel electronic fuses. These identical signal pins can receive input data or command signals sent from another identical signal pin, or send output data or command signals from the corresponding electronic fuse 210 or 212. This allows electronic fuses 210 and 212 to be daisy-chained together. An example rainbow bridge 230 includes interconnections connecting signal input pins to electronic fuses 210 and 212. Thus, each pin of electronic fuses 210 and 212 includes an enable (EN) signal pin 232, a soft-start setting (DVDT) pin 234, a current reference signal (IREF) pin 236, a power good (PG) signal pin 238, and an over-temperature (Vtemp) signal pin 240. In this example, the Enable (EN) signal pin 232 receives an external control signal to enable the electronic fuse. The output voltage of the electronic fuse can be configured via the Soft-Start Setting (DVDT) pin 234. The Power Good (PG) signal pin 238 indicates whether the electronic fuse has reached the set output voltage or is within an acceptable range. The Current Reference signal pin 236 receives a signal configuring the current value that each electronic fuse must follow. The Over-Temperature signal pin 240 indicates the temperature fault condition when the electronic fuse over-temperatures. These signal pins 232, 234, 236, 238, and 240 are repeated on each of the electronic fuses 210 and 212 to allow connection to corresponding pins of adjacent electronic fuses. The Rainbow Bridge 230 allows signal lines to be connected between the pins on corresponding sides of electronic fuses 210 and 212 without needing to bypass the area of ​​electronic fuses 210 and 212 on the board. Other pins, such as VCC pin 244, ground pin (GND) 246, and overcurrent protection value (ILIM) pin 248, have only a single pin on each of the electronic fuses 210 and 212. VCC pin 244 and ground pin 246 are used to power the electronic fuse. Overcurrent protection value (ILIM) pin 248 is used to set the overcurrent protection value of the electronic fuse.

[0023] In this example, an external controller, such as a power controller or board management controller, can send a signal to the Enable (EN) pin 232 to enable electronic fuses 210 and 212. If pin 238 is connected to a voltage higher than 0, the Power Good pin 238 can read a logic high value when the output voltage reaches a set value or is within an acceptable range. In this example, electronic fuse 210 acts as a master, and other electronic fuses, such as electronic fuse 212, act as slaves. Electronic fuses 210 and 212 share the over-temperature value on the Over-Temperature signal pin 240. The Power Good (PG) signal on the Power Good (PG) signal pin 238 indicates whether these electronic fuses have reached a set output voltage or are within an acceptable range. The Current Reference signal on the Current Reference signal pin 236 provides current balancing for all electronic fuses.

[0024] Figure 3 shows the layout of a printed circuit board 300, including electronic fuses 210 and 212 to protect other components from power failures. Electronic fuse 210 is connected to a power plane 310, which supplies power from the power plane to the voltage input (IN) pin 220 when the printed circuit board 300 is connected to a power supply rack. Electronic fuses 210 and 212 are also connected to a voltage rail 312, which provides power to the components on the printed circuit board 300. Therefore, electronic fuses 210 and 212 protect the components on the printed circuit board 300, which are powered by the voltage rail 312, from power failures originating from the power plane 310.

[0025] In this example, electronic fuses 210 and 212 are each housed in a standard quad-package 320, as shown in Figure 3. Package 320 has two parallel sides 322 and 324, each with identical signal pins 232, 234, 236, 238, and 240. Package 320 includes circuitry that performs power management functions, such as detecting a power fault received on input (IN) pin 220 and cutting off power to output pin 222. Other input pins 244, 246, and 248 are located only on side 322, as they are not connected to other electronic fuses. Pin 248 allows each electronic fuse to be set with an individual overcurrent protection value. Sides 326 and 328, parallel to and perpendicular to sides 322 and 324, respectively include input pin 220 and output (OUT) pin 222.

[0026] As shown in the layout of the printed circuit board 300, the power plane 310 may be a rectangular shape with uninterrupted edges because the plane 310 does not need to pass through specific input pins of the electronic fuses. Furthermore, the voltage rail 312 may also be directly connected to the output (OUT) pins 222 of the electronic fuses 210 and 212, and does not need to have interrupted edges leading to each electronic fuse 210 and 212.

[0027] Figure 4 shows a circuit diagram of a power management component, which includes smart power stage chips 410 and 412 arranged in parallel. A high-voltage / high-power supply from the power supply rack is connected to the input (VIN) pin 420. The output (SW) pin 422 of each smart power stage chip 410 and 412 provides a regulated voltage. Ground can be connected to different ground input pins on each smart power stage chip 410 and 412.

[0028] A set of control signals is generated in the control and data signal input pins on smart power stage chips 410 and 412. Smart power stage chips 410 and 412 share a common set of signal pins, including an enable (EN) pin 430, a VCC pin 432, a control pulse width modulation (PWM) pin 434, a shared sense current (ISHARE) input pin 436, and a monitor current (IMON) pin 438. These identical signal pins can receive input data or command signals sent from another identical signal pin, or send output data or command signals from smart power stage chips 410 or 412. A smart power stage controller 440 sends a PWM signal to the PWM control pin 434 of smart power stage chip 410. The PWM signal can be sent to other smart power stage chips, such as smart power stage chip 412, via an example rainbow bridge 442. As explained later, the pulse-width modulation (PWM) signal controls the gate of a buck converter circuit that generates a periodic voltage signal from the output (SW) pin 422. The Rainbow Bridge 442 includes a series of interconnects between the same signal pins of the smart power stage chips 410 and 412. Other pins include several ground pins (PGND) 450, an A-ground (AGND) pin 452, a shift pin 454, a boot pin 456, and a phase pin 458. The ground pin 450 can be connected to the ground of the input power supply from the power source. The A-ground (AGND) pin 452 can be connected to the ground of other signal pins, such as the shift pin 454. The shift pin 454 allows setting a value to set the phase offset of the output (SW) pin 422 and the output current. The BOOT pin 456 and PHASE pin 458, together with an additional capacitor, form a startup design to provide the voltage required to drive the high-side metal-oxide-semiconductor field-effect transistor (MOSFET) of the buck converter.

[0029] Figure 5 shows the layout of a printed circuit board 500 including smart power stage chips 410 and 412, which are smart power stage devices. When the printed circuit board 500 is connected to a power supply rack, the smart power stage chips 410 and 412 are connected to a power plane 510, transmitting power supplied by the power supply rack to a voltage input (VIN) pin 420. The voltage output (SW) pins 422 of the smart power stage chips 410 and 412 are connected to inductors 514, and these inductors, in combination with capacitors, form part of a power regulation circuit. Therefore, the smart power stage chips 410 and 412 protect components powered by the power regulation circuit from power failures transmitted through the power plane 510. The smart power stage chips 410 and 412 also incorporate buck converters that can generate pulsed outputs of specific voltage levels for the power regulation circuit based on pulse width modulation control signals from a smart power stage controller 440. The power regulation circuit, including inductors 514 and capacitors, provides a stable regulated voltage to the components on the printed circuit board 500. The ground (PGND) pin 450 is connected to the ground bar 512.

[0030] As shown in Figure 5, the smart power stage chips 410 and 412 in the example are each packaged within a standard quad-sided integrated circuit package 520. In this example, package 520 includes circuitry that performs power management functions, such as buck converter circuitry, protection circuitry, and phase shifting circuitry. Package 520 has two parallel sides 522 and 524, each with repeating signal pins 430, 432, 434, 436, and 438. Other reference pins 452, 454, 456, and 458 are configured only on one of sides 522 and 524, as these pins do not need to be connected to the pins of the other smart power stage chip. Package 520 also includes vertical sides 526 and 528, with an input (VIN) pin 420 and an output (SW) pin 422, respectively. In this example, Rainbow Bridge 442 connects signal pins 430, 432, 434, 436, and 438 on sides 522 and 524 between smart power stage chips 410 and 412. Phase pin 458 is connected to boot pin 456 via a capacitor. Boot pin 456 and phase pin 458, together with the additional capacitor, form a boot design to provide the voltage required to drive the high-side MOSFETs of the buck converter within the smart power stage chips. As will be explained later, resistor 530 is connected to shift pin 454 and AGND pin 452 to set the phase shift of smart power stage chips 410 and 412.

[0031] The rainbow bridge configuration shown in Figure 3, connecting the electronic fuse, and the smart power stage configuration in Figure 5, both employ the same mirrored pin design applied to the parallel side of the integrated circuit package. This design, connecting power management components via the rainbow bridge, offers significant advantages. The mirrored pin design allows for easy interconnection between parallel devices via the rainbow bridge, enabling power management components and / or external controllers to exchange data or control signals. As shown in the layouts of Figures 3 and 5, all connection signals can be directly transmitted from one power management component to another via the rainbow bridge, without the need for additional interconnect routing. Therefore, signal routing lines do not interfere with, pass through, or cut through high-power planes, allowing ultra-high current to flow directly into and out of power management components. This configuration allows for a power plane without bends, providing superior power performance and heat dissipation compared to the sawtooth routing shown in Figures 1A and 1B. Furthermore, the rainbow bridge design allows devices to be mounted on the top and bottom of the printed circuit board, doubling the PCB space available for parallel devices compared to the known pin designs shown in Figures 1A and 1B. This design also provides inherent current balancing characteristics. By employing a rainbow bridge design, a symmetrical layout, power plane design, and routing can be provided for each device. Since the traces and copper impedance of each smart power stage are nearly identical, current can flow evenly across all smart power stages. Furthermore, this design eliminates the need for vias for signal interconnect routing, thereby reducing crosstalk and noise on signal lines and improving circuit accuracy and noise immunity. Even with a limited number of printed circuit board layers, designers will not face difficulties in layout and routing. Due to the reduction in vias and the ability to mount devices on the top and bottom of the printed circuit board, this layout can be completed within a smaller printed circuit board area, providing more flexible component placement and routing options.

[0032] To further reduce the required board area, a daisy-chain structure concept is introduced into the rainbow bridge design. Each power management component connected to the example rainbow bridge shares the same configuration data or command signal pins and related components as much as possible. For example, in Figure 3, the soft-start setting (DVDT) pin 234 of all electronic fuses is connected, so all electronic fuses will read the same value from the same soft-start setting input signal and have the same startup time setting, ensuring that all devices operate synchronously upon power-up. This concept can also be easily extended to other configuration pins because no additional routing area is required, resulting in a smaller required printed circuit board area.

[0033] Although the example rainbow bridge design is shown for a system that includes electronic fuses and smart power stage devices, this design concept can also be applied, with appropriate modifications, to other devices that need to operate in parallel and interconnect signals.

[0034] The example power management system, also shown in Figure 5, applies daisy-chain power management components to a multiphase pulse-width modulation (PWM) power supply. This design reduces the PWM signals required for multiple smart power stage devices to a single signal line, setting a specific phase offset for each smart power stage device via a resistor (e.g., a 530Ω resistor). In existing four-phase smart power stage applications, the smart power stage controller needs to provide four different PWM signals to control the phase of pulse voltage signals from four smart power stage devices, each output voltage signal having a 90-degree phase offset from each other. This requires four different PWM signals to the smart power stage devices via different signal lines, and some PWM signal lines need to pass through the smart power stage devices via vias. As the number of phases increases, the signal line layout requirements also increase. For example, a 16-phase system would require 16 route lines to connect 16 smart power stage devices, thus making the wiring relatively complex and requiring multiple vias.

[0035] To overcome these drawbacks, an offset pin and a pulse width modulation (PWM) pin are added to the example rainbow bridge-based smart power stage architecture. This design allows multiphase systems to be controlled using only a single PWM signal line, as the phase offset can be adjusted by the offset pin. Figure 6 shows this design concept and a key functional control block diagram 600 of the example smart power stage.

[0036] Block diagram 600 shows an example smart power stage device, such as the smart power stage chip 410 in Figure 4. The smart power stage device in Figure 6 is a four-phase buck converter circuit, with a duty cycle of 0.25 set for simplicity. The buck converter circuit includes a high-side MOSFET 632, a low-side MOSFET 634, and a gate driver 616 to drive the MOSFETs 632 and 634. Additionally, the buck converter circuit also includes a pulse width modulation compensator 614, a phase delay circuit 612, and an internal current source 630. These principles can also be applied to systems with higher phase counts, such as 8-phase or 16-phase systems.

[0037] A phase delay circuit 612 generates an offset pulse-width modulation (PWM) signal and inputs it to a PWM compensator 614. A current source 630 is coupled to the offset line of the PWM compensator 614. The PWM compensator 614 outputs an offset phase signal to a gate driver 616, which in turn controls the power output from the voltage input (VIN) pin 420. A logic circuit 618 is connected to the monitor current (IMON) pin 438 to read the current value of a current sensing node 636 and output it to the monitor current (IMON) pin 438. In this example, the enable (EN) pin 430 and the pulse-width modulation (PWM) pin 434 are connected to the phase delay circuit 612. When the enable (EN) pin 430 receives an enable signal, the phase delay circuit 612 is activated. The PWM pin 434 receives a PWM signal from the intelligent power stage controller 440 in Figure 4. The phase delay circuit 612 shifts the phase of the pulse width modulation signal according to the offset input signal and inputs the shifted pulse width modulation signal to the pulse width modulation compensator 614. The phase shift is determined by the voltage drop generated by the resistor 530 connected to the offset (SHIFT) pin 454 and the A-ground (AGND) pin 452.

[0038] The power supplied to the voltage input (VIN) pin 420 can control the switching states of MOSFETs 632 and 634 via the gate driver 616, thereby initiating the power output based on an offset pulse-width modulation (PWM) signal. The PWM signal of the intelligent power stage controller controls the gate driver 616 to generate a voltage pulse output with a duty cycle of 0.25. When MOSFETs 632 and 634 are closed, the voltage input (VIN) pin 420 is connected to the ground (PGND) pin 450, causing the output (SW) pin 422 to output a voltage. Therefore, the maximum amplitude of the output pulse at the output (SW) pin 422 is equal to the voltage at the voltage input (VIN) pin 420. A current sensing node 636 is coupled between the ground (PGND) pin 450 and the switch 634. The output of the current sensing node 636 is connected to the logic circuit 618 and an input of the operational amplifier 620. Gate driver 616 is connected to the boot pin 456, which is connected to the phase pin 458 via an external capacitor. Boot pin 456 and phase pin 458, together with the external capacitor, form a boot design to provide the voltage required to drive the high-side MOSFET 632 in the buck converter circuit. Gate driver 616 is powered by the voltage connected to the VCC pin 432.

[0039] By connecting resistors of varying values, a specific voltage level can be established on the offset pin of each smart power stage device using an internally designed current source (e.g., current source 630). This specific voltage level corresponds to a specific phase offset angle, as shown in Table 700 in Figure 7. In this example, the resistors and corresponding voltages are designed for 4-phase or 8-phase systems, but this method can be used for other phase numbers as well. Table 700 includes a resistance value column 710, a voltage output column 720, and a phase offset column 730. Therefore, different resistance values ​​in column 710 (e.g., resistor 530) will produce different voltages, which can be input to the offset pin 454, as shown in column 720. Different voltages will result in different phase offset angles, as shown in column 730.

[0040] As described above, the pulse-width modulation (PWM) signal sent by the intelligent power stage controller 440 in Figure 4 will serve as a reference signal. The phase delay circuit 612 is responsible for performing the phase delay function. A specific voltage value is read from the offset pin 454 according to Table 700 in Figure 7. The phase delay circuit 612 will generate a specific phase offset angle for the received PWM signal based on this voltage value.

[0041] Designers can flexibly adjust the internal current source or modify the phase delay circuit to design different voltage and phase offset relationships. The duty cycle of the shared input pulse width modulation signal is adjusted by the smart power stage controller 440 based on the instantaneous output voltage fed back to the controller from the feedback output (not shown). After the pulse width modulation signal passes through the phase delay circuit 612, a specific phase offset angle is generated based on the voltage value on the offset pin 454. For example, by connecting resistors of 2kΩ, 6kΩ, 10kΩ, and 14kΩ to the offset pins of four different smart power stage devices, a 90-degree phase offset between each smart power stage device can be achieved according to Table 700 in Figure 7.

[0042] Figures 8A and 8B show example block diagrams of a 4-phase power management system 800 using resistor values ​​from Table 700. The power management system 800 includes a smart power stage controller 810. The power plane 812 is powered by a power shelf. The smart power stage controller 810 outputs a single pulse-width modulation (PWM) signal on PWM signal line 814 to control the pulse frequency of the output voltage signal. Four smart power stage devices 820, 822, 824, and 826 are interconnected via rainbow bridges 830, 832, and 834. Each smart power stage device 820, 822, 824, and 826 has a phase pin 836 connected to corresponding resistors 840, 842, 844, and 846, respectively. Therefore, each smart power stage device 820, 822, 824, and 826 outputs a pulse voltage signal with a different phase in the inductor / capacitor regulation circuit, and the pulse voltage signal is driven by the pulse width modulation controller 810.

[0043] Figure 9 shows a voltage waveform 900, displaying pulse width modulation (PWM) signals from four different smart power stage devices, each with a 90-degree phase shift. The PWM control signal from the PWM controller 810 is shown as the pulse voltage waveform 910. In this example, the pulse duty cycle is 0.25. The first smart power stage device 820 has a resistor 840 of 2kΩ, therefore no phase shift, as shown in waveform 920. The second smart power stage device 822 has a resistor 842 of 6kΩ, thus producing a 90-degree phase shift, as shown in waveform 922. The third smart power stage device 824 has a resistor 844 of 10kΩ, thus producing a 180-degree phase shift, as shown in waveform 924. The fourth smart power stage device 826 has a resistor 846 of 14kΩ, thus producing a 270-degree phase shift, as shown in waveform 926.

[0044] Current balancing is achieved through operational amplifier 620 and current feedback compensator 614. One input of operational amplifier 620 is connected to current sensing node 636, and the other input is connected to shared sense current (ISHARE) pin 436. Operational amplifier 620 compares the current sensed value from current sensing node 636 with the shared current value read from shared sense current (ISHARE) pin 436, thereby providing the current transfer information required by the smart power stage device to achieve balance. In this example, if the sensed current value is lower than the current value read from shared sense current (ISHARE) pin 436, operational amplifier 620 outputs a positive value to pulse width modulation compensator 614, increasing the duty cycle of the pulse width modulation signal and thus increasing the output current. Through these signals, pulse width modulation compensator 614 in each smart power stage device determines the final gate signal and outputs it to gate driver 616. This design ensures the safety and normal operation of the multiphase voltage regulator. This design concept can be extended to 16 phases or even more. This design concept will become even more advantageous as the required number of phases increases.

[0045] While various embodiments of this disclosure have been described above, it should be understood that they are presented by way of example only and not as limiting. Various changes may be made to the embodiments disclosed herein without departing from the spirit or scope of this disclosure. Therefore, the breadth and scope of this disclosure should not be limited by any of the foregoing embodiments. Rather, the scope of this disclosure should be defined by the following claims and their equivalents.

[0046] 10: Circuit board 12, 14: Electronic fuses 20: Plane 24: Pins 30: Voltage rail 32, 34, 36, 38, 40: lines 50: Circuit board 52, 54: Chips 60: Plane 62, 66: Pins 64: Grounding bar 70: Inductor / Capacitor Circuit 72: Control Line 74, 76, 78: Signal lines 200: Power Management Component 210, 212: Electronic fuses 220, 222: Pins 230: Rainbow Bridge 232, 234, 236, 238, 240, 244, 246, 248: Pins 300: Printed Circuit Board 310: Power plane 312: Voltage rail 320: Package 322, 324, 326, 328: Side view 410, 412: Smart Power Stage Chips 420, 422, 430, 432, 434, 436, 438, 450, 452, 454, 456, 458: Pins 440: Intelligent Power Stage Controller 442: Rainbow Bridge 500: Printed Circuit Board 510: Power plane 512: Grounding bar 514: Inductor 520: Package 522, 524, 526, 528: Side view 530: Resistor 600: Block Diagram 612: Phase Delay Circuit 614: Compensator 616: Gate Driver 618: Logic Circuits 620: Operational Amplifier 630: Current Source 632, 634: Metal-oxide-semiconductor field-effect transistors 636: Current sensing node 700: Table 710, 720, 730: Columns 800: Power Management System 810: Controller 812: Power plane 814: Pulse Width Modulation Signal Line 820, 822, 824, 826: Intelligent Power Stage Devices 830, 832, 834: Rainbow Bridge 836: Phase pin 840, 842, 844, 846: Resistors 900: Voltage waveform diagram 910: Pulse voltage waveform 920, 922, 924, 926: Waveforms

Claims

1. A power management component for receiving electrical energy from a power source and performing a power management function, comprising: A first side includes an input pin that can be connected to a power supply; A second side, parallel to the first side, includes an output pin that can be connected to a power rail on a circuit board; a power management function circuit coupled between the input pin and the output pin; and a pair of sides perpendicular to the first side, each of the sides including at least one identical signal pin that can receive an input signal transmitted by another identical signal pin, or transmit an output signal from the power management component; wherein the at least one identical signal pin is one of a plurality of identical signal pins, each signal pin being connectable to a rainbow bridge interconnect, each of the plurality of identical signal pins being coupled to a corresponding signal pin of another power management component, and the other power management component having an input pin that can be connected to the power supply.

2. The power management component as claimed in claim 1, wherein the power management component is an electronic fuse, and the power management function circuit cuts off the power to the output pin when a fault is detected in the power supply.

3. The power management component as claimed in claim 1, wherein the power management component is a smart power stage device, and the power management function circuit is a buck converter that outputs a pulse voltage signal.

4. The power management component as described in claim 3, wherein the at least one identical signal pin receives a pulse width modulation signal to drive the buck converter.

5. The power management component as described in claim 4 further includes a phase offset input pin that can be connected to a resistor, wherein a value of the resistor determines a phase of the pulse width modulation signal provided to the buck converter.

6. A printed circuit board, comprising: A power plane that can be connected to a power rack with a power supply; A first power management component has a first side, a second side, a power management functional circuit, and a pair of sides. The first side includes an input pin that can be connected to the power plane. The second side is parallel to the first side and includes an output pin. The power management functional circuit is coupled between the input pin and the output pin. The pair of sides is perpendicular to the first side, and each side of the pair of sides includes at least one identical signal pin. A second power management component has a first side, a second side, a power management functional circuit, and a pair of sides. The first side includes an input pin that can be connected to the power plane. The second side is parallel to the first side and includes an output pin. The power management functional circuit is coupled between the input pin and the output pin. The pair of sides is perpendicular to the first side, and each side of the pair of sides includes at least one identical signal pin. A first rainbow bridge directly couples one of the at least one identical signal pin of the first power management component to one of the at least one identical signal pin of the second power management component.

7. The printed circuit board as described in claim 6, wherein the first power management component and the second power management component are smart power stage devices, and the power management function circuit is a buck converter that outputs a pulse voltage signal.

8. The printed circuit board as described in claim 6, further comprising: A third power management component has a first side, a second side, a power management function circuit, and a pair of sides. The first side includes an input pin that can be connected to the power plane. The second side is parallel to the first side and includes an output pin. The power management function circuit is coupled between the input pin and the output pin. The pair of sides are perpendicular to the first side, and each side of the pair of sides includes at least one identical signal pin. A second rainbow bridge directly couples one of the at least one identical signal pin of the second power management component to one of the at least one identical signal pin of the third power management component.

9. A smart power stage device, comprising: An integrated circuit package has a first side, an opposing second side, and a pair of sides perpendicular to the first side; A voltage input pin, on the first side, can be connected to a power supply; an output pin, on the opposite second side; a buck converter, coupled between the voltage input pin and the output pin, to provide a pulsed voltage signal to the output pin; a first pulse width modulation (PWM) signal pin, located on one of the opposite sides; and a second PWM signal pin, located on the other side of the opposite sides, wherein a PWM signal received from the first PWM signal pin is output from the second PWM signal pin and drives the buck converter.

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