Triggered data arrangement method and memory device
TW202638259APending Publication Date: 2026-09-16SILICON MOTION INC
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Patent Information
- Application Number
- TW114109250
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-03-12
- Publication Date
- 2026-09-16
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Abstract
The present disclosure provides a triggered data arrangement method and a memory device. The memory device includes a memory controller and a memory module. The memory module includes multiple blocks. The triggered data arrangement method includes: in response to the electronic device detecting a first trigger event, triggering, by the electronic device, the memory controller executing an aggressive garbage collection operation, wherein the aggressive garbage collection operation is used to maximize a number of spare block of multiple first blocks of a first type among the blocks; and in response to a second trigger event, stopping, by the memory controller, the aggressive garbage collection operation, wherein the aggressive garbage collection operation includes uninterrupted garbage collection operation before the second trigger event occurs.
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