Circuit design method and electronic device executing the circuit design method
Patent Information
- Application Number
- TW114107959
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-03-04
- Publication Date
- 2026-09-16
- Estimated Expiration
- 2045-03-03
AI Technical Summary
Conventional electronic circuit design methods address voltage drop too late, leading to complex timing and routing issues that are time-consuming to resolve.
Perform voltage drop analysis early in the circuit design process, sort cells by voltage drop, select candidate cells, and replace them with appropriate power-based cells to reduce complexity and time costs.
This approach reduces the complexity and time required for electronic circuit design by addressing voltage drop earlier, thereby simplifying the design process.
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Abstract
Description
Technical Field
[0001] This invention relates to circuit design methods, and more particularly to the handling of voltage drop (IR drop, or simply voltage drop) at the back end of circuit design. Prior Technology
[0002] Power consumption analysis is one step in electronic circuit design. Please refer to Figure 1, which shows a conventional power consumption analysis diagram. The diagram contains multiple low-power cells (Ca), multiple medium-power cells (Cb), and multiple high-power cells (Cc). The power consumption of low-power cell Ca is less than that of medium-power cell Cb, and the power consumption of medium-power cell Cb is less than that of high-power cell Cc. The threshold voltage of low-power cell Ca is greater than that of medium-power cell Cb, and the threshold voltage of medium-power cell Cb is greater than that of high-power cell Cc.
[0003] Path 101 passes through multiple low-power cells Ca, multiple medium-power cells Cb, and one high-power cell Cc. Power-based cell replacement processes typically reduce the overall power consumption of electronic devices by replacing the high-power cell Cc on paths with a time slack greater than 0 with a medium-power cell Cb or a low-power cell Ca.
[0004] In conventional technology, voltage drop is usually addressed after power consumption analysis. However, addressing voltage drop too late often leads to complex timing and routing issues, which are quite time-consuming to resolve. Therefore, addressing voltage drop earlier can help reduce the complexity and time cost of electronic circuit design. Summary of the Invention
[0005] In view of the shortcomings of the prior art, one object of the present invention is to provide a circuit design method and an electronic device for performing the circuit design method, so as to improve the shortcomings of the prior art.
[0006] One embodiment of the present invention provides an electronic device for performing a circuit design method. The circuit design method includes a power-based cell replacement process. The electronic device includes a memory and a computing circuit. The memory stores circuit layout data and a plurality of code and / or instructions. The computing circuit is coupled to the memory and executes the code and / or instructions to perform the following steps: performing a voltage drop analysis based on the circuit layout data; sorting the plurality of cells according to the voltage drop to generate a candidate list; selecting a candidate cell from the candidate list; replacing the candidate cell; and performing the power-based cell replacement process.
[0007] Another embodiment of the present invention provides a circuit design method, comprising: performing a voltage drop analysis based on a circuit layout data; sorting a plurality of cells according to the voltage drop to generate a candidate list; selecting a candidate cell from the candidate list; replacing the candidate cell; and performing a power-based cell replacement process.
[0008] The technical means embodied in the embodiments of the present invention can improve at least one of the disadvantages of the prior art. Therefore, the present invention can reduce the complexity and time cost of electronic circuit design compared with the prior art.
[0009] The features, implementation, and effects of this invention are described in detail below with reference to the accompanying drawings. Simple Explanation of the Diagram
[0010] Figure 1 shows a conventional power consumption analysis diagram; Figure 2 is a functional block diagram of one embodiment of the electronic device of the present invention; Figures 3A-3C are flowcharts of one embodiment of the circuit design method of the present invention; Figure 4 is an embodiment of the voltage drop analysis diagram of the present invention; Figure 5 is a schematic diagram of one embodiment of the candidate list of the present invention; Figure 6 is a schematic diagram of one embodiment of the present invention for determining the critical voltage of the target unit; Figure 7 is another embodiment of the voltage drop analysis diagram of the present invention; Figures 8A and 8B are schematic diagrams of one embodiment of the non-replaceable list of the present invention; and Figures 9A and 9B are schematic diagrams of one embodiment of the replacement list of the present invention. Implementation
[0011] The technical terms used in the following description are based on the common terminology of this technical field. If this specification provides explanations or definitions for certain terms, the explanations or definitions in this specification shall prevail.
[0012] The disclosure of this invention includes a circuit design method and an electronic device for executing the circuit design method. Since some components of the electronic device of this invention may be known individually, details of known components will be omitted in the following description without affecting the full disclosure and implementability of the invention. Furthermore, some or all of the circuit design method of this invention may be in the form of software and / or firmware, and may be executed by the electronic device of this invention or its equivalent. Without affecting the full disclosure and implementability of the method invention, the following description of the method invention will focus on the steps rather than the hardware.
[0013] Please refer to Figure 2, which is a functional block diagram of one embodiment of the electronic device of the present invention. The electronic device 200 includes a computing circuit 210 and a memory 220. The electronic device 200 can be a general-purpose computer or a special-purpose computer specifically designed for electronic circuit design. In some embodiments, the computing circuit 210 can be a circuit or electronic component with program execution capability, such as a central processing unit, microprocessor, microprocessor unit, application-specific integrated circuit (ASIC), or equivalent circuits thereof. The computing circuit 210 implements all or part of the functions of the electronic device 200 by executing a plurality of program codes and / or program instructions stored in the memory 220, including but not limited to the following discussion.
[0014] Memory 220 stores circuit placement data 225. Circuit placement data 225 includes an automatic placement and routing (APR) database and a function pattern, and the APR database has not yet performed the conventional power-based cell replacement process.
[0015] Please refer to Figures 3A-3C, which are flowcharts of one embodiment of the circuit design method 300 of the present invention. The circuit design method 300 is used for back-end processing of circuit design, can be executed by the computing circuit 210, and includes the following steps.
[0016] Step S310: Perform voltage drop analysis on the circuit layout based on circuit layout data 225 to obtain a voltage drop analysis diagram. Please refer to Figure 4, which is an embodiment of the voltage drop analysis diagram of the present invention. The diagram shows multiple low voltage drop units C1, multiple medium voltage drop units C2, and multiple high voltage drop units C3. The voltage drop of the low voltage drop unit C1 is less than the voltage drop of the medium voltage drop unit C2, and the voltage drop of the medium voltage drop unit C2 is less than the voltage drop of the high voltage drop unit C3.
[0017] Step S315: Sort the cells according to the voltage drop to generate a candidate list. Please refer to FIG5, which is a schematic diagram of one embodiment of the candidate list 500 of the present invention. In some embodiments, the candidate list 500 is arranged in descending order of voltage drop. That is, cell 410 has the largest voltage drop, followed by cells 420, 430, 440, ..., 450, 460, ..., 470, ...
[0018] In some embodiments, the computing circuit 210 excludes flip-flops and clock units in this step S315. That is, the candidate units in the candidate list 500 are neither flip-flops nor clock units.
[0019] Step S320: Select a candidate cell from the candidate list 500. For example, the computing circuit 210 selects a candidate cell from the candidate list 500 in Figure 5 in a top-down order (from largest to smallest voltage drop).
[0020] Step S325: Perform timing analysis (e.g., static timing analysis, STA) on the candidate cell to obtain the time margin corresponding to the candidate cell. Referring to Figure 4, since cell 410 is located on path 401, the time margin corresponding to cell 410 is the time margin of path 401. The calculation of time margin is well known to those skilled in the art and will not be described in detail here.
[0021] Step S330: Determine if the time margin is greater than 0. If yes, proceed to step S335; otherwise, proceed to step S345. More specifically, the calculation circuit 210 determines whether to replace the candidate cell based on the size of the time margin. If the time margin is less than or equal to 0, the calculation circuit 210 does not replace the candidate cell. If the time margin is greater than 0, the calculation circuit 210 further executes step S335 to determine whether to replace the candidate cell.
[0022] Step S335: determining whether the candidate unit is non-replaceable. In some embodiments, the computing circuit 210 determines whether the candidate unit is in the non-replaceable list. If the candidate unit is in the non-replaceable list (i.e., the determination result of step S335 is yes), step S345 is performed; otherwise, step S337 is performed.
[0023] Step S337: updating the non-replaceable list. More specifically, the computing circuit 210 updates the non-replaceable list by adding all units on the path (e.g., path 401) where the candidate unit (e.g., unit 410) is located to the non-replaceable list. The non-replaceable list will be further described below with reference to FIG. 7, FIG. 8A, FIG. 8B, FIG. 9A and FIG. 9B.
[0024] Step S340: marking the candidate unit as a unit to be replaced. More specifically, the computing circuit 210 adds the unit to be replaced (e.g., unit 410) and the path where it is located (e.g., path 401) to the to-be-replaced list. The to-be-replaced list will be further described below with reference to FIG. 7, FIG. 8A, FIG. 8B, FIG. 9A and FIG. 9B. Step S340 includes sub-step S342 (please refer to FIG. 3C).
[0025] Step S342: determining the threshold voltage of the target unit according to the time slack. In some embodiments, the greater (smaller) the time slack is, the greater (smaller) the threshold voltage of the target unit is. Please refer to FIG. 6, which is a schematic diagram of an embodiment of determining the threshold voltage of a target unit according to the present invention. The candidate unit 610 and the candidate unit 620 are located on a path 601 and a path 602 respectively. Assuming that the time slacks of the path 601 and the path 602 are S1 and S2 respectively, and 0 < S2 < Sth < S1 (Sth is a preset reference value), the computing circuit 210 determines that the target unit of the candidate unit 610 is a high threshold voltage unit, and the target unit of the candidate unit 620 is a medium threshold voltage unit. Directly replacing a candidate unit with sufficient time slack with a high threshold voltage unit (instead of a medium threshold voltage unit) can reduce the number of timing analyses (it should be noted that timing analysis is quite time-consuming). Therefore, step S342 helps save time.
[0026] Step S345: determining whether all candidate units in the candidate list 500 have been processed. If yes, steps S350 to S375 of FIG. 3B are performed; otherwise, step S320 is performed to select a next candidate unit.
[0027] Please refer to Figures 7, 8A, 8B, 9A, and 9B. Figure 7 is another embodiment of the voltage drop analysis diagram of the present invention. Figures 8A and 8B are schematic diagrams of one embodiment of the non-replaceable list 800 of the present invention. Figures 9A and 9B are schematic diagrams of one embodiment of the replaceable list 900 of the present invention. The steps S330 to S340 of Figure 3A will be explained again below using Figures 7, 8A, 8B, 9A, and 9B as examples.
[0028] As shown in Figure 7, in addition to unit 410, path 901 also includes units 910, 920, 930, 940, 950, 960, and 970. In addition to units 420 and 450, path 902 also includes units 410, 940, 950, and 460.
[0029] Assuming the current candidate cell is cell 410, the time margin of path 901 is greater than 0 (yes in step S330), and cell 410 is not in the non-permutable list (no in step S335), then the calculation circuit 210 adds all cells (410, 910~970) on path 901 to the non-permutable list 800 (as shown in Figure 8A) (step S337), and then marks candidate cell 410 as the cell to be permuted (see Figure 9A) (step S340). Because cell 420 in the candidate list 500 has not yet been processed (no in step S345), the calculation circuit 210 then selects cell 420 as the candidate cell (step S320). Referring to Figure 7, assuming the time margin of path 902 where cell 420 is located is greater than 0 (yes in step S330), since cell 420 is not in the non-permutation list 800 of Figure 8A (no in step S335), the calculation circuit 210 adds all cells on path 902 (including but not limited to cell 450) to the non-permutation list 800 (see Figure 8B) (step S337), and then marks candidate cell 420 as the cell to be permuted (see Figure 9B) (step S340). The calculation circuit 210 repeats the above steps until all cells in the candidate list 500 have been processed.
[0030] Please refer to Figure 3B.
[0031] Step S350: Replace all cells to be replaced with target cells. More specifically, in this step, the calculation circuit 210 replaces all cells in the list to be replaced with their respective target cells. For example (see Figure 7), cell 410 (low critical voltage cell) is replaced with a medium critical voltage cell, and cell 420 (low critical voltage cell) is replaced with a high critical voltage cell.
[0032] Step S355: Perform timing analysis on the cells replaced in the previous step to obtain the corresponding time margin.
[0033] Step S360: Restore replaced cells with a time margin less than 0. For example (see Figure 7), if replacing cell 410 with a medium-critical-voltage cell causes the time margin of path 901 to become less than 0, then in this step, calculation circuit 210 restores cell 410 to a low-critical-voltage cell to avoid errors. Conversely, if the time margin of path 901 is greater than or equal to 0, then calculation circuit 210 does not restore cell 410. This step prevents a cell from having a time margin less than 0 after being replaced.
[0034] Step S365: Perform timing analysis on the cells that have been replaced but not restored. Continuing from the previous example (see Figure 7), since cell 420 has been replaced but not restored, the calculation circuit 210 performs timing analysis on cell 420 in this step.
[0035] Step S370: Restore the cell with a time margin less than 0. Continuing with the previous example (see Figure 7), if the time margin of path 902 where cell 420 is located is less than 0, then the calculation circuit 210 restores cell 420 in this step. Conversely, if the time margin of path 902 is greater than or equal to 0, then the calculation circuit 210 does not restore cell 420.
[0036] Step S375: Perform the conventional power-based cell replacement process, that is, replace cells based on power analysis (see Figure 1 and its description).
[0037] Please note that in some embodiments, steps S365 and S370 may be omitted to save time.
[0038] Please note that if the calculation circuit 210 finds that the time margin of all paths is greater than 0 after executing step S355, the calculation circuit 210 will not execute step S360.
[0039] Since those skilled in the art can understand the implementation details and variations of the method invention through the disclosure of the apparatus invention in this case, to avoid redundancy, repeated descriptions are omitted here without affecting the disclosure requirements and implementability of the method invention. Please note that the shapes, sizes, and proportions of the elements in the aforementioned figures are merely illustrative and are intended for those skilled in the art to understand the invention, and are not intended to limit the invention. Furthermore, in some embodiments, the order of the steps mentioned in the aforementioned flowchart may be adjusted according to actual operation, and they may even be performed simultaneously or partially simultaneously.
[0040] Although the embodiments of the present invention have been described above, these embodiments are not intended to limit the present invention. Those skilled in the art can make changes to the technical features of the present invention based on the explicit or implicit content of the present invention. All such changes may fall within the scope of patent protection sought by the present invention. In other words, the scope of patent protection of the present invention shall be determined by the scope of the patent application in this specification.
[0041] 101,401,601,602,901,902: Path Ca: Low-power unit Cb: Medium power consumption unit Cc: High-power unit 200: Electronic devices 210: Computational Circuits 220: Memory 225: Circuit Layout Data 300: Circuit Design Methods S310, S315, S320, S325, S330, S335, S337, S340, S342, S345, S350, S355, S360, S365, S370, S375: Steps 410,420,430,440,450,460,470,610,620,910,920,930,940,950,960,970: Units C1: Low voltage drop unit C2: Medium voltage drop unit C3: High Voltage Drop Unit 500: Candidate List 800: Non-replaceable list 900: List of Products to be Replaced
Claims
1. An electronic device for performing a circuit design method including a power-based cell replacement process, the electronic device comprising: a memory for storing circuit layout data and a plurality of code and / or instructions; and a computing circuit coupled to the memory for executing the code and / or instructions to perform the following steps: performing a voltage drop analysis based on the circuit layout data; sorting the plurality of cells according to the voltage drop to generate a candidate list; selecting a candidate cell from the candidate list; replacing the candidate cell; and performing the power-based cell replacement process.
2. The electronic device as claimed in claim 1, wherein, The computational circuit further performs the following steps: performing a timing analysis on the candidate cell to obtain a time margin corresponding to the candidate cell; and determining whether to replace the candidate cell based on the time margin.
3. The electronic device as claimed in claim 2, wherein, The computing circuit further performs the following steps: When the time margin is greater than a certain value, it determines whether the candidate cell can be replaced according to a list of non-replaceable cells; wherein, when the candidate cell is not in the list of non-replaceable cells, the candidate cell can be replaced.
4. The electronic device as described in claim 3, wherein, The candidate cell is located on a path of the circuit layout data, and there are multiple first cells on the path. The computing circuit further performs the following steps: updating the non-replaceable list by adding the candidate cell and the first cells to the non-replaceable list.
5. The electronic device as claimed in claim 3, wherein, The step of replacing the candidate cell is to replace the candidate cell with a target cell. The computing circuit further performs the following steps: determining a critical voltage of the target cell based on the time margin.
6. The electronic device as claimed in claim 5, wherein, When the time margin is greater than a reference value, the critical voltage is a first critical voltage; when the time margin is less than the reference value, the critical voltage is a second critical voltage, and the first critical voltage is greater than the second critical voltage.
7. The electronic device as claimed in claim 1, wherein, The computational circuit further performs the following steps: after replacing the candidate cell, performing a timing analysis on the replaced cell to obtain a time margin; and when the time margin is less than a certain value, restoring the replaced cell.
8. The electronic device as claimed in claim 1, wherein, The step of selecting the candidate unit from the candidate list is to select the candidate unit in descending order of voltage drop.
9. The electronic device as claimed in claim 1, wherein, The step of replacing the candidate cell is to replace the candidate cell with a target cell, and the first critical voltage of one of the target cells is greater than the second critical voltage of one of the candidate cells.
10. A circuit design method comprising: performing a voltage drop analysis based on a circuit layout; sorting a plurality of cells according to the voltage drop to generate a candidate list; selecting a candidate cell from the candidate list; replacing the candidate cell; and performing a power-based cell replacement process.