Pixel circuit

Abstract

A pixel circuit. The pixel circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a first capacitor. A first end of the first transistor is directly or indirectly coupled to a first power supply voltage, and a second end of the first transistor is coupled to a first node. A first end of the second transistor is coupled to the first node, and a second end of the second transistor is directly or indirectly coupled to a second power supply voltage. The third transistor is coupled between a first reference voltage and a second node. The fourth transistor is coupled between a data voltage and a third node. The fifth transistor is coupled between the first node and the second node. The first capacitor is coupled between the second node and the third node.

Description

Technical Field

[0001] This invention relates to light-emitting diode (LED) pixel circuits, particularly to LED pixel circuits that balance the leakage current at the reverse PN junction after the transistor is turned off. Prior Technology

[0002] Please refer to Figure 1, which illustrates a schematic diagram of a conventional micro-LED pixel circuit. As shown in Figure 1, the conventional micro-LED pixel circuit P10 adopts a 2T1C (two transistors and one capacitor) architecture. The second transistor PM2 of the micro-LED pixel circuit P10 is turned on column by column through the scan line to write the voltage of the data line into the pixel and store it in the capacitor PC1. The first transistor PM1 generates current of different magnitudes to drive the micro-LED. Afterwards, when the second transistor PM2 is turned off, the charge stored in the capacitor PC1 can still maintain the voltage difference between the gate and source terminals of the first transistor PM1, so that the first transistor PM1 continues to generate current, thereby reducing power consumption.

[0003] With the development of technology, users' demands for pixel quality are increasing. Depositing various thin-film transistors (TFTs) on substrates using conventional processes can no longer provide smaller and better resolutions. In this field, products requiring ultra-high resolution (e.g., AR glasses) will instead utilize wafer-based processes.

[0004] However, wafer fabrication processes may encounter leakage current issues. For example, when the second transistor PM2 of the micro-LED pixel circuit P10 shown in Figure 1 is turned off, two leakage current paths may occur. Specifically, referring to Figure 2, firstly, when the second transistor PM2 operates in the subcritical region (not completely off), a bias voltage may exist between the source and drain terminals of the second transistor PM2, forming a subcritical leakage current ISUB (as shown in PL1 in Figure 2); secondly, when the second transistor PM2 is turned off, the reverse bias voltage at the PN junction between its drain and body terminals may be too large, forming a reverse PN junction leakage current IDR (as shown in PL2 in Figure 2).

[0005] Because the pixel area of ​​an ultra-high resolution display panel is extremely small, the maximum capacitance value of the capacitor PC1 that can be placed is approximately 20 fF. Considering transistor leakage current, the capacitor PC1 in a conventional 2T1C circuit will be too small to maintain the voltage value for a full frame time, causing a deviation in the drive current and severely affecting image quality. Furthermore, the aforementioned leakage current problem will result in different leakage current magnitudes depending on the grayscale level, significantly increasing the difficulty of leakage current compensation. Summary of the Invention

[0006] Therefore, the present invention proposes a light-emitting diode pixel circuit with a leakage current balancing mechanism to effectively solve the above-mentioned problems encountered by the prior art.

[0007] A preferred embodiment of the present invention provides a light-emitting diode (LED) pixel circuit. The LED pixel circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a first capacitor. One end of the first transistor is directly or indirectly coupled to a first power supply voltage, and the other end is coupled to a first node. One end of the second transistor is coupled to the first node, and the other end is directly or indirectly coupled to a second power supply voltage. The third transistor is coupled between a first reference voltage and a second node. The fourth transistor is coupled between a data voltage and a third node. The fifth transistor is coupled between the first node and the second node. The first capacitor is coupled between the second node and the third node.

[0008] In one embodiment, during the data writing phase, the first transistor and the second transistor are turned off while the third transistor, the fourth transistor, and the fifth transistor are turned on, the first node and the second node have a first reference voltage and the third node has a data voltage.

[0009] In one embodiment, during the light-emitting stage, the first transistor and the second transistor are turned on while the third transistor, the fourth transistor, and the fifth transistor are turned off, and the second node has a voltage of at least a portion of the first reference voltage plus the first reference voltage minus the data voltage.

[0010] In one embodiment, the light-emitting diode pixel circuit further includes a sixth transistor. The sixth transistor is coupled between a first reference voltage and a third node; wherein, during the light-emitting phase, the third node has the first reference voltage.

[0011] In one embodiment, the light-emitting diode pixel circuit further includes a second capacitor. The second capacitor is coupled between a first reference voltage and a second node; wherein during the light-emitting phase, the voltage of the second node includes at least the voltage division result of the first capacitor and the second capacitor.

[0012] In one embodiment, the first transistor and the fifth transistor are type 1 transistors, and the second transistor, the third transistor and the fourth transistor are type 2 transistors.

[0013] In one embodiment, the body electrodes of the first and fifth transistors are coupled to the operating voltage, and the body electrodes of the second, third, and fourth transistors are coupled to the second reference voltage.

[0014] In one embodiment, the second reference voltage is greater than the first reference voltage.

[0015] In one embodiment, the third transistor is configured such that the leakage current when the third transistor is off is close to or equal to the leakage current when the fifth transistor is off.

[0016] In one embodiment, the leakage current when the third transistor is off is adjusted at least through the second reference voltage coupled to the body electrode of the third transistor.

[0017] Compared to prior art, the LED pixel circuit proposed in this invention can be applied to ultra-high resolution display panels and can be designed using CMOS process technology to adapt to extremely small pixel areas. This improves the drive current offset caused by small capacitance and leakage current in LED pixel circuits in extremely small pixel areas. Furthermore, the leakage current compensation and balancing mechanism of this invention can dynamically adapt to the leakage current magnitude generated by different gray levels. By stabilizing the drive current of the LEDs in the LED pixel circuit, the overall image quality of the display is improved. Simple Explanation of the Diagram

[0018] The accompanying drawings presented in this invention are intended to help describe various embodiments of the invention. However, to simplify the drawings and / or highlight what they are meant to convey, known structures and / or elements may be depicted in a simplified schematic manner or omitted. Furthermore, the number of elements in the drawings may be singular or plural. The accompanying drawings presented in this invention are for illustrative purposes only and are not intended to limit the scope of the invention.

[0019] Figure 1 shows a schematic diagram of a traditional micro-light-emitting diode pixel circuit.

[0020] Figure 2 illustrates the leakage current path of a traditional micro-LED pixel circuit.

[0021] Figure 3 illustrates a circuit diagram of a light-emitting diode pixel circuit in one embodiment of the present invention.

[0022] Figure 4 illustrates a schematic diagram of the light-emitting diode pixel circuit operating during the data writing stage in one embodiment of the present invention.

[0023] Figure 5 illustrates a schematic diagram of the light-emitting diode pixel circuit operating in the light-emitting stage according to an embodiment of the present invention.

[0024] Figure 6 illustrates a circuit diagram of a light-emitting diode pixel circuit in one embodiment of the present invention.

[0025] Figure 7 illustrates a schematic diagram of the leakage current of a light-emitting diode pixel circuit in one embodiment of the present invention.

[0026] Figure 8 illustrates a circuit diagram of a light-emitting diode pixel circuit with a capacitor voltage divider structure in one embodiment of the present invention.

[0027] Figure 9 illustrates a schematic diagram of a light-emitting diode pixel circuit with a capacitor voltage divider structure operating in the light-emitting stage according to an embodiment of the present invention. Implementation

[0028] Any reference to elements referred to herein by names such as "first," "second," etc., does not generally limit the number or order of these elements. Rather, these names are used herein as a convenient way to distinguish two or more elements or instances of elements. Therefore, it should be understood that the names "first," "second," etc., in the claim do not necessarily correspond to the same names in the written description. Furthermore, it should be understood that references to first and second elements do not imply that only two elements can be used or that the first element must precede the second element. The terms "comprising," "including," "having," "containing," etc., as used herein are open-ended, meaning they include but are not limited to.

[0029] The term "connection" is used in this document to refer to a direct or indirect link between two structures. For example, in one example of an indirect connection, one structure may be connected to another structure via a band.

[0030] In this invention, the terms "exemplary" and "for example" are used to mean "serving as an example, instance, or illustration." Any implementation or aspect described herein as "exemplary" or "for example" is not necessarily to be construed as preferred or advantageous over other aspects of the invention. The terms "about" and "approximately" as used herein with respect to specified values ​​or characteristics are intended to mean within a certain value (e.g., 10%) of the specified value or characteristic.

[0031] Please refer to Figure 3, which shows a schematic diagram of the light-emitting diode pixel circuits 100 and 100' in this embodiment.

[0032] As shown in Figure 3, the light-emitting diode pixel circuits 100 and 100' in this embodiment include a first transistor (M1), a second transistor (M2), a third transistor (M3), a fourth transistor (M4), a fifth transistor (M5), and a first capacitor (C1). The first terminal of the first transistor (M1) is directly or indirectly coupled to a first power supply voltage (ELVDD), and the second terminal of the first transistor (M1) is coupled to a first node (A). The first terminal of the second transistor (M2) is coupled to the first node (A), and the second terminal of the second transistor (M2) is directly or indirectly coupled to a second power supply voltage (ELVSS). The third transistor (M3) is coupled between a first reference voltage (V1) and a second node (B). The fourth transistor (M4) is coupled between a data voltage (VDATA) and a third node (C). The fifth transistor (M5) is coupled between the first node (A) and the second node (B). The first capacitor (C1) is coupled between the second node (B) and the third node (C).

[0033] It should be noted that the first transistor (M1), second transistor (M2), third transistor (M3), fourth transistor (M4), and fifth transistor (M5) of the present invention are not limited in type (e.g., P-type or N-type). Therefore, the gate control signals of each of the first transistor (M1), second transistor (M2), third transistor (M3), fourth transistor (M4), and fifth transistor (M5) can be selected according to the type of the first transistor (M1), second transistor (M2), third transistor (M3), fourth transistor (M4), and fifth transistor (M5). In one embodiment, the first transistor (M1) and fifth transistor are type I transistors (e.g., P-type), and the second transistor (M2), third transistor (M3), and fourth transistor (M4) are type II transistors (e.g., N-type). In this embodiment, by distributing the first type of transistor and the second type of transistor, better symmetry can be achieved in the transistor layout, reducing interference between the traces and the transistors during the layout, and effectively reducing the layout difficulty.

[0034] Furthermore, the position of the micro-LED (uLED) in the LED pixel circuits 100 and 100' can be between the first power supply voltage (ELVDD) and the first terminal of the first transistor (M1) (as in LED pixel circuit 100) or between the second terminal of the second transistor (M2) and the second power supply voltage (ELVSS) (as in LED pixel circuit 100'). The micro-LED (uLED) of the present invention can be adjusted depending on the type of the first transistor (M1) and the second transistor (M2).

[0035] For an explanation of the operation of the light-emitting diode pixel circuit 100 (i.e., data writing and light emission), please refer to Figure 4-5.

[0036] As shown in Figure 4, during the data writing phase, the first transistor (M1) and the second transistor (M2) are turned off, while the third transistor (M3), the fourth transistor (M4), and the fifth transistor (M5) are turned on. The first node (A) and the second node (B) have a first reference voltage (V1), and the third node (C) has a data voltage (VDATA). Specifically, during the data writing phase, the data voltage (VDATA) is written to the third node (C) through the fourth transistor (M4). Furthermore, because the third transistor (M3) and the fifth transistor (M5) are turned on, the first reference voltage (V1) can be input to the first node (A) and the second node (B).

[0037] As shown in Figure 5, during the light-emitting stage, the first transistor (M1) and the second transistor (M2) are turned on, while the third transistor (M3), the fourth transistor (M4), and the fifth transistor (M5) are turned off. The second node (B) has a voltage equal to at least a portion of the first reference voltage (V1) plus the first reference voltage (V1) minus the data voltage (VDATA). Specifically, during the light-emitting stage, the voltage difference between the first and second terminals of the first capacitor (C1) is... The voltage difference maintained during the write phase, i.e., the first reference voltage (V1) minus the data voltage (VDATA), is expressed as follows: At this point, for example, by applying a voltage VC to the third node, the data voltage (VDATA) can be coupled to the second node (B) via the first capacitor (C1). Therefore, the voltage of the second node (B) It will be represented as follows: During the light-emitting phase, the voltage of the second node (B) The current of the micro-LED (uLED) in the LED pixel circuit 100 is controlled so that the micro-LED (uLED) emits light and presents various grayscale display effects.

[0038] It should be noted that, in this embodiment, the method of coupling the data voltage (VDATA) to the second node (B) is not limited to applying a voltage to the third node (C). For example, the data voltage can be coupled to the second node by resetting the voltages of the second node (B) and the third node (C). More specifically, the operation of the LED pixel circuit 100 may further include a reset phase. In the reset phase, the voltage of the second node (B) is reset to the first reference voltage (V1), and the voltage of the third node (C) is reset to the reset voltage (VR). In the data writing phase, the third node (C) is written with the data voltage (VDATA). At this time, the data voltage (VDATA) is coupled to the second node (B) through the first capacitor (C1), making the voltage of the second node (B) V1 + VDATA - VR. During the light-emitting phase of the LED pixel circuit 100, the current of the micro LED is controlled by the voltage of the second node (B).

[0039] In one embodiment, during the light-emitting phase of the LED pixel circuit, the third node (C) can be supplied with voltage by a sixth transistor (M6). Specifically, referring to FIG6, FIG6 illustrates that the LED pixel circuit 200 further includes a sixth transistor (M6). The sixth transistor (M6) is coupled between a first reference voltage (V1) and the third node (C); wherein during the light-emitting phase, the third node (C) has the first reference voltage (V1). In this embodiment, the sixth transistor (M6) will be turned on during the light-emitting phase, making the voltage of the third node (C) equal to the first reference voltage (V1). At this time, the voltage of the second node (B) It will be represented as follows: In this embodiment, the LED pixel circuit 200 can control the voltage of the third node (C) during the light-emitting phase via the sixth transistor (M6). The data voltage (VDATA) can be easily coupled to the second node (B) via the sixth transistor (M6) to control the current of the micro LED.

[0040] The discussion of leakage current balance in the light-emitting stage of an LED pixel circuit is shown in Figure 7. Please refer to Figure 7, which illustrates the leakage current model of the LED pixel circuit during the light-emitting stage. During the light-emitting stage, although the third transistor (M3) and the fifth transistor (M5) are turned off, leakage current still occurs when they are turned off. Specifically, the third transistor (M3) has a leakage current between its drain and source (…). ) and leakage current between the body and source ( The fifth transistor (M5) has a leakage current between the drain and source. ) and leakage current between the body and source ( For the second node (B), the leakage current of the third transistor (M3) will be configured to be close to or equal to the leakage current of the fifth transistor (M5), as shown in the following formula: Therefore, the voltage of the second node (B) will not be offset due to the leakage currents of the third transistor (M3) and / or the fifth transistor (M5). In addition, when presenting a high gray scale (e.g., 255 gray scale), the voltage (VB) of the second node (B) is relatively high, reducing the leakage current of the third transistor (M3). At the same time, the voltage (VA) of the first node (A) will also increase correspondingly, reducing the leakage current of the fifth transistor (M5). Similarly, when presenting a low gray scale, the voltage (VB’, VB’<VB) of the second node (B) is relatively low, increasing the leakage current of the third transistor (M3). At the same time, the voltage (VA’, VA’<VA) of the first node (A) will also decrease correspondingly, increasing the leakage current of the fifth transistor (M5). Therefore, the leakage currents of the third transistor (M3) and the fifth transistor (M5) will be dynamically adjusted according to the presentation of different gray scales, making the voltage of the second node (B) dynamically stable.

[0041] In one embodiment, the light-emitting diode pixel circuit may adopt a wafer-based process. An exemplary definition of the wafer-based process is that the transistors are formed on a wafer substrate. In other words, the body electrodes of the transistors are the wafer substrate, but not limited thereto. In this embodiment, the body electrodes of the first transistor (M1) and the fifth transistor (M5) are coupled to the operating voltage, and the body electrodes of the second transistor (M2), the third transistor (M3), and the fourth transistor (M4) are coupled to the second reference voltage (V2). Specifically, the leakage current of the third transistor (M3) can be adjusted by the second reference voltage (V2). In this embodiment, coupling the body electrode of the third transistor (M3) to the second reference voltage (V2) instead of the operating voltage can reduce the reverse junction leakage current formed due to the excessive reverse bias between the body electrode of the third transistor (M3) and other junctions. When performing leakage current balancing, the above configuration can reduce the generation of leakage current. In one embodiment, the second reference voltage (V2) will be configured to be greater than the first reference voltage (V1) to further suppress the generation of leakage current.

[0042] In one embodiment, the light-emitting diode pixel circuit further includes a second capacitor (C2) coupled between the first reference voltage (V1) and the second node (B). Specifically, please refer to FIG. 8. FIG. 8 illustrates a light-emitting diode pixel circuit 300 including the second capacitor (C2). Through the voltage division of the first capacitor (C1) and the second capacitor (C2), the range of the data voltage (VDATA) can be increased, making the gray scale differentiation of the light-emitting diode pixel circuit 300 clearer.

[0043] Specifically, as shown in Figure 9, during the light-emitting phase of the LED pixel circuit 300 including the second capacitor (C2), the first transistor (M1), the second transistor (M2), and the sixth transistor (M6) are turned on, while the third transistor (M3), the fourth transistor (M4), and the fifth transistor (M5) are turned off. The second node (B) has a voltage equal to at least a portion of the first reference voltage (V1) plus the first reference voltage (V1) minus the data voltage (VDATA). Specifically, during the light-emitting phase, the voltage of the second node (B) is... The data voltage (VDATA) and the voltage at the second node (B) can be coupled by voltage division using the first capacitor (C1) and the second capacitor (C2). Represented as follows:

[0044] Compared to previous technologies, the LED pixel circuit 300 has a first capacitor (C1) and a second capacitor (C2) forming a voltage divider architecture, which can increase the range of data voltage (VDATA) and make the grayscale distinction of the LED pixel circuit more obvious.

[0045] In summary, the LED pixel circuit of this invention improves the driving current offset problem caused by insufficient capacitance and leakage current in LED pixel circuits in extremely small pixel areas. Furthermore, the leakage current compensation and balancing mechanism of this invention can dynamically adapt to the leakage current magnitude generated by different gray levels. By stabilizing the driving current of the LEDs in the LED pixel circuit, the overall image quality of the display is improved.

[0046] The prior description of the invention is provided to enable those skilled in the art to make or practice the invention. Various modifications to the invention will be apparent to those skilled in the art, and the general principles defined herein can be applied to other variations or embodiments can be combined with or implemented individually without departing from the spirit or scope of the invention. Therefore, the invention is not intended to be limited to the examples described herein, but is accorded the widest scope consistent with the principles and novel features of the invention herein.

[0047] 100, 100', 200, 300: Light Emitting Diode Pixel Circuit A: First node B: Second node C: Third node C1: First capacitor C2: Second capacitor ELVDD: First power supply voltage ELVSS: Second power supply voltage M1: First transistor M2: Second transistor M3: Third transistor M4: Fourth Transistor M5: Fifth Transistor M6: Sixth Transistor P10: Traditional micro-LED pixel circuit PM1: First Transistor PM2: Second transistor PC1: Capacitor PL1: Appendix Label PL2: Appendix Labels V1: First reference voltage V2: Second reference voltage VDATA: Data Voltage VSS: Operating voltage uLED: Microluminescent Diode LED: Light Emitting Diode

Claims

1. A light-emitting diode (LED) pixel circuit, comprising: a first transistor, one end of which is directly or indirectly coupled to a first power supply voltage, and the other end of which is coupled to a first node; a second transistor, one end of which is coupled to the first node, and the other end of which is directly or indirectly coupled to a second power supply voltage; a third transistor coupled between a first reference voltage and a second node; a fourth transistor coupled between a data voltage and a third node; a fifth transistor coupled between the first node and the second node; and a first capacitor coupled between the second node and the third node.

2. The light-emitting diode pixel circuit as claimed in claim 1, wherein during a data writing phase, the first transistor and the second transistor are turned off and the third transistor, the fourth transistor and the fifth transistor are turned on, the first node and the second node have the first reference voltage and the third node has the data voltage.

3. The light-emitting diode pixel circuit as claimed in claim 1, wherein during a light-emitting phase, the first transistor and the second transistor are turned on and the third transistor, the fourth transistor and the fifth transistor are turned off, and the second node has a voltage of at least a portion of the first reference voltage plus the first reference voltage minus the data voltage.

4. The light-emitting diode pixel circuit as described in claim 1, further comprising: A sixth transistor is coupled between the first reference voltage and the third node; During a light-emitting phase, the third node has the first reference voltage.

5. The light-emitting diode pixel circuit as described in claim 4, further comprising: A second capacitor is coupled between the first reference voltage and the second node; During the light-emitting phase, the voltage of the second node includes at least the voltage division result of the first capacitor and the second capacitor.

6. The light-emitting diode pixel circuit as claimed in claim 1, wherein the first transistor and the fifth transistor are a first type transistor, and the second transistor, the third transistor and the fourth transistor are a second type transistor.

7. The light-emitting diode pixel circuit as claimed in claim 1, wherein the body electrodes of the first transistor and the fifth transistor are coupled to an operating voltage, and the body electrodes of the second transistor, the third transistor and the fourth transistor are coupled to a second reference voltage.

8. The light-emitting diode pixel circuit as claimed in claim 7, wherein the second reference voltage is greater than the first reference voltage.

9. The light-emitting diode pixel circuit as claimed in claim 1, wherein the third transistor is configured such that the leakage current when the third transistor is turned off is close to or equal to the leakage current when the fifth transistor is turned off.

10. The light-emitting diode pixel circuit as claimed in claim 9, wherein the leakage current when the third transistor is off is adjusted at least through a second reference voltage coupled to the body electrode of the third transistor.

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