Semiconductor memory devices

Abstract

A semiconductor memory device is provided that can improve processing speed. An embodiment of a semiconductor memory device includes: a first word line; and a plurality of first memory cells, each having a gate connected to the first word line; and a control circuit. The control circuit is configured to: repeatedly perform a loop operation during a first write operation that writes the plurality of first memory cells to a first state; the loop operation sequentially performs a verification operation and a programming operation; the verification operation confirms a threshold voltage; the programming operation raises the threshold voltage; during the verification operation of the first loop operation, a first sensing operation and a second sensing operation are performed; during the first sensing operation, it is determined whether the threshold voltage of each of the plurality of first memory cells is above a first voltage; during the second sensing operation, it is determined whether each of the plurality of first memory cells is above a second voltage that is higher than the first voltage; during the verification operation of the second loop operation following the first loop operation, the first sensing operation is not performed.

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