Memory system

Abstract

This invention provides a highly reliable semiconductor memory device. The memory system includes a semiconductor memory device and a control device. The semiconductor memory device comprises a plurality of conductive layers, a semiconductor layer, a charge storage layer, and wiring connected to the ends of the semiconductor layers. The control device is configured to instruct the semiconductor memory device on write and erase operations. A plurality of write cycles include a programming operation that supplies a programming voltage to one of the plurality of conductive layers. The programming voltage increases with the number of write cycles executed. A plurality of erase cycles include an operation that supplies an erase voltage to the wiring and an erase verification operation. The semiconductor memory device outputs first data corresponding to the execution result of the erase verification operation to the control device. When performing a write operation, the control device refers to a table and sends second data to the semiconductor memory device representing the initial programming voltage corresponding to the first data in the table.

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