Power converter with low electromagnetic interference and operating method thereof

Abstract

A power converter with low electromagnetic interference and an operating method thereof. The power converter comprises a first bridge arm, two transformers, a secondary side unit, a signal generator, and a frequency adjuster. The transformers are coupled between the first bridge arm and the secondary side unit. The frequency adjuster is coupled to the signal generator. The signal generator provides control signals to a first switch and a second switch of the first bridge arm, respectively. The frequency jitter mechanism is used to operate a switching frequency of the frequency adjuster between a frequency increasing mode and a frequency decreasing mode. The energy concentration of the control signal in a specific frequency band can be reduced to effectively reduce the energy peak of electromagnetic interference in a single frequency band.

Description

[Technical Field]

[0001] This invention relates to a power converter, and more particularly to a power converter with low electromagnetic interference and its operation method. [Previous Technology]

[0002] In order to increase the power density of power supplies, high-frequency switching technology has been used in recent years for power conversion to reduce the size of magnetic components. However, the electromagnetic interference caused by the high-frequency control signal and its harmonics of the switching switch can cause the power supply to fail the electromagnetic interference (EMI) test, thus leading to EMI design challenges.

[0003] Therefore, in order to overcome the shortcomings and deficiencies of the prior art, it is necessary to provide an improved power converter to solve the problems existing in the above-mentioned prior art. [Summary of the Invention]

[0004] The main objective of this invention is to provide a power converter with low electromagnetic interference and its operation method, so as to solve the above-mentioned technical problems.

[0005] To achieve the above objectives, the present invention provides a power converter with low electromagnetic interference, comprising a first bridge arm, two transformers, a primary side unit, a signal generator, and a frequency regulator. The first bridge arm includes a first switch and a second switch, which are connected in series at a first contact. The two primary sides of the two transformers form a primary series winding and are coupled to the first contact. The secondary sides of the two transformers are connected in series to form a primary series winding. The secondary side unit is coupled to the secondary series winding. The signal generator is configured to provide multiple control signals to the first switch and the second switch respectively to control the conduction state and conduction frequency of the switches. At least one of them, the frequency adjuster is configured to output a switching frequency based on an input frequency and a frequency jitter value; wherein the signal generator receives the switching frequency and sets the frequency corresponding to some control signals accordingly based on the switching frequency, and the frequency adjuster is configured to operate between a frequency increasing mode and a frequency decreasing mode, wherein in the frequency increasing mode, the frequency jitter value corresponding to the switching frequency is gradually increased until the frequency jitter value reaches a preset maximum value, and then the frequency decreasing mode is entered; in the frequency decreasing mode, the frequency jitter value corresponding to the switching frequency is gradually decreased until the frequency jitter value reaches a preset minimum value, and then the frequency increasing mode is entered.

[0006] To achieve the above objectives, the present invention provides an operation method for a power converter with low electromagnetic interference, the operation method comprising: preparing a first bridge arm, two transformers, The system comprises a secondary-side unit, a signal generator, and a frequency regulator. Transformers are coupled between the first bridge arm and the secondary-side unit. The frequency regulator is coupled to the signal generator. The frequency regulator is operated between a frequency increment mode and a frequency decrement mode. Based on an input frequency and a frequency jitter value, the frequency regulator outputs a switching frequency. In the frequency increment mode, the frequency jitter value corresponding to the switching frequency is gradually increased until it reaches a preset maximum value, at which point it enters the frequency decrement mode. In the frequency decrement mode, the frequency jitter value corresponding to the switching frequency is gradually decreased until it reaches a preset minimum value, at which point it enters the frequency increment mode. The signal generator receives the switching frequency and sets frequencies corresponding to multiple control signals accordingly. The signal generator provides these control signals to a first switch and a second switch of the first bridge arm to control the conduction state and at least one of the conduction frequencies of the switches.

[0007] As described above, the aforementioned embodiments utilize a frequency jitter mechanism to operate the switching frequency of the frequency regulator between a frequency increase mode and a frequency decrease mode, thereby dispersing the electromagnetic interference signals of the power converter's switching frequency and its multiples at different times across various frequencies, thereby reducing the energy concentration of the control signal within a specific frequency band and effectively reducing the energy peak of electromagnetic interference within a single frequency band.

Implementation Method

[0008] To make the above and other objects, features, and advantages of the present invention more apparent and understandable, embodiments of the present invention will be specifically described below in conjunction with the accompanying drawings. It should be noted that the drawings are simplified schematic diagrams; therefore, only elements and combinations related to the present invention are shown to provide a clearer description of the basic structure or implementation method of the present invention, while the actual elements and layout may be more complex. Furthermore, for ease of explanation, the elements shown in the various drawings of the present invention are not drawn to scale according to the actual number, shape, and size; the detailed scale can be adjusted according to design requirements.

[0009] As the range requirements of electric vehicles continue to increase, the output power of charging modules is also increasing accordingly. Full-bridge converters are selected for use in electric vehicle auxiliary power modules (APMs) to provide high efficiency and high power density, meeting the needs of lightweight electric vehicles and their requirement for efficient operation. Full-bridge converters can adapt to a wide range of input and output voltages, flexibly responding to the varying voltage demands within electric vehicles. Full-bridge converters typically have excellent electrical isolation performance, ensuring the safety and reliability between high-voltage power supplies and low-voltage control circuits. Furthermore, two-transformer full-bridge converters have the capability of soft-switch on the primary side under a full range of loads and do not require additional components such as output inductors.

[0010] Referring to FIG1, a circuit structure diagram of an embodiment of the power converter 100 of the present invention is shown, which includes a dual transformer full-bridge converter. The power converter 100 includes a switching unit 2, a transformer unit 3, a primary side unit 4 and a control unit 5. The detailed structure, connection relationship and operating principle of each component will be described in detail below.

[0011] The switching unit 2 is coupled to the input voltage Vin and includes a first bridge arm and a second bridge arm. The first bridge arm includes a first switch Q1 and a second switch Q2, and the first switch Q1 and the second switch Q2 are connected in series at a first contact P1. The second bridge arm is connected in parallel to the first bridge arm. The second bridge arm includes a third switch Q3 and a fourth switch Q4, and the third switch Q3 and the fourth switch Q4 are connected in series at a second contact P2. In this embodiment, the control unit 5 can be a microprocessor (MCU), digital signal processor (DSP), application special purpose integrated circuit (ASIC), other suitable analog circuits and / or digital circuits, or a combination of software and hardware. The control unit 5 is electrically connected to the first switch Q1, the second switch Q2, the third switch Q3 and the fourth switch Q4 of the switch unit 2, and outputs a first control signal SC1, a second control signal SC2, a third control signal SC3 and a fourth control signal SC4, which are used to control the conduction state of the first switch Q1, the second switch Q2, the third switch Q3 and the fourth switch Q4 to perform power conversion operation. Moreover, the third control signal SC3 and the fourth control signal SC4 are complementary.

[0012] Transformer unit 3 includes two transformers T1 and T2. The primary sides of the two transformers T1 and T2 form a primary series winding, which is coupled between first contacts P1 and P2. The secondary sides of the two transformers T1 and T2 are connected in series at third contact P3 to form a primary series winding. Secondary unit 4 is coupled to the secondary series winding and includes a half-bridge rectifier circuit and an output capacitor Cout. The rectifier circuit is connected in parallel to the secondary series winding of transformer unit 3, and the output capacitor Cout is coupled to the rectifier circuit and the secondary series winding. In this embodiment, the rectifier circuit of secondary unit 4 includes a fifth switch QR1 and a sixth switch QR2 connected in series. The fifth switch QR1 and the sixth switch QR2 are connected to a fourth contact P4, and the output capacitor Cout is electrically connected between the third contact P3 and the fourth contact P4. Control unit 5 is electrically connected to the fifth switch QR1 and the sixth switch QR2 of secondary side unit 4, and outputs a fifth control signal SR1 and a sixth control signal SR2 to control the conduction state of the fifth switch QR1 and the sixth switch QR2 respectively, so as to generate an output voltage Vout across the output capacitor Cout. Transformer unit 3 is represented by the symbol of two transformers in the figure, but transformer unit 3 can be implemented using one or more magnetic elements in combination with winding.

[0013] Each circuit block in Figure 1 can be implemented in a suitable manner according to different design considerations. For example, Figure 2 is a circuit structure diagram of an embodiment of the power converter 100' of the present invention, which includes a two-transformer half-bridge converter. In the implementation of the converter, the switching unit 2' includes a first bridge arm and an input capacitor Cp. The first bridge arm includes a first switch Q1 and a second switch Q2. The first switch Q1 and the second switch Q2 are connected in series at the first contact P1. The input capacitor Cp is coupled to the second switch Q2. The two primary sides of the two transformers T1 and T2 of the transformer unit 3 form a primary series winding, which is coupled between the first contact P1 and the input capacitor Cp. The control unit 5 is electrically connected to the first switch Q1 and the second switch Q2 of the switching unit 2, and outputs a first control signal SC1' and a second control signal SC2' to control the conduction state of the first switch Q1 and the second switch Q2, respectively. The first switch Q1 and the second switch Q2 are complementary in conducting and not conducting to perform power conversion operation. Additionally, Figure 3 is a circuit diagram of an embodiment of the power converter 100'' of the present invention, which includes a dual-transformer half-bridge converter. Figure 3 generally uses the same component names and reference numerals as Figure 2, but the difference between the two is that the switching unit 2'' of the power converter 100'' includes a first capacitor Cin1 and a second capacitor Cin2. The first capacitor Cin1 and the second capacitor Cin2 are connected in series at the second contact P2 and form a capacitor bank. Moreover, the capacitor bank is connected in parallel to the first bridge arm. The two primary sides of the two transformers T1 and T2 of the transformer unit 3 form a primary series winding. Moreover, the primary series winding is coupled between the first contact P1 and the second contact P2. Through the first control signal SC1' and the second control signal SC2' output by the control unit 5, the first switch Q1 and the second switch Q2 are respectively controlled to be turned on and off to perform power conversion operation. In one embodiment, the duty cycles of the first control signal SC1' and the second control signal SC2' are set to be the same, both between 0 and 50%, and have a phase difference of 180 degrees.

[0014] As shown in Figures 1 and 4, Figure 4 is a circuit block diagram of an embodiment of the control unit of Figure 1. The control unit 5 includes a subtractor 51, a voltage controller 52, a control signal generation circuit 500, and a frequency adjuster 54. In this embodiment, the control signal generation circuit 500 includes a signal generator 53, a phase shift adjuster 55, and a complementary signal generator 56. The subtractor 51 is coupled to the voltage controller 52 and configured to receive a feedback voltage Vout_fb and a reference voltage Vout_ref to calculate a voltage error value Error. The feedback voltage Vout_fb is a feedback signal of an output voltage Vout of the secondary unit 4 (for example, using a feedback circuit coupled to the output terminal of 100 and converting the output voltage Vout to a suitable voltage level). The reference voltage Vout_ref is a reference voltage value corresponding to the desired output voltage value to which the output voltage Vout is to be set. For example, when the output voltage Vout is to be set to 48V, the corresponding Vout_ref is 2V. The control unit 5 can adjust the switching states of the switching unit 2 and the secondary side unit 4 to make the output voltage Vout close to 48V, and correspondingly make Vout_fb as close to 2V as possible. The voltage controller 52 is coupled to the signal generator 53, and the voltage controller 52 is configured to generate a control quantity Vc to the signal generator 53 based on the voltage error value Error generated by 51. For example, the voltage controller 52 can use a suitable algorithm such as proportional-integral (PI), proportional-derivative (PD), or proportional-integral-derivative (PID) to generate the control quantity Vc. Signal generator 53 is configured to provide a first control signal SC1, a second control signal SC2, a third control signal SC3, and a fourth control signal SC4 to the corresponding first switch Q1, second switch Q2, third switch Q3, and fourth switch Q4 to control their conduction states (e.g., controlling at least one of the conduction time and conduction frequency of these switches). In this embodiment, the control signals are pulse width modulation (PWM) signals, and the output voltage Vout is set accordingly by controlling the phase shift between Q1 and Q4 and the phase shift between Q3 and Q2. Frequency adjuster 54 is configured to output a switching frequency Fref' based on an input frequency Fref and a frequency jitter value. Control signal generation circuit 500 generates control signals SC1-SC4 according to Vc and Fref'. The signal generator 53 generates a ramp signal Sramp of the corresponding frequency according to the switching frequency Fref'. Sramp generates a phase shift ramp signal Sramp1 through the phase shift adjuster 55. The two comparator circuits compare Sramp and Sramp1 with the appropriate preset voltage value Vref respectively. After passing through the inverting circuit, the required duty cycle, phase shift amount and frequency of the PWM signal are generated as the control signals SC1-SC4.

[0015] In this embodiment, the frequency adjuster 54 includes a frequency jitter 541 and a comparator 542. The frequency jitter 541 is coupled to the comparator 542, and the frequency jitter 541 is configured to output a frequency jitter value. The comparator 542 is configured to calculate the sum of the input frequency Fref and the frequency jitter value, and output a switching frequency ', the equation of which is: , where is the input frequency, ' is the output switching frequency, and is the frequency jitter value. In a frequency increment mode, the frequency jitter value of the switching frequency increases. The operation method is to first send the preset input frequency to comparator 542, and sum it with the frequency jitter value to output the switching frequency '. The output switching frequency ' is then sent to comparator 542 as the next input frequency, and summed with the increasing frequency jitter value to output an updated switching frequency ', so as to achieve the effect of gradually increasing the switching frequency '. In a frequency decrement mode, the frequency jitter value of the switching frequency decreases. The operation method is to first send the preset input frequency to comparator 542, and sum it with the frequency jitter value to output the switching frequency '. The output switching frequency ' is then sent to comparator 542 as the next input frequency, and summed with the decreasing frequency jitter value to output an updated switching frequency ', so as to achieve the effect of gradually decreasing the switching frequency '. The frequency adjuster 54 can set the switching frequency Fref' to a frequency increase mode or a frequency decrease mode, so that the switching frequency of the control signals SC1, SC2, SC3 and SC4 provided by the signal generator 53 increases and decreases between a minimum threshold value and a maximum threshold value.

[0016] Figure 5 is a timing diagram of an embodiment of the control signals SC1-SC4 in Figure 4, wherein the control unit 5 sets the control signals SC1 and SC2 to be complementary, and the control signals SC3 and SC4 to be complementary, and the phase shift of the control signals SC1 and SC4 is equal to the phase shift of the control signals SC3 and SC2. In the first time interval of Figure 5, the control unit 5 sets the switching frequencies of control signals SC1, SC2, SC3, and SC4 to a frequency decreasing mode. Period t1 corresponds to switching frequency 1 / f1, and period t2 corresponds to switching frequency 1 / f2. In the frequency decreasing mode, period t1 < period t2, indicating that switching frequency f1 > switching frequency f2, meaning the switching frequency is decreasing, and the phase shift is increasing, such as phase shift ps1 < phase shift ps2. In the second time interval of Figure 5, the control unit 5 sets the switching frequencies of control signals SC1, SC2, SC3, and SC4 to a frequency increasing mode. Period t3 corresponds to switching frequency 1 / f3, and period t4 corresponds to switching frequency 1 / f3. In the frequency increasing mode, period t3 > period t4, indicating that switching frequency f3 < switching frequency f4, meaning the switching frequency is increasing, and the phase shift is decreasing, such as phase shift ps3 > phase shift ps4. In the third time interval of Figure 5, the switching frequency is switched to the frequency decreasing mode, similar to the first time interval. In this embodiment, the control unit 5 sets the switching frequency of these control signals to a range of 200 kHz to 300 kHz. For example, when the value is 250 kHz, -50 kHz, and 50 kHz, the switching frequency range is 200 kHz to 300 kHz.

[0017] In another embodiment, the control unit 5 sets control signals SC1 and SC2 to be complementary, and control signals SC3 and SC4 to be complementary, with the phase shift of control signals SC1 and SC4 being equal to the phase shift of control signals SC3 and SC2. When the control unit 5 sets the switching frequencies of control signals SC1, SC2, SC3, and SC4 to alternately operate in frequency decreasing mode and frequency increasing mode, and when operating in either frequency decreasing or frequency increasing mode, the control unit 5 maintains the phase shift of control signals SC1 and SC4 and the phase shift of control signals SC3 and SC2 at the same level, without changing with frequency increasing or decreasing, thereby further simplifying the control complexity. Although the output voltage of the power converter may generate some noise in this embodiment, for applications with lower requirements for output voltage noise but requiring reduced control complexity and electromagnetic interference, the alternating operation of frequency decreasing and frequency increasing modes in this embodiment still provides beneficial technical effects.

[0018] In one embodiment, when the frequency jitter value generated by the frequency jitter 541 gradually increases, the frequency adjuster 54 operates in a frequency increasing mode until the frequency jitter value reaches a preset maximum value (e.g., 50 kHz). When the frequency jitter value generated by the frequency jitter 541 gradually decreases, the frequency adjuster 54 operates in a frequency decreasing mode until the frequency jitter value reaches a preset minimum value (e.g., -50 kHz). By alternately operating the frequency adjuster 54 in the frequency increasing mode and the frequency decreasing mode, the switching frequency of the switching unit (2, 2', 2'') and its harmonic electromagnetic interference signals can be dispersed across different frequencies at different times, thereby reducing the energy concentration of the control signals SC1-SC4 in specific frequency bands and effectively reducing the energy peak of electromagnetic interference in a single frequency band.

[0019] Figure 6 is a circuit block diagram of an embodiment of the control unit 5' of Figure 2 or Figure 3. The control unit 5' includes a subtractor 51, a voltage controller 52, a signal generator 53', and a frequency adjuster 54. The subtractor 51 is coupled to the voltage controller 52 and configured to receive a feedback voltage Vout_fb and a reference voltage Vout_ref to calculate a voltage error value Error. The feedback voltage Vout_fb is a feedback signal of an output voltage Vout of the secondary side unit 4. The voltage controller 52 is coupled to the signal generator 53' and is configured to generate a control quantity Vc to the signal generator 53' based on the voltage error value Error generated by 51. The signal generator 53' is configured to provide a first control signal SC1' and a second control signal SC2' to the corresponding first switch Q1 and second switch Q2 to control at least one of the conduction time and conduction frequency of the first switch Q1 and the second switch Q2.

[0020] Figure 7 is a timing diagram of an embodiment of the control signals SC1'-SC2' in Figure 6. The control unit 5' sets the phase difference between control signals SC1' and SC2' to 180 degrees, and the signal generator 53 generates a PWM signal with the required duty cycle as the control signals SC1'-SC2'. Furthermore, the frequency adjuster 54 can determine whether the switching frequency is in a frequency increasing mode or a frequency decreasing mode, causing the switching frequencies of the control signals SC1' and SC2' provided by the signal generator 53 to repeatedly increase and decrease between a minimum threshold and a maximum threshold. In the first time interval of Figure 7, the control unit 5' sets the switching frequencies of the control signals SC1' and SC2' to be in a frequency decreasing mode, where period t1 corresponds to the switching frequency 1 / f1, and period t2 corresponds to the switching frequency 1 / f2. In the frequency decreasing mode, period t1 < period t2, which indicates that the switching frequency f1 > the switching frequency f2, i.e., the switching frequency is decreasing. In the second time interval of Figure 7, control unit 5' sets the switching frequency of control signals SC1' and SC2' to a frequency increasing mode, where period t3 corresponds to switching frequency 1 / f3. In the frequency increasing mode, period t3 > period t4, which means that switching frequency f3 < switching frequency f4, i.e., the switching frequency is increasing. In the third time interval of Figure 7, control unit 5' sets the switching frequency of control signals SC1' and SC2' to a frequency decreasing mode.

[0021] According to an embodiment of the power converter of the present invention described above, a method for operating a power converter with low electromagnetic interference is provided, comprising a first bridge arm as described in the above embodiment, two transformers T1 and T2, a primary side unit, a signal generator 53, and a frequency adjuster 54. The frequency adjuster 54 is then operated between a frequency increment mode and a frequency decrement mode, such that the frequency adjuster 54 outputs a switching frequency Fref' according to the input frequency Fref and the frequency jitter value. In the frequency increment mode, the frequency jitter value generated by the frequency jitterer 541 gradually increases, and the frequency adjuster 54 operates in the frequency increment mode until the frequency jitter value reaches a preset maximum value (e.g., 50 kHz), at which point it enters the frequency decrement mode; in the frequency decrement mode, the frequency jitter value generated by the frequency jitterer 541 gradually decreases, and the frequency adjuster 54 operates in the frequency decrement mode until the frequency jitter value reaches a preset minimum value (e.g., -50 kHz), at which point it enters the frequency increment mode. Next, the signal generator 53 receives the switching frequency and sets the frequencies corresponding to multiple control signals SC1-SC4 accordingly. The signal generator 53 provides these control signals SC1-SC4 to the corresponding switches Q1-Q4, or provides these control signals SC1' and SC2' to the corresponding switches Q1 and Q2, so as to control at least one of the conduction states and conduction frequencies of these switches.

[0022] As described above, by setting the control units 5 and 5', the frequency jitter mechanism is used to operate the switching frequency of the frequency adjuster 54 between the frequency increasing mode and the frequency decreasing mode, so that the switching frequency of the power converter is varied within a certain frequency range. This can disperse the electromagnetic interference signals of the switching frequency and its multiples at different times to various frequencies, thereby reducing the energy concentration of the control signal in a specific frequency band and effectively reducing the energy peak of electromagnetic interference in a single frequency band.

[0023] Although the present invention has been disclosed by way of embodiments, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims. [Simplified Explanation of the Diagram]

[0024] Figure 1 is a circuit structure diagram of an embodiment of the power converter of the present invention.

[0025] Figure 2 is a circuit structure diagram of another embodiment of the power converter of the present invention.

[0026] Figure 3 is a circuit structure diagram of another embodiment of the power converter of the present invention.

[0027] Figure 4 is a circuit block diagram of an embodiment of the control unit of Figure 1.

[0028] Figure 5 is a timing diagram of an embodiment of the control signal in Figure 4.

[0029] Figure 6 is a circuit block diagram of an embodiment of the control unit of Figure 2 or Figure 3.

[0030] Figure 7 is a timing diagram of an embodiment of the control signal in Figure 6.

Claims

1. A power converter with low electromagnetic interference, comprising: a first bridge arm including a first switch and a second switch, the first switch and the second switch being connected in series at a first contact; two transformers, the two primary sides of the two transformers forming a primary series winding coupled to the first contact, the secondary sides of the two transformers being connected in series to form a primary series winding; a primary side unit coupled to the secondary series winding; a signal generator configured to provide a plurality of control signals to the first switch and the second switch respectively to control at least one of the conduction states and conduction frequencies of the switches; and a frequency adjuster configured to output a switching frequency accordingly based on an input frequency and a frequency jitter value; The signal generator receives the switching frequency and sets the corresponding frequencies of the control signals accordingly. The frequency adjuster is configured to operate between a frequency increasing mode and a frequency decreasing mode. In the frequency increasing mode, the frequency jitter value corresponding to the switching frequency is gradually increased until the frequency jitter value reaches a preset maximum value, at which point the frequency adjuster enters the frequency decreasing mode. In the frequency decreasing mode, the frequency jitter value corresponding to the switching frequency is gradually decreased until the frequency jitter value reaches a preset minimum value, at which point the frequency increasing mode enters the frequency increasing mode.

2. The power converter with low electromagnetic interference as described in claim 1, wherein the power converter further includes a second bridge arm connected in parallel to the first bridge arm, the second bridge arm including a third switch and a fourth switch, the third switch and the fourth switch being connected in series at a second contact, and the primary series winding being coupled between the first contact and the second contact.

3. The power converter with low electromagnetic interference as described in claim 2, wherein the signal generator generates a first control signal, a second control signal, a third control signal and a fourth control signal for controlling the first switch, the second switch, the third switch and the fourth switch, respectively, and the first control signal is complementary to the second control signal, and the third control signal is complementary to the fourth control signal.

4. The power converter with low electromagnetic interference as described in claim 1, wherein the power converter further includes an input capacitor coupled to the second switch, and the primary series winding is coupled between the first contact and the input capacitor.

5. The power converter with low electromagnetic interference as described in claim 1, wherein the power converter includes a first capacitor and a second capacitor, the first capacitor and the second capacitor being connected in series at a second contact to form a capacitor bank, the capacitor bank being connected in parallel to the first bridge arm, and the primary series winding being coupled between the first contact and the second contact.

6. The power converter with low electromagnetic interference as described in claim 1, wherein the power converter further includes a voltage controller coupled to the signal generator, the voltage controller being configured to generate a control quantity to the signal generator.

7. The power converter with low electromagnetic interference as described in claim 6, wherein the power converter further includes a subtractor coupled to the voltage controller and configured to receive a feedback voltage and a reference voltage to calculate an error value, the feedback voltage being a feedback of an output voltage of the secondary-side unit, and the reference voltage being a reference voltage value of the output voltage.

8. A power converter with low electromagnetic interference as claimed in claim 1, wherein the frequency regulator includes a frequency jitter and a comparator, the frequency jitter being coupled to the comparator and the frequency jitter being configured to output a frequency jitter value, and the comparator being configured to calculate the sum of all switching frequencies output from the frequency regulator and the frequency jitter value.

9. A power converter with low electromagnetic interference as claimed in claim 1, wherein the secondary-side unit includes a half-bridge rectifier circuit and an output capacitor coupled to the rectifier circuit and for coupling to a load.

10. A method of operating a power converter with low electromagnetic interference, the method comprising: providing a first bridge arm, two transformers, a secondary side unit, a signal generator, and a frequency regulator, the transformers being coupled between the first bridge arm and the secondary side unit, and the frequency regulator being coupled to the signal generator; operating the frequency regulator between a frequency increment mode and a frequency decrement mode, such that the frequency regulator outputs a switching frequency according to an input frequency and a frequency jitter value; in the frequency increment mode, gradually increasing the frequency jitter value corresponding to the switching frequency until the frequency jitter value reaches a preset maximum value, then entering the frequency decrement mode; in the frequency decrement mode, gradually decreasing the frequency jitter value corresponding to the switching frequency until the frequency jitter value reaches a preset minimum value, then entering the frequency increment mode; The signal generator receives the switching frequency and sets the frequencies corresponding to multiple control signals accordingly; and the signal generator provides the control signals to a first switch and a second switch of the first bridge arm to control at least one of the conduction states and conduction frequencies of the switches.

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