Semiconductor device
Patent Information
- Application Number
- TW114107785
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-03-04
- Publication Date
- 2026-09-16
- Estimated Expiration
- 2045-03-03
Smart Images
Figure TWG2TA001075509_001 
Figure TWG2TA001075509_002 
Figure TWG2TA001075509_003
Abstract
Claims
1. A semiconductor element, comprising: An epitaxial layer has a first conductivity type; A substrate region is disposed in the epitaxial layer and has a second conductivity type different from the first conductivity type; a gate is disposed on the epitaxial layer and overlaps the substrate region; a drain doped region is disposed on one side of the gate, laterally separated from the substrate region, and has the first conductivity type; at least two source doped regions, in a top view, the at least two source doped regions extend along a first direction; and a substrate contact region is disposed in the substrate region and on the other side of the gate, adjacent to the at least two source doped regions, and has the second conductivity type, wherein the substrate contact region includes: at least two end blocks, wherein, in a top view, the at least two source doped regions are disposed between the at least two end blocks along the first direction; and at least one connecting block, wherein, in a top view, the at least one connecting block is disposed between the at least two source doped regions along a second direction different from the first direction.
2. The semiconductor element as claimed in claim 1, wherein, In a top view, the at least one connecting block extends along the first direction and is adjacent to the at least two end blocks.
3. The semiconductor element as claimed in claim 2, wherein, In a top view, the aspect ratio of the at least one connecting block is 3 to 20.
4. The semiconductor device as claimed in claim 1, wherein the at least two end blocks and the at least one connection block are in direct contact with the substrate region.
5. The semiconductor device of claim 1, wherein the at least two end blocks and the at least one connection block are doped regions, and the doping concentration of the at least two end blocks and the at least one connection block is higher than the doping concentration of the substrate region.
6. The semiconductor element as claimed in claim 1, wherein, In a cross-sectional view, the bottom surface of each of the at least two end blocks is lower than the bottom surface of the at least one connecting block.
7. The semiconductor element as claimed in claim 1, wherein, In a cross-sectional view, the bottom surface of each of the at least two source doped regions is lower than the bottom surface of the at least one connection block.
8. The semiconductor element as claimed in claim 1, wherein, The substrate contact area further includes at least one intermediate block disposed in the substrate area, wherein, in a top view, the at least one intermediate block is disposed between the at least two end blocks along the first direction and has the second conductivity type.
9. The semiconductor element as claimed in claim 8, wherein, In a top view, the at least one intermediate block includes two intermediate blocks that are laterally separated from each other and laterally separated from the at least two end blocks.
10. The semiconductor element as claimed in claim 1 or 8, further comprising a first doped block having the first conductivity type, wherein the first doped block extends along the first direction and both ends of the first doped block are respectively adjacent to the at least two end blocks.
11. The semiconductor element as claimed in claim 8, wherein, In a top view, the aspect ratio of the at least one intermediate block is 1 to 5.
12. The semiconductor element of claim 1, wherein one of the at least two end blocks includes two sub-end blocks, and the semiconductor element further includes a second doped block having the first conductivity type disposed between the two sub-end blocks.
13. The semiconductor element as claimed in claim 12, wherein, In a top view, the second doped block is adjacent to the at least one connecting block, and along the second direction, the width of the second doped block is equal to the width of the at least one connecting block.
14. The semiconductor element as claimed in claim 12, wherein, In a top view, the second doped block is adjacent to the at least one connecting block, and along the second direction, the width of the second doped block is smaller than the width of the at least one connecting block.
15. The semiconductor element as claimed in claim 12, wherein, The substrate contact region further includes a plurality of intermediate blocks arranged along the second direction and laterally separated from the at least two end blocks. The semiconductor element further includes a third doped block having the first conductivity type, disposed between the intermediate blocks, and the opposite sides of the third doped block are respectively adjacent to the intermediate blocks.
16. The semiconductor element as claimed in claim 15, wherein, In a top view, along the second direction, the width of the third doped block is equal to the width of the at least one connecting block.
17. The semiconductor element as claimed in claim 15, wherein, In a top view, along the second direction, the width of the third doped block is smaller than the width of the at least one connecting block.