Semiconductor device

Abstract

Disclosed is a semiconductor device including a substrate, a lower channel pattern on a surface of the substrate, an upper channel pattern on the lower channel pattern, a gate structure extending around the lower channel pattern and the upper channel pattern, lower source / drain patterns on sidewalls of the lower channel pattern, upper source / drain patterns on sidewalls of the upper channel pattern, a connection electrode electrically connecting a first upper source / drain pattern to a first lower source / drain pattern, and a protection pattern between the gate structure and the connection electrode, in which the protection pattern includes a first protection pattern and a second protection pattern on the first protection pattern and including an insulating material having a dielectric constant less than a dielectric constant of the first protection pattern.

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