Semiconductor device and methods of formation
TW202638797APending Publication Date: 2026-09-16TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information
- Application Number
- TW114116377
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-03-13
- Filing Date
- 2025-04-30
- Publication Date
- 2026-09-16
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Abstract
An electrostatic discharge (ESD) protection circuit includes a high voltage high-electron-mobility transistor (HEMT) and a plurality of capacitors interconnected with each other in a stacked arrangement. The stacked arrangement of capacitors is connected between a positive supply voltage (VDD) and the gate of the HEMT.A resistor is connected between a negative supply voltage (VSS) and the gate of the HEMT and is connected in series with the stacked capacitor arrangement. During normal operation, the capacitors in the stack are open, and the gate is connected to VSS. When there is an ESD event, the capacitors in the stack are shorted, and the gate is connected to VDD so that the gate of the HEMT receives a voltage corresponding to an ESD event as an input voltage. As a result, the high voltage HEMT may be turned on to conduct and dissipate ESD current.
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