Manufacturing method of semiconductor device
Patent Information
- Application Number
- TW114107903
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-03-04
- Publication Date
- 2026-09-16
- Estimated Expiration
- 2045-03-03
AI Technical Summary
The removal of temporary carriers in semiconductor manufacturing causes significant warpage, affecting subsequent processes and reducing product yield.
A method involving an adhesive film that provides an inward pulling force to the semiconductor structure, using a bonding process to elastically control warpage, followed by removal through a peeling portion, which can be assisted by light irradiation or heat treatment.
The method effectively reduces warpage, allowing subsequent processes to proceed smoothly and improves product yield by ensuring the semiconductor structure shrinks under reverse stress.
Smart Images

Figure TWG2TA001075533_001 
Figure TWG2TA001075533_002 
Figure TWG2TA001075533_003
Abstract
Description
Technical Field
[0001] This invention relates to a method for manufacturing a semiconductor device. Prior Technology
[0002] In the semiconductor structure manufacturing process, temporary carriers are often used in steps such as forming redistribution layers to provide the necessary support and other functions. These temporary carriers are removed after the molding layer is formed. However, removing these temporary carriers often causes significant warpage, which can adversely affect subsequent processes and thus reduce product yield. Summary of the Invention
[0003] This invention provides an effective way to improve the warpage problem of semiconductor structures, thereby increasing product yield.
[0004] A method for manufacturing a semiconductor device according to the present invention includes at least the following steps: Providing a semiconductor structure. The semiconductor structure includes a redistribution layer, a wafer, and a molding layer. The redistribution layer has opposing first and second surfaces. The wafer is disposed on the first surface. The wafer is electrically connected to the redistribution layer. The molding layer encapsulates the wafer. Performing a bonding process to bring an adhesive film into direct contact with the molding layer of the semiconductor structure. The adhesive film is used to provide an inward pulling force on the semiconductor structure. Removing the adhesive film.
[0005] In one embodiment of the present invention, the adhesive film includes a balancing portion and a peeling portion, the peeling portion being disposed between the semiconductor structure and the balancing portion, and the adhesive film being removed through the peeling portion.
[0006] In one embodiment of the present invention, a plurality of external terminals are formed on the second surface before the adhesive film is removed by the peeling portion described above.
[0007] In one embodiment of the present invention, the stripping portion is separated from the semiconductor structure by performing a light irradiation process.
[0008] In one embodiment of the present invention, the wavelength range of the light irradiation process described above is between 200 nanometers and 420 nanometers.
[0009] In one embodiment of the present invention, before performing the above-described bonding process, at least one axial tension is provided to the adhesive film to provide tension after the bonding process is performed.
[0010] In one embodiment of the present invention, the balance portion of the adhesive film is composed of a first substrate and a first adhesive layer, the first adhesive layer is disposed between the peeling portion and the first substrate, and the material of the first substrate includes polyimide.
[0011] In one embodiment of the present invention, the balance portion of the adhesive film includes a control layer, the coefficient of thermal expansion of the control layer being between 20ppm / °C and 300ppm / °C, and a heating process is performed after the bonding process.
[0012] In one embodiment of the present invention, the balancing portion of the adhesive film is composed of a second adhesive layer and a regulating layer, wherein the second adhesive layer is disposed between the regulating layer and the peeling portion.
[0013] In one embodiment of the present invention, the balancing portion of the adhesive film is composed of a substrate, an adhesive layer and a regulating layer, the third adhesive layer is disposed between the peeling portion and the second substrate, and the second substrate is disposed between the third adhesive layer and the regulating layer.
[0014] Based on the above, the present invention can elastically control the warpage state of the semiconductor structure by continuously providing tension after the adhesive film is directly bonded to the molding layer of the semiconductor structure. This allows the warped semiconductor structure to shrink under a reverse stress, thereby effectively improving the warpage problem of the semiconductor structure, enabling subsequent processes to proceed smoothly, and thus improving the product yield.
[0015] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings for detailed explanation. Simple Explanation of the Diagram
[0016] Figure 1 is a flowchart of a method for manufacturing a semiconductor device according to some embodiments of the present invention. Figures 2A and 2B are partial schematic diagrams of a method for manufacturing a semiconductor device according to some embodiments of the present invention. Figure 3 is a schematic diagram of the control process of the film and semiconductor structure according to some embodiments of the present invention. Figure 4 is a schematic diagram of the film and semiconductor structure after adjustment according to some embodiments of the present invention. Figure 5 is a schematic diagram of an intermediate stage of a method for manufacturing a semiconductor device according to some embodiments of the present invention. Figure 6 is a cross-sectional schematic diagram of the adhesive film used in one embodiment of Figure 5. Figure 7 is a schematic diagram of an intermediate stage of a method for manufacturing a semiconductor device according to some embodiments of the present invention. Figure 8 is a cross-sectional schematic diagram of the adhesive film used in one embodiment of Figure 7. Figure 9 is a cross-sectional schematic diagram of the adhesive film used in another embodiment of Figure 7. Figure 10 is a top view of an actual test conducted according to the embodiment. Figure 11 is a side view showing the change in warping before and after the heating process according to the embodiment. Figures 12A and 12B are partial schematic diagrams of a method for manufacturing a semiconductor device according to some embodiments of the present invention. Figure 13 is a cross-sectional schematic diagram of the peeling portion of the adhesive film used in one embodiment of Figures 12A and 12B. Implementation
[0017] The invention is described more fully with reference to the drawings of this embodiment. However, the invention may be embodied in various different forms and should not be limited to the embodiments described herein. The thickness, dimensions, or size of layers or regions in the drawings are enlarged for clarity. The same or similar reference numerals denote the same or similar elements, which will not be described again in the following paragraphs.
[0018] Unless otherwise stated, the term "between" used in this specification to define numerical ranges is intended to cover the range equal to and between the endpoint values. For example, a size range between a first value and a second value means that the size range can cover the first value, the second value, and any value between the first value and the second value.
[0019] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.
[0020] Figure 1 is a flowchart of a method for manufacturing a semiconductor device according to some embodiments of the present invention. Figures 2A and 2B are partial schematic diagrams of a method for manufacturing a semiconductor device according to some embodiments of the present invention. Figure 3 is a schematic diagram of the adjustment process of the film and semiconductor structure according to some embodiments of the present invention. Figure 4 is a schematic diagram of the film and semiconductor structure after adjustment according to some embodiments of the present invention. It should be noted that, for clarity, no warping state change is shown in Figures 2A and 2B; the corresponding warping state change can be shown in Figures 3 and 4.
[0021] Please refer to Figures 1 to 4, corresponding to step S1, to provide a semiconductor structure 100. For example, the semiconductor structure 100 includes a redistribution layer (RDL) 110 having a first surface 110a and a second surface 110b, a wafer 120 disposed on the first surface 110a, and a molding layer 130 encapsulating the wafer 120, wherein the wafer 120 is electrically connected to the redistribution layer 110. Here, the semiconductor structure 100 can be a wafer-level package (FOWLP) or a panel-level package (FOPLP).
[0022] In one embodiment, the semiconductor structure 100 is formed by the following steps. For example, firstly, multiple conductive layers 112 and multiple insulating layers 114 surrounding the conductive layers 112 are alternately deposited on a temporary substrate (such as glass, not shown) to form a redistribution layer 110. The conductive layers 112 can be formed using suitable conductive materials via physical vapor deposition (PVD), chemical vapor deposition (CVD), electroplating, sputtering, or other suitable deposition processes. The insulating layers 114 can be formed using suitable insulating materials via physical vapor deposition, chemical vapor deposition, spin coating, or other suitable deposition processes. Next, one or more wafers 120 are bonded to the redistribution layer 110, and an underfill material 122 is formed in the gap between the wafers 120 and the redistribution layer 110 to protect the junctions 124 between the wafers 120 and the redistribution layer 110. Then, a molding layer 130 is formed to encapsulate the wafers 120 on the redistribution layer 110. After these steps, the temporary carrier board can be removed to expose the second surface 110b of the rewiring layer 110.
[0023] For example, due to the mismatch in the coefficients of thermal expansion between the molding layer 130 and the redistribution layer 110, significant warping may occur during the manufacturing process due to the high-temperature process (e.g., the middle part of the semiconductor structure 100 may be concave, presenting a smiling face shape), affecting the product production yield. The material of the molding layer 130 includes epoxy resin (EMC), silicone resin (SMC), or other molding materials suitable for molding processes.
[0024] Next, to improve the warpage problem of the aforementioned semiconductor structure 100, corresponding to step S2, a bonding process is performed so that the adhesive film 150 directly contacts the molding layer 130 of the semiconductor structure 100. The adhesive film 150 provides an inward pulling force P on the semiconductor structure 100, as shown in Figure 3. Accordingly, as shown in Figure 4, the continuous pulling force P provided by the adhesive film 150 after bonding to the semiconductor structure 100 can elastically control the warpage state of the semiconductor structure 100, causing the warped semiconductor structure 100 to shrink under a reverse stress. This effectively improves the warpage problem of the semiconductor structure 100, allowing subsequent processes (such as dry etching, wet etching, ball mounting, reflow, flux cleaning, or similar processes) to proceed smoothly, thereby improving product yield. Furthermore, after balancing the warpage, corresponding to step S3, the adhesive film 150 can be removed in a suitable manner. Here, the timing of removal can be determined according to the specific design of the adhesive film 150. For example, in this embodiment, as shown in Figures 2A and 2B, the adhesive film 150 can be removed before the plurality of external terminals 140 are formed on the second surface 110b. In this way, the adhesive film 150 does not need to undergo high-temperature processes such as reflow soldering, and therefore it does not need to use materials with excellent heat resistance. However, the present invention is not limited to this.
[0025] It should be noted that although Figure 4 shows the semiconductor structure 100 shrinking to a near-horizontal state, this is not intended to limit the invention. The degree of shrinkage of the semiconductor structure 100 can be determined according to actual conditions, as long as it receives a tensile force P opposite to the warping, it falls within the scope of protection of the invention. Furthermore, Figures 2A and 2B are merely illustrative examples. The invention does not limit the specific details (such as materials or formation methods) of the conventional components (such as the redistribution layer 110, wafer 120, molding layer 130, external terminals 140, or other suitable components not shown) in the semiconductor structure 100. The arrangement of these components in the figures is also merely illustrative. That is, the redistribution layer 110, wafer 120, molding layer 130, external terminals 140, and their arrangement can be selected according to actual product requirements, as long as the semiconductor structure 100 causes the aforementioned warping problem, it falls within the scope of protection of the invention.
[0026] Figure 5 is a schematic diagram of an intermediate stage in a method for manufacturing a semiconductor device according to some embodiments of the present invention. Figure 6 is a cross-sectional schematic diagram of the adhesive film used in one embodiment of Figure 5. Figure 7 is a schematic diagram of an intermediate stage in a method for manufacturing a semiconductor device according to some embodiments of the present invention. Figure 8 is a cross-sectional schematic diagram of the adhesive film used in one embodiment of Figure 7. Figure 9 is a cross-sectional schematic diagram of the adhesive film used in another embodiment of Figure 7.
[0027] The following figures 5 to 9 will show specific embodiments of intermediate stages in the manufacturing methods of various semiconductor devices. However, these are not intended to limit the present invention. Any tensile force exerted by the adhesive film on the semiconductor structure is within the scope of protection of the present invention. Figures 5 and 6 are used to illustrate specific embodiments of generating an inward tensile force P on the semiconductor structure 100 through the introduction of external force and the adhesive film used in conjunction with it. Figures 7 to 9 are used to illustrate specific embodiments of generating an inward tensile force P on the semiconductor structure 100 through the properties of the material and the adhesive film used in conjunction with it.
[0028] In the embodiment shown in Figure 5, stage 101 is shown before the bonding process is performed. The adhesive film 150 of Figures 2A, 2B, 3 and 4 can be implemented by adhesive film 151. For example, before adhesive film 151 is bonded to semiconductor structure 100, at least one axial tension T can be provided to adhesive film 151. In this way, when adhesive film 151 with tension T is bonded to semiconductor structure 100, it will spring back and shrink, thereby generating an inward pulling force P on semiconductor structure 100. This provides reverse stress to flatten the warped semiconductor structure 100, so that its warping problem can be effectively improved.
[0029] In some embodiments, the tension T ranges from 1 Newton / cm (N / cm) to 30 N / cm, and at least one axis is the X-axis, Y-axis, or a combination thereof. For example, the tension T can be applied to one or more axes, and the tension T on these axes can be the same or different. Therefore, this method can reliably adjust for warpage at different locations on the semiconductor structure 100 to achieve better control. Based on this, the tension film application method of the present invention is more competitive when the semiconductor structure 100 has a structure with long and short sides. Here, the tension T can be provided by a suitable tension film application device, which is not limited by the present invention. For example, the tension film application device can have a clamp, and the adhesive film 151 can be first clamped by the clamp and given the required tension T by means of the clamp displacement or the clamp bearing air pressure before being applied to the semiconductor structure 100. However, it should be noted that the displacement corresponding to the tension T can be determined according to the actual product, which is not limited by the present invention.
[0030] In this embodiment, since the warpage control is based on the introduction of external force (tension T), the adhesive film 151 used may not have significant shrinkage. For example, in Figure 6, the adhesive film 151 is composed of a substrate 151a and an adhesive layer 151b. The substrate 151a can be attached to the semiconductor structure 100 through the adhesive layer 151b, and the material of the substrate 151a may include polyimide (PI), which has good heat resistance but poor shrinkage. On the other hand, the thickness T1 of the substrate 151a is between 0.025 mm and 0.125 mm (e.g., 0.05 mm), but the present invention is not limited thereto.
[0031] Furthermore, the material of the adhesive layer 151b includes butyl rubber, isoprene rubber, chloroprene rubber, ethylene-vinyl acetate copolymer, ethylene-acrylic acid copolymer, ethylene-acrylate copolymer, polybutadiene resin, polycarbonate resin, thermoplastic polyimide resin, phenoxy resin, acrylic resin, polyethylene terephthalate, polybutylene terephthalate saturated polyester resin, fluorocarbon resin or combinations thereof, and the thickness T2 of the adhesive layer 151b is between 0.01 mm and 0.1 mm (e.g., 0.1 mm), but the present invention is not limited thereto.
[0032] In the embodiment shown in Figure 7, a heating process is further performed after the bonding process. Therefore, Figure 7 shows stage 102 between the bonding process and the baking process. The adhesive film 150 of Figures 2A, 2B, 3 and 4 can be implemented by adhesive film 152. For example, adhesive film 152 has a control layer, and the coefficient of thermal expansion (CTE) of the control layer is between 20 ppm / °C and 300 ppm / °C. In this way, even if it has been bonded to the semiconductor structure 100 before the heating process, it has not yet provided a tensile force P, as shown in Figure 7. After the heating process, the control layer will shrink based on the material properties and thus provide a tensile force P to the semiconductor structure 100, thereby flattening the warped semiconductor structure 100 and providing reverse stress, so that the warping problem can be effectively improved.
[0033] In one embodiment, as shown in FIG8, the adhesive film 152 may be an adhesive film 1521, which may be composed of an adhesive layer 152a and a regulating layer 1521a. The regulating layer 1521a may be attached to the semiconductor structure 100 through the adhesive layer 152a. The regulating layer 1521a may include polyetherimide (PEI), polyetheretherketone (PEEK), polyphenylene sulfide (PPS), polyethylene naphthalate (PEN), or combinations thereof, which have a large coefficient of thermal expansion and thus better shrinkage. The material of the regulating layer 1521a may not include polyetherimide. For example, when the baking process temperature is greater than 200°C, polyetherimide or polyetheretherketone is preferred, while when the baking process temperature is less than 200°C, polyphenylene sulfide or polyethylene naphthalate is preferred, but the present invention is not limited thereto. For example, in the selection of the aforementioned materials, the baking temperature and warpage control capability will increase linearly. In other words, in the selection of the aforementioned materials, the film 1521 can have good thermal stability, which can further improve the product yield. However, the present invention is not limited to this.
[0034] On the other hand, the thicker the control layer 1521a is, the greater its warp control capability will be. For example, the thickness of the control layer 1521a can be between 25 micrometers and 350 micrometers (e.g., 0.05 millimeters), but the present invention is not limited thereto.
[0035] In another embodiment, as shown in FIG9, the adhesive film 152 may be an adhesive film 1522, which may be composed of a substrate 1522a, an adhesive layer 152a, and a regulating layer 1522b. The adhesive film 1522 is attached to the semiconductor structure 100 through the adhesive layer 152a. The adhesive layer 152a is disposed between the semiconductor structure 100 and the substrate 1522a. The substrate 1522a is disposed between the adhesive layer 152a and the regulating layer 1522b. The substrate 1522a includes polyimide, and the regulating layer 153b includes epoxy resin, phenolic resin, or a combination thereof with good shrinkage properties. Here, the thickness T4 of the substrate 1522a is between 0.025 mm and 0.1 mm, and the thickness T5 of the regulating layer 1522b is between 0.035 mm and 0.35 mm, but the present invention is not limited thereto.
[0036] In some embodiments, the thickness T6 of the adhesive layer 152a in the films 1521 and 1522 is between 0.01 mm and 0.2 mm (e.g., 0.1 mm), and it includes an adhesive composition. The adhesive composition comprises an acrylic curable compound and functional monomers in suitable proportions.
[0037] In some embodiments, the monomer of the acrylic curable compound may be a compound having a (meth)acrylate group. For example, the compound with the (meth)acrylate group may include compounds selected from methyl(meth)acrylate, ethyl(meth)acrylate, n-propyl(meth)acrylate, isopropyl(meth)acrylate, n-butyl(meth)acrylate, etc. butyl(meth)acrylate), tert-butyl(meth)acrylate, sec-butyl(meth)acrylate, pentyl(meth)acrylate, 2-ethylhexyl(meth)acrylate, 2-ethylbutyl(meth)acrylate, n-octyl(meth)acrylate, isooctyl(meth)acrylate, isononyl(meth)acrylate, lauryl(meth)acrylate, tetradecyl(meth)acrylate, acrylic acid, methacrylic acid, 2-(meth)acryloyloxyacetic acid, 3-(meth)acryloyloxypropionate. propyl acid), 4-(methyl)acryloyloxybutyric acid (4-(meth)acryloyloxybutyric acid)The following is a group consisting of: acid), 2-hydroxyethyl(meth)acrylate, 2-hydroxypropyl(meth)acrylate, 4-hydroxybutyl(meth)acrylate, 6-hydroxyhexyl(meth)acrylate, 8-hydroxyoctyl(meth)acrylate, 2-hydroxyethylene glycol(meth)acrylate, or 2-hydroxypropylene glycol(meth)acrylate, and combinations thereof.
[0038] In some embodiments, the aforementioned acrylic curable compound may be an acrylic photocurable compound, and the adhesive composition may further include a photoinitiator. For example, photoinitiators include oximes (such as acyloxime, ketoneoxime, or other oximes), benzoin and its derivatives (such as benzoin, benzoin dimethyl ether, benzoin ethyl ether, benzoin isopropyl ether, benzoin butyl ether), benzoil derivatives, alkyl phenyl ketones (such as α-hydroxyalkyl phenyl ketone (HAPK)), acetylated phosphorus oxides (such as alkyl diacetylated phosphine oxide), benzophenones, thioxanthen-9-ones, and other organic photoinitiators; or diazonium salts, diaryliodonium salts, triarylsulfonium salts, alkylsulfonium salts, aromatic iron salts, and sulfonyl ketones. Cationic photoinitiators such as ketone and triarylsiloxane; or derivatives thereof or combinations thereof.
[0039] In some embodiments, the functional monomer may be a crosslinking agent, a heat-resistant monomer, and / or a diluting monomer.
[0040] In some embodiments, the adhesive composition is solvent-free. The aforementioned organic solvents include, for example, n-hexane, toluene, xylene, methyl isobutyl ketone, etc., used alone or in combination. In this way, the adhesive layer 152a can reduce process contamination in semiconductor processes (such as baking, heat deposition, exposure and development, or other semiconductor processes involving high temperatures or low pressures).
[0041] In some embodiments, the adhesive layer 152a is, for example, a pressure-sensitive adhesive. For instance, the material of the adhesive layer 152a includes acrylic resin, polyurethane resin, polysiloxane resin, a combination of the above materials, or other suitable polymer materials.
[0042] In some embodiments, the adhesive layer 152a may include a photosensitive material, and the adhesive layer 152a reduces its adhesive strength after being exposed to light (e.g., ultraviolet light), allowing it to be debonded by light exposure in subsequent processes. Alternatively, the adhesive layer 152a may include a thermosetting material, and the adhesive layer 152a reduces its adhesive strength after being heated, allowing it to be debonded by heating in subsequent processes. Alternatively, the adhesive layer 152a may include a cryo-debonding material, and the adhesive layer 152a reduces its adhesive strength when cooled to below the glass transition temperature, allowing it to be debonded by cooling in subsequent processes.
[0043] The adhesive layer 152a is suitable for bonding the dissociable material layer 152a to the substrate (e.g., a process component). The adhesive layer 152a can bond to other materials via physical adsorption, diffusion, electrostatic adsorption, mechanical interlocking, and chemical bonding.
[0044] In some embodiments, the raw materials for adhesive layer 152a include oligomers, monomers, initiators, and additives. For example, the cured adhesive layer 152a includes acrylic resin or other suitable materials. In some embodiments, the oligomer includes polyester acrylate, polyurethane acrylate, polyether acrylate, or combinations thereof.
[0045] In some embodiments, the monomer in the raw material of the adhesive layer 152a has a weight ratio of 20 wt% to 50 wt%, for example, any range from 20 wt%, 30 wt%, 40 wt%, 50 wt%, or 20 wt% to 50 wt%. In some embodiments, the monomer includes monofunctional monomers, difunctional monomers, polyfunctional monomers, or combinations thereof.
[0046] In some embodiments, the monofunctional monomer is, for example, isodecyl acrylate (IDA), tetrahydrofurfuryl acrylate (THFA), isobornyl acrylate (IBOA), or 2-phenoxyethyl acrylate (PHEA), wherein the chemical structures of isodecyl acrylate, tetrahydrofurfuryl acrylate, isobornyl acrylate, and 2-phenoxyethyl acrylate are shown in Equations 2, 3, 4, and 5, respectively.
[0047] (Equation 2)
[0048] (Equation 3)
[0049] (Equation 4)
[0050] (Equation 5)
[0051] In some embodiments, the bifunctional monomer is, for example, hexanediol diacrylate (HDDA) or polyethylene glycol (600) diacrylate (PEG(600)DA), wherein the chemical structures of hexanediol diacrylate and polyethylene glycol (600) diacrylate are shown in Equation 6 and Equation 7, respectively.
[0052] (Equation 6)
[0053] (Equation 7)
[0054] In some embodiments, the multifunctional monomer is, for example, trimethylolpropane triacrylate (TMPTA) or dipentaerythritol hexaacrylate (DPHA), wherein the chemical structures of trimethylolpropane triacrylate and dipentaerythritol hexaacrylate are as follows (Equation 8) and (Equation 9), respectively.
[0055] (Equation 8)
[0056] (Equation 9)
[0057] The initiator in the raw material of adhesive layer 152a is suitable for initiating polymerization and bridging reactions. For example, one or more photoinitiators are used to induce polymerization and bridging reactions between monomers and oligomers. In some embodiments, the photoinitiator includes a free radical photoinitiator. In some embodiments, the photoinitiator in the raw material of adhesive layer 152a has a weight percentage of less than or equal to 10 wt%, for example, any value below 9 wt%, 8 wt%, 7 wt%, 6 wt%, 5 wt%, 4 wt%, 3 wt%, 2 wt%, 1 wt%, or 10 wt%. In some embodiments, the photoinitiator is suitable for initiating polymerization reactions by absorbing ultraviolet light.
[0058] In some embodiments, the polyester acrylate resin, polyurethane acrylate resin, or polyether acrylate resin uses a free radical photoinitiator, such as 1-hydroxycyclohexyl phenyl ketone or phenyl bis(2,4,6-trimethylbenzoyl)-phosphine oxide, with the chemical structures shown in Formula 10 and Formula 11, respectively.
[0059] (Equation 10)
[0060] (Equation 11)
[0061] In some embodiments, the raw materials of adhesive layer 152a further include additives. Additives include, for example, surfactants, stabilizers, dyes, solvents, or other materials. In some embodiments, additives include, for example, conductive particles, conductive fibers, conductive polymers, or other suitable conductive materials, thus giving adhesive layer 152a antistatic properties. In some embodiments, additives include difunctional acrylic oligomers (e.g., aliphatic urethane diacrylate oligomers), which can improve the crosslinking properties of adhesive layer 152a, further enhancing its chemical resistance and heat resistance, and reducing the problem of residual adhesive after removing adhesive layer 152a. In some embodiments, additives include difunctional monomers (e.g., ethylenelated bisphenol A diacrylate, 1,6-hexanediol diacrylate, or combinations thereof), which can further enhance the crosslinking strength of adhesive layer 152a.
[0062] The following embodiments are provided to illustrate that the adhesive film 152 of the present invention can exert a reverse pulling force on a warped semiconductor structure (e.g., a wafer) after a heating process, thereby improving the warpage of the semiconductor structure. However, the present invention is not limited to the following embodiments at all.
[0063] Figure 10 is a top view of the actual test performed according to the embodiment. Figure 11 is a side view of the change in warpage before and after the heating process according to the embodiment. In the embodiment, the initial wafers used have substantially the same warpage, and the test conditions are substantially the same. Specifically, in the embodiment, to use wafers with the same warpage for testing, the heating conditions are 150°C / 1 hour to 250°C / 1 hour, and the adhesive film is composed of a substrate with a thickness of 50 micrometers (µm), the material of which is polyetheretherketone (PEEK) and an adhesive layer with a thickness of 30 µm, the material of which is acrylic (UV anti-adhesive). As shown in Figure 10, A1, A2, A3, and A4 in Figure 10 represent four positions of the wafer, while Figure 11 shows the change in the degree of warpage of the wafer before and after the aforementioned heating conditions are applied to the wafer and the adhesive film attached to the wafer, and the direction of warpage is indicated by positive (+) and negative (-). In addition, as shown in Figure 11, the appearance change of warping is confirmed by actual measurement in the side view direction. From this figure, it can be seen that the adhesive film provided by the present invention can generate a reverse pulling force on the warped wafer.
[0064] Figures 12A and 12B are partially schematic diagrams of a method for manufacturing a semiconductor device according to some embodiments of the present invention. Figure 13 is a cross-sectional schematic diagram of the peeling portion of the adhesive film used in one embodiment of Figures 12A and 12B.
[0065] Figure 12A is similar to Figure 2A, except that the adhesive film 250 includes a balancing portion 251 and a peeling portion 252. The peeling portion 252 is disposed between the semiconductor structure 100 and the balancing portion 251. As shown in Figure 12B, the adhesive film 250 can be removed after multiple external terminals 140 are formed on the second surface 110b, and the adhesive film 250 can be removed through the peeling portion 252 (for example, after a dicing process). In this way, the separated structure can be conveniently used by pick and place, thus having an automation advantage. In this case, the adhesive film 250 can be a material with excellent heat resistance (such as a material that can withstand the reflow temperature of the external terminals 140). However, the present invention is not limited to this. The adhesive film 250 can also be removed by the peeling portion 252 before the external terminals 140 are formed. In this case, the adhesive film 250 can be a less heat-resistant material.
[0066] In some embodiments, the stripping portion 252 is separated from the semiconductor structure 100 by performing a photoirradiation process. For example, the light used in the photoirradiation process can be ultraviolet light (UV), so the wavelength range of the light in the irradiation process is between 200 nanometers and 420 nanometers, but the present invention is not limited thereto.
[0067] In some embodiments, the balancing portion 251 can be any of the following types: adhesive film 151, adhesive film 1521, and adhesive film 1522. In the unshown portions, when the balancing portion 251 is adhesive film 151, the adhesive layer 151b is disposed between the peeling portion 252 and the substrate 151b; when the balancing portion 251 is adhesive film 1521, the adhesive layer 152a is disposed between the regulating layer 1521a and the peeling portion 252; when the balancing portion 251 is adhesive film 1522, the adhesive layer 152a is disposed between the peeling portion 252 and the substrate 1522a, and the substrate 1522a is disposed between the adhesive layer 152a and the regulating layer 1522b.
[0068] In some embodiments, as shown in FIG13, the peeling portion 252 may be composed of a substrate 252a and an adhesive layer 252b, and the substrate 252a and the balancing portion 251 may be attached to the semiconductor structure 100 through the adhesive layer 252b. Here, the thickness T8 of the substrate 252a is between 0.025 mm and 0.2 mm, and the thickness T9 of the adhesive layer 252b is between 0.02 mm and 0.1 mm, but the present invention is not limited thereto.
[0069] In some embodiments, the material of the substrate 252a includes polyethylene naphthalate (PEN), polyamide-imide (PAI), polyphenylsulfone (PPSU), polyetherimide (PEI), polyetheretherketone (PEEK), or similar materials.
[0070] In some embodiments, the adhesive layer 252b is composed of acrylic adhesive, UV resin monomer, curing agent and photoinitiator, wherein the weight proportion of acrylic adhesive in the adhesive layer 252b is between 45 wt% and 75 wt%, the weight proportion of UV resin monomer in the adhesive layer 252b is between 12 wt% and 18 wt%, the weight proportion of curing agent in the adhesive layer 252b is between 0.05 wt% and 5 wt%, and the weight proportion of photoinitiator in the adhesive layer 252b is between 0.01 wt% and 2 wt%.
[0071] In some embodiments, the acrylic adhesive comprises a polyacrylate copolymer with a solid content between 15% and 60%, a viscosity between 100 cps and 60,000 cps, and a molecular weight between 250 and 2,000,000.
[0072] In some embodiments, the UV-curing resin monomer has a functional group number between 1 and 15, a solid content between 5% and 100%, a viscosity between 10 cps and 800,000 cps (e.g., 60,000 cps), and a molecular weight between 250 and 2,000,000. For example, the UV-curing resin monomer includes unsaturated polyesters, epoxy acrylates, polyamino acrylates, polyester acrylates, polyether acrylates, acrylated polyacrylic resins, epoxy resins, UV-cured polysiloxanes, polyolefin resins, bisphenol A epoxy diacrylate (diluted in 20% TPGDA), bisphenol A epoxy diacrylate (diluted in 20% DPGDA), bisphenol A epoxy diacrylate (diluted in 40% TMP7EOTA), modified or unmodified epoxy acrylates, epoxy methacrylates, low-viscosity 621A-80 (diluted in 25% TPGDA), epoxy soybean oil acrylate, or combinations thereof.
[0073] In some embodiments, the curing agent comprises isocyanate groups or epoxy materials, wherein the solid content of the curing agent is between 50% and 100%, and the NCO equivalent is between 5% and 23%. For example, isocyanate groups include 2,4-toluene diisocyanate, 80 / 20-toluene diisocyanate, 65 / 35-toluene diisocyanate, 4,4'-diphenylmethane diisocyanate, polymethylene polyphenyl polyisocyanate, phenylenediamine diisocyanate, hexamethylene diisocyanate, methyl 2,6-diisocyanate hexanoate, dimer fatty acid diisocyanate, diethyl fumarate diisocyanate, 2,2,4-trimethylhexane diisocyanate, isophorone diisocyanate, naphthalene-1,5-diisocyanate, methylcyclohexyl diisocyanate, dicyclohexylmethane diisocyanate, or tetramethylphenylenediamine diisocyanate, or combinations thereof.
[0074] In some embodiments, the reaction wavelength of the photoinitiator is between 200 nanometers (nm) and 420 nanometers, and the photoinitiator includes IRGACURE 184, DAROCUR 1173, TPO, or a combination thereof.
[0075] In some embodiments, as shown in Figures 6, 8, 9, and 13, a release layer 160 can be formed on the adhesive layer 151b of the adhesive film 151, the adhesive layer 152a of the adhesive film 152 (such as adhesive films 1521, 1522), or the adhesive layer 252a of the peel-off portion 252 to improve ease of use, wherein the release layer 160 is torn off when desired. Here, the material of the release layer 160 can be PET (polyethylene terephthalate), polyolefins (PO), cast polypropylene (CPP), release paper, or the like, and the thickness T7 of the release layer 160 is between 0.025 mm and 0.175 mm (e.g., 0.038 mm), but the present invention is not limited thereto.
[0076] In summary, the present invention utilizes the continuous tensile force provided by the adhesive film after it is directly bonded to the molding layer of the semiconductor structure to elastically control the warpage state of the semiconductor structure. This causes the warped semiconductor structure to shrink under a reverse stress, thereby effectively improving the warpage problem of the semiconductor structure, allowing subsequent processes to proceed smoothly, and thus improving the product yield.
[0077] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.
[0078] 101, 102: Stage 100: Semiconductor Structure 110: Rerouting layer 110a: First surface 110b: Second surface 112: Conductive layer 114: Insulation layer 120: Chip 122: Bottom Filler 124:Contact 130: Mold sealing layer 140: External terminal 150, 151, 152, 1521, 1522, 250: Adhesive film 151a, 1522a, 252a: Substrate 151b, 152a, 252b: Adhesive layer 1521a, 1522b: Control Layer 160: Release layer 251: Balance section 252: Peeling section P: Tension S1, S2, S3: Steps T: Tension T1, T2, T3, T4, T5, T6, T7, T8, T9: Thickness
Claims
1. A method for manufacturing a semiconductor device, comprising: A semiconductor structure is provided, wherein the semiconductor structure includes: a redistribution layer having opposing first and second surfaces; a wafer disposed on the first surface, wherein the wafer is electrically connected to the redistribution layer; and a molding layer encapsulating the wafer; performing a bonding process to bring an adhesive film directly into contact with the molding layer of the semiconductor structure, wherein the adhesive film is used to provide an inward pull on the semiconductor structure; and removing the adhesive film and then forming a plurality of external terminals on the second surface.
2. A method for manufacturing a semiconductor device as claimed in claim 1, wherein the adhesive film includes a balancing portion and a peeling portion, the peeling portion being disposed between the semiconductor structure and the balancing portion, and the adhesive film being removed through the peeling portion.
3. A method for manufacturing a semiconductor device as claimed in claim 2, wherein the adhesive film is removed by the peeling portion.
4. A method for manufacturing a semiconductor device as claimed in claim 2, wherein the stripping portion is separated from the semiconductor structure by performing a photoirradiation process.
5. A method for manufacturing a semiconductor device as claimed in claim 4, wherein the light wavelength range of the light irradiation process is between 200 nanometers and 420 nanometers.
6. A method of manufacturing a semiconductor device as claimed in claim 2, wherein at least an axial tension is provided to the adhesive film before performing the bonding process to provide the tension after performing the bonding process.
7. A method of manufacturing a semiconductor device as claimed in claim 6, wherein the balancing portion of the adhesive film is composed of a first substrate and a first adhesive layer, the first adhesive layer being disposed between the release portion and the first substrate, and the material of the first substrate comprising polyimide.
8. A method for manufacturing a semiconductor device as claimed in claim 2, wherein the balancing portion of the adhesive film includes a control layer, the coefficient of thermal expansion of the control layer being in the range of 20 ppm / °C to 300 ppm / °C, and a heating process is performed after the bonding process.
9. A method of manufacturing a semiconductor device as claimed in claim 8, wherein the balancing portion of the adhesive film is composed of a second adhesive layer and the regulating layer, the second adhesive layer being disposed between the regulating layer and the release portion.
10. A method of manufacturing a semiconductor device as claimed in claim 8, wherein the balancing portion of the adhesive film is composed of a second substrate, a third adhesive layer and the regulating layer, the third adhesive layer being disposed between the release portion and the second substrate, and the second substrate being disposed between the third adhesive layer and the regulating layer.
