Manufacturing method of semiconductor structure

Abstract

A manufacturing method of a semiconductor structure including the following steps is provided. A patterned photoresist layer including a first opening and a second opening is formed on a substrate by using a mask. The first opening includes a first inclined sidewall. The photomask includes a transparent substrate and a light-shielding layer. The transparent substrate includes void regions. The transparent substrate in each of the void regions includes voids. The light-shielding layer is located on the transparent substrate. The light-shielding layer includes a third opening and a fourth opening. The void regions are located in the transparent substrate exposed by the third opening and adjacent to the sidewalls of the third opening. An etching process is performed on the substrate by using the patterned photoresist layer as a mask to form a fifth opening and a sixth opening in the substrate. The fifth opening includes a second inclined sidewall. A mark is formed in the fifth opening and a through-substrate via (TSV) is formed in the sixth opening.

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a semiconductor structure, and more particularly to a method for manufacturing a semiconductor structure including markings. [Previous Technology]

[0002] Currently, markers (such as alignment marks or overlay marks) are used to monitor the formation of through-substrate vias (TSVs). The marker formation method may include first forming an opening in the substrate, and then filling the opening with a conductive layer to form a conductive mark. However, if the conductive layer does not fill the opening, a conductive mark cannot be formed within the opening. Consequently, in subsequent bonding processes, the void formed by the opening at the bonding surface will cause the bonding process to fail. [Summary of the Invention]

[0003] The present invention provides a method for manufacturing a semiconductor structure, which can successfully form a mark in the opening, thereby preventing subsequent bonding process failure.

[0004] This invention proposes a method for manufacturing a semiconductor structure, comprising the following steps: A substrate is provided. A photolithography process is performed using a photomask to form a patterned photoresist layer on the substrate. The patterned photoresist layer includes a first opening and a second opening. The first opening includes a first inclined sidewall. The photomask includes a transparent substrate and a light-shielding layer. The transparent substrate includes a plurality of aperture regions. The transparent substrate in each aperture region includes a plurality of apertures. The light-shielding layer is located on the transparent substrate. The light-shielding layer includes a third opening and a fourth opening. The first opening corresponds to the third opening. The second opening corresponds to the fourth opening. The plurality of aperture regions are located in the transparent substrate exposed by the third opening and adjacent to the sidewall of the third opening. Using the patterned photoresist layer as a mask, an etching process is performed on the substrate to form a fifth opening corresponding to the first opening and a sixth opening corresponding to the second opening in the substrate. The fifth opening includes a second inclined sidewall. A conductive layer is formed on the substrate. The conductive layer fills the fifth and sixth openings. Using the conductive layer located in the fifth opening as a termination layer, part of the conductive layer is removed, and a mark is formed in the fifth opening and a through-substrate via (TSV) is formed in the sixth opening.

[0005] According to an embodiment of the present invention, in the above-described method for manufacturing the semiconductor structure, the conductive layer does not completely fill the fifth opening.

[0006] According to an embodiment of the present invention, in the above-described semiconductor structure manufacturing method, during the process of removing a portion of the conductive layer, a portion of the substrate can be removed simultaneously, thereby removing the unfilled portion of the fifth opening.

[0007] According to an embodiment of the present invention, in the above-described semiconductor structure manufacturing method, the width of the first opening may be smaller than the width of the second opening. The width of the fifth opening may be smaller than the width of the sixth opening.

[0008] According to an embodiment of the present invention, in the above-described semiconductor structure manufacturing method, the width of the top of the first opening may be greater than the width of the bottom of the first opening. The width of the top of the fifth opening may be greater than the width of the bottom of the fifth opening.

[0009] According to an embodiment of the present invention, in the above-described semiconductor structure manufacturing method, the light transmittance of the plurality of hole regions can be greater than 0% and less than 100%.

[0010] According to an embodiment of the present invention, in the above-described semiconductor structure manufacturing method, the hole density of the hole region adjacent to the sidewall of the third opening may be greater than the hole density of the hole region away from the sidewall of the third opening.

[0011] According to an embodiment of the present invention, in the above-described semiconductor structure manufacturing method, the light transmittance of the hole region adjacent to the sidewall of the third opening may be less than the light transmittance of the hole region away from the sidewall of the third opening.

[0012] According to an embodiment of the present invention, in the above-described semiconductor structure manufacturing method, the method for forming a plurality of holes may include forming a plurality of holes in a transparent substrate using a laser.

[0013] According to an embodiment of the present invention, in the above-described method for manufacturing a semiconductor structure, there is no cavity region formed by holes in the transparent substrate exposed by the fourth opening.

[0014] Based on the above, in the semiconductor structure manufacturing method proposed in this invention, the photomask includes a transparent substrate and a light-shielding layer. The transparent substrate includes multiple hole regions. Each hole region of the transparent substrate includes multiple holes, and the light transmittance of the transparent substrate can be adjusted by the holes, so that the multiple hole regions of the transparent substrate can only partially transmit light. In this way, in the lithography process, after the photoresist layer is exposed using the photomask, the portion of the photoresist layer corresponding to the multiple hole regions can be partially removed in the development process, so that the first opening has a first inclined sidewall and is not affected by the resolution of the photomask. On the other hand, the exposure light source of the exposure process using the photomask is not limited. In addition, since the first opening of the patterned photoresist layer includes the first inclined sidewall, and the fifth opening is formed by etching the substrate using the patterned photoresist layer as a mask, the fifth opening may include a second inclined sidewall. In addition, since the fifth opening includes the second inclined sidewall, the conductive layer can be smoothly filled into the fifth opening. In this way, by using the conductive layer located in the fifth opening as a termination layer, after removing part of the conductive layer, a mark can be successfully formed in the fifth opening, thereby preventing subsequent bonding process failures.

[0015] In order to make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below, and detailed descriptions are given in conjunction with the accompanying drawings.

Implementation Method

[0016] The following description provides detailed examples and accompanying drawings, but these examples are not intended to limit the scope of the invention. For ease of understanding, the same components will be indicated by the same symbols in the following description. Furthermore, the drawings are for illustrative purposes only and are not drawn to their original dimensions. In fact, the dimensions of various features may be arbitrarily increased or decreased for clarity of discussion.

[0017] Figures 1A to 1E are cross-sectional views of the manufacturing process of semiconductor structures according to some embodiments of the present invention.

[0018] Referring to FIG1A, a substrate 100 is provided. In some embodiments, the substrate 100 may be a semiconductor substrate, such as a silicon substrate. Next, as shown in FIGS. 1A and 1B, a photolithography process is performed using a photomask 200 to form a patterned photoresist layer 102a on the substrate 100. The patterned photoresist layer 102a includes an opening OP1 and an opening OP2. The opening OP1 includes an inclined sidewall S1. In some embodiments, the width W1 of the opening OP1 may be smaller than the width W2 of the opening OP2. In some embodiments, the width W11 of the top of the opening OP1 may be larger than the width W12 of the bottom of the opening OP1. In some embodiments, the cross-sectional shape of the opening OP1 may be funnel-shaped.

[0019] The photomask 200 may include a transparent substrate 202 and a light-shielding layer 204. The transparent substrate 202 includes a plurality of aperture regions R1. Each aperture region R1 of the transparent substrate 202 includes a plurality of apertures V1. Therefore, the light transmittance of the transparent substrate 202 can be adjusted by means of the apertures V1, so that the plurality of aperture regions R1 of the transparent substrate 202 can only partially transmit light. In some embodiments, the light transmittance of the plurality of aperture regions R1 may be greater than 0% and less than 100%. In some embodiments, the material of the transparent substrate 202 is, for example, quartz. In some embodiments, the method of forming the plurality of apertures V1 may include forming the plurality of apertures V1 in the transparent substrate 202 using a laser.

[0020] A light-shielding layer 204 is located on a transparent substrate 202. The light-shielding layer 204 includes an opening OP3 and an opening OP4. An opening OP1 corresponds to an opening OP3. An opening OP2 corresponds to an opening OP4. In some embodiments, the material of the light-shielding layer 204 is, for example, an opaque material. In some embodiments, the material of the light-shielding layer 204 is, for example, chromium.

[0021] A plurality of porous regions R1 are located in the transparent substrate 202 exposed by the opening OP3 and adjacent to the sidewall S2 of the opening OP3. The plurality of porous regions R1 may be located directly above the opening OP3. In some embodiments, the pore density of the porous regions R1 adjacent to the sidewall S2 of the opening OP3 may be greater than the pore density of the porous regions R1 away from the sidewall S2 of the opening OP3. For example, the pore density of porous region R11 may be greater than the pore density of porous region R12, and the pore density of porous region R13 may be greater than the pore density of porous region R14. In this embodiment, pore density may be defined as the number of pores per unit volume. In some embodiments, the light transmittance of the porous regions R1 adjacent to the sidewall S2 of the opening OP3 may be less than the light transmittance of the porous regions R1 away from the sidewall S2 of the opening OP3. For example, the light transmittance of the aperture region R11 may be less than that of the aperture region R12, and the light transmittance of the aperture region R13 may be less than that of the aperture region R14. In some embodiments, the transparent substrate 202 exposed by the opening OP4 does not have an aperture region formed by the aperture.

[0022] In some embodiments, the above-described photolithography process may include the following steps. First, as shown in FIG1A, a photoresist layer 102 may be formed on a substrate 100. In some embodiments, the photoresist layer 102 is formed by, for example, spin coating.

[0023] Next, as shown in FIG1B, a photomask 200 can be used as a mask to expose the photoresist layer 102. Then, after the exposure process, a development process can be performed on the photoresist layer 102 to form a patterned photoresist layer 102a. Since the hole region R1 of the transparent substrate 202 can only partially transmit light, the portion of the photoresist layer 102 corresponding to the hole region R1 can be partially removed during the development process, so that the opening OP1 has an inclined sidewall S1.

[0024] Referring to FIG1C, a patterned photoresist layer 102a is used as a mask to perform an etching process on the substrate 100, thereby forming an opening OP5 corresponding to opening OP1 and an opening OP6 corresponding to opening OP2 in the substrate 100. Since the opening OP1 of the patterned photoresist layer 102a includes a sloping sidewall S1, and the opening OP5 is formed by using the patterned photoresist layer 102a as a mask to perform an etching process on the substrate 100, the opening OP5 may include a sloping sidewall S3. In some embodiments, the width W5 of the opening OP5 may be smaller than the width W6 of the opening OP6. In some embodiments, the width W51 of the top of the opening OP5 may be larger than the width W52 of the bottom of the opening OP5. In some embodiments, the cross-sectional shape of the opening OP5 may be funnel-shaped. In some embodiments, the patterned photoresist layer 102a may be consumed and removed during the etching process.

[0025] Referring to FIG1D, a conductive layer 104 is formed on a substrate 100. The conductive layer 104 fills openings OP5 and OP6. Since opening OP5 includes inclined sidewalls S3, the conductive layer 104 can smoothly fill opening OP5. In some embodiments, the conductive layer 104 does not completely fill opening OP5. In some embodiments, the material of the conductive layer 104 is, for example, copper. In some embodiments, the method for forming the conductive layer 104 is, for example, electrochemical plating (ECP).

[0026] Referring to FIG1E, using the conductive layer 104 located in the opening OP5 as a terminating layer, a portion of the conductive layer 104 is removed, forming a mark 104a in the opening OP5 and a substrate via 104b in the opening OP6. By means of the above method, the mark 104a can be successfully formed in the opening OP5, thereby preventing subsequent bonding process failures. In some embodiments, during the process of removing a portion of the conductive layer 104, a portion of the substrate 100 can be removed simultaneously, and the unfilled portion of the opening OP5 can be removed, thereby further preventing subsequent bonding process failures. In some embodiments, during the process of removing a portion of the substrate 100, the inclined sidewall S3 of the opening OP5 can be removed. In some embodiments, the width W7 of the mark 104a can be smaller than the width W8 of the substrate via 104b. In some embodiments, the method for removing a portion of the conductive layer 104 and a portion of the substrate 100 is, for example, chemical mechanical polishing.

[0027] In some embodiments, a dielectric layer (not shown) may be formed between the substrate via 104b and the substrate 100, and a dielectric layer (not shown) may be formed between the marker 104a and the substrate 100, the description of which is omitted here.

[0028] Based on the above embodiments, in the manufacturing method of the semiconductor structure 10, the photomask 200 includes a transparent substrate 202 and a light-shielding layer 204. The transparent substrate 202 includes a plurality of hole regions R1. Each hole region R1 of the transparent substrate 202 includes a plurality of holes V1, and the light transmittance of the transparent substrate 202 can be adjusted by means of the holes V1, so that the plurality of hole regions R1 of the transparent substrate 202 can only partially transmit light. In this way, in the photolithography process, after the photoresist layer 102 is exposed using the photomask 200, the portion of the photoresist layer 102 corresponding to the plurality of hole regions R1 can be partially removed in the development process, so that the opening OP1 has a tilted sidewall S1 and is not affected by the resolution of the photomask. On the other hand, the exposure light source of the exposure process using the photomask 200 is not limited. Furthermore, since the opening OP1 of the patterned photoresist layer 102a includes a sloping sidewall S1, and the opening OP5 is formed by etching the substrate 100 using the patterned photoresist layer 102a as a mask, the opening OP5 may include a sloping sidewall S3. Additionally, since the opening OP5 includes a sloping sidewall S3, the conductive layer 104 can be smoothly filled into the opening OP5. In this way, by using the conductive layer 104 located in the opening OP5 as a termination layer, after removing a portion of the conductive layer 104, a mark 104a can be smoothly formed in the opening OP5, thereby preventing subsequent bonding process failures.

[0029] In summary, the method for manufacturing the semiconductor structure in the above embodiments includes the following steps: A substrate is provided. A photolithography process is performed using a photomask to form a patterned photoresist layer on the substrate. The patterned photoresist layer includes a first opening and a second opening. The first opening includes a first inclined sidewall. The photomask includes a transparent substrate and a light-shielding layer. The transparent substrate includes a plurality of aperture regions. The transparent substrate in each aperture region includes a plurality of apertures. The light-shielding layer is located on the transparent substrate. The light-shielding layer includes a third opening and a fourth opening. The first opening corresponds to the third opening. The second opening corresponds to the fourth opening. The plurality of aperture regions are located in the transparent substrate exposed by the third opening and adjacent to the sidewall of the third opening. Using the patterned photoresist layer as a mask, an etching process is performed on the substrate to form a fifth opening corresponding to the first opening and a sixth opening corresponding to the second opening in the substrate. The fifth opening includes a second inclined sidewall. A conductive layer is formed on the substrate. The conductive layer fills the fifth and sixth openings. Using the conductive layer located in the fifth opening as a terminating layer, a portion of the conductive layer is removed, forming a mark in the fifth opening and a substrate via in the sixth opening. Since the fifth opening includes a second inclined sidewall, the conductive layer can be smoothly filled into the fifth opening. In this way, after removing a portion of the conductive layer using the conductive layer located in the fifth opening as a terminating layer, a mark can be smoothly formed in the fifth opening, thereby preventing subsequent bonding process failures.

[0030] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims. [Simplified Explanation of the Diagram]

[0031] Figures 1A to 1E are cross-sectional views of the manufacturing process of semiconductor structures according to some embodiments of the present invention.

Claims

1. A method for manufacturing a semiconductor structure, comprising: Provide a base; A photolithography process is performed using a photomask to form a patterned photoresist layer on a substrate. The patterned photoresist layer includes a first opening and a second opening. The first opening includes a first inclined sidewall. The photomask includes: a transparent substrate including a plurality of aperture regions, wherein each aperture region of the transparent substrate includes a plurality of apertures; and a light-shielding layer located on the transparent substrate, wherein the light-shielding layer includes a third opening and a fourth opening, the first opening corresponding to the third opening and the second opening corresponding to the fourth opening. The plurality of aperture regions are located in the transparent substrate exposed by the third opening and adjacent to the sidewall of the third opening. An etching process is performed on the substrate using the patterned photoresist layer as a mask to form a fifth opening corresponding to the first opening and a sixth opening corresponding to the second opening in the substrate, wherein the fifth opening includes a second inclined sidewall. A conductive layer is formed on the substrate, wherein the conductive layer fills the fifth opening and the sixth opening. A portion of the conductive layer is removed using the conductive layer located in the fifth opening as a termination layer, forming a mark in the fifth opening and a substrate perforation in the sixth opening.

2. A method for manufacturing a semiconductor structure as claimed in claim 1, wherein the conductive layer does not completely fill the fifth opening.

3. A method for manufacturing a semiconductor structure as claimed in claim 2, wherein during the process of removing a portion of the conductive layer, a portion of the substrate is also removed, and the unfilled portion of the fifth opening is removed.

4. A method for manufacturing a semiconductor structure as claimed in claim 1, wherein the width of the first opening is smaller than the width of the second opening, and the width of the fifth opening is smaller than the width of the sixth opening.

5. A method for manufacturing a semiconductor structure as claimed in claim 1, wherein the width of the top of the first opening is greater than the width of the bottom of the first opening, and the width of the top of the fifth opening is greater than the width of the bottom of the fifth opening.

6. A method for manufacturing a semiconductor structure as claimed in claim 1, wherein the transmittance of the plurality of said aperture regions is greater than 0% and less than 100%.

7. A method of manufacturing a semiconductor structure as claimed in claim 1, wherein the pore density of the pore region adjacent to the sidewall of the third opening is greater than the pore density of the pore region away from the sidewall of the third opening.

8. A method of manufacturing a semiconductor structure as claimed in claim 1, wherein the light transmittance of the aperture region adjacent to the sidewall of the third opening is less than the light transmittance of the aperture region distant from the sidewall of the third opening.

9. A method for manufacturing a semiconductor structure as claimed in claim 1, wherein the method for forming a plurality of said holes includes forming a plurality of said holes in the transparent substrate using a laser.

10. A method of manufacturing a semiconductor structure as claimed in claim 1, wherein the transparent substrate exposed by the fourth opening does not have the cavity region formed by the hole.

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