Semiconductor memory devices

Abstract

This embodiment provides a semiconductor memory device that can reduce manufacturing costs. One embodiment of the semiconductor memory device includes a first wafer and a second wafer disposed on a first surface of the first wafer in a first direction. The second wafer includes: a first region comprising a first laminate containing a plurality of first insulating layers and a plurality of first wiring layers alternately stacked in the first direction; a second region comprising a second laminate containing a plurality of first insulating layers and a plurality of second insulating layers alternately stacked in the first direction; a first memory pillar disposed in the first region and penetrating the first laminate in the first direction; and a first contact disposed in the second region, penetrating the second laminate in the first direction, and connected to a second wiring layer above the second laminate.

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