Circuit for dynamic on-resistance measurement

Abstract

The disclosure describes a circuit for dynamic on-state resistance (R ds,on) measurement coupled to a III-V group-based field-effect transistor (FET). The circuit includes a first capacitor, a first switch, a second capacitor, an inductor, a second switch, and a third switch. The first switch and the FET are coupled in series and coupled between two terminals of the first capacitor. One terminal of the second capacitor is coupled to the common terminal of the first switch and the first capacitor. One terminal of the inductor is coupled to the common terminal of the first switch and the FET. The second switch and the third switch are coupled in series. The second switch is coupled between another terminal of the second capacitor and another terminal of the inductor. The third switch is coupled between the inductor and the common terminal of the first capacitor and the FET.

Claims

1. A dynamic on-resistance measurement circuit coupled to a group III-V field-effect transistor, the dynamic on-resistance measurement circuit comprising: a first capacitor; a first switch connected in series with the first capacitor and coupled between the two ends of the first capacitor; a second capacitor having a first terminal and a second terminal, wherein the first terminal is coupled to a common terminal of the first switch and the first capacitor; an inductor having a third terminal and a fourth terminal, wherein the third terminal is coupled to a common terminal of the first switch and the group III-V field-effect transistor; and a second switch and a third switch connected in series with each other, wherein the second switch is coupled between the second terminal of the second capacitor and the fourth terminal of the inductor, and the third switch is coupled between the common terminal of the first capacitor and the group III-V field-effect transistor and the fourth terminal of the inductor.

2. The dynamic on-resistance measurement circuit as described in claim 1 further includes a first voltage source and a second voltage source, the first voltage source being coupled to the first capacitor and the second voltage source being coupled to the second capacitor.

3. The dynamic on-resistance measurement circuit as described in claim 2, wherein in the first phase, the third switch is turned on, and the first switch, the second switch, and the group III V field-effect transistor are turned off.

4. The dynamic on-resistance measurement circuit as described in claim 3, wherein in the second phase following the first phase, the first switch is turned on, the second switch, the third switch and the group III-V field-effect transistor are turned off, and the first voltage source provides a first voltage to the group III-V field-effect transistor.

5. The dynamic on-resistance measurement circuit as described in claim 4, wherein in the third phase following the second phase, the first switch and the second switch are turned on, the third switch and the group III V field-effect transistor are turned off, and the second voltage source increases the inductor current through the inductor.

6. The dynamic on-resistance measurement circuit as described in claim 5, wherein in the fourth phase following the third phase, the first switch and the second switch are turned off, the third switch and the group III V field-effect transistor are turned on, and the inductor current remains fixed.

7. The dynamic on-resistance measurement circuit as described in claim 6, wherein in the fifth phase following the fourth phase, the second switch and the group III V field-effect transistor are turned off, the first switch and the third switch are turned on, and the inductor current decreases.

8. The dynamic on-resistance measurement circuit as described in claim 7, wherein in the sixth phase after the fifth phase, the second switch and the first switch are turned off, the group III V MOSFET and the third switch are turned on, and the inductor current drops to zero.

9. The dynamic on-resistance measurement circuit as described in claim 1 further includes four gate drivers, which are respectively coupled to the first switch, the second switch, the third switch and the control terminal of the group III V field-effect transistor.

10. The dynamic on-resistance measurement circuit as described in claim 1, wherein the group III-V field-effect transistor is a gallium nitride field-effect transistor, an aluminum nitride field-effect transistor, or an aluminum gallium nitride field-effect transistor.

11. The dynamic on-resistance measurement circuit as described in claim 2, wherein in a first phase, the first switch and the second switch are on, the third switch and the group III V field-effect transistor are off, and the second voltage source increases the inductor current through the inductor.

12. The dynamic on-resistance measurement circuit as described in claim 11, wherein in the second phase following the first phase, the first switch and the second switch are off, the third switch and the group III V field-effect transistor are on, and the inductor current remains fixed.

13. The dynamic on-resistance measurement circuit as described in claim 12, wherein in the third phase following the second phase, the second switch and the group III V field-effect transistor are turned off, the first switch and the third switch are turned on, and the inductor current decreases.

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