Processing-in-memory (PIM) based memory scheduling methods and systems for concurrent transactions

Abstract

Systems, methods, devices, and apparatuses are disclosed for scheduling processing-in-memory (PIM) transactions and non-PIM transactions efficiently and / or concurrently in a processing-in-memory (PIM) architecture. An example method performed by a memory controller of a PIM device includes: initiating execution of a PIM transaction on the set of PIM memory banks; determining whether a latency of the PIM transaction exceeds a quality of service (QOS) limit; determining whether the PIM transaction is buffering if the latency of the PIM transaction does not exceed the QOS limit; suspending the execution of the PIM transaction based on the latency of the PIM transaction exceeding the QOS limit or based on the PIM transaction buffering if the latency of the PIM transaction does not exceed the QOS limit; and initiating execution of a non-PIM transaction on the set of PIM memory banks of the PIM device.

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