Driver integrated circuit for a display panel

Abstract

A driver integrated circuit of a display panel includes a source driver and a controller. The source driver is coupled to the display panel. The controller is coupled to the source driver and configured to output a plurality of gate clock signals to a gate driver according to a horizontal synchronous signal. The gate driver is coupled to the display panel through a plurality of gate lines. The horizontal synchronous signal includes a plurality of time intervals, and the plurality of time intervals correspond to the plurality of gate lines respectively. A time length of one of the plurality of time intervals is M times a clock period or N times the clock period according to an accumulation error of a corresponding gate line of the plurality of gate lines, in which M and N are positive integers.

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