Memory device

TW202640614APending Publication Date: 2026-10-01AP MEMORY TECH CORP
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Patent Information

Application Number
TW115123542
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-12-19
Filing Date
2025-03-03
Publication Date
2026-10-01

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Abstract

A memory device includes a plurality of memory cell arrays and a plurality of data sensing circuitry areas. Each of the data sensing circuitry areas is disposed between two of the adjacent memory cell arrays, each of the data sensing circuitry areas includes a main space and an extended space. The main space has a plurality of I / O pads for outputting a normal storage data during a normal data reading operation. The extended space is disposed in adjacent to the main space, and has a plurality of extended I / O pads for outputting an ECC data during an ECC data reading operation. Wherein at least a first bit of the normal storage data is generated from the extended space during the normal data reading operation..
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