Current profile balancing for flash memory
TW202640619APending Publication Date: 2026-10-01SILICON STORAGE TECHNOLOGY INC
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Patent Information
- Application Number
- TW115102310
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-05-23
- Filing Date
- 2026-01-21
- Publication Date
- 2026-10-01
Smart Images
Figure TWG2TA001079125_001 
Figure TWG2TA001079125_002 
Figure TWG2TA001079125_003
Abstract
In one example, a method comprises precharging at least one input to or output from a memory array to a supply voltage; performing at least one operation by the memory array requiring the precharged at least one input to or output from the memory array to have a voltage lower than the supply voltage; and discharging the precharged at least one input to or output from the memory array to the voltage lower than the supply voltage in response to the at least one operation.
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