Three-port DC-DC converter

Abstract

A three-port DC-DC converter includes a voltage selection switch circuit, a boost converter circuit electrically connected to the voltage selection switch circuit, and an output circuit electrically connected to the boost converter circuit. The voltage selection switch circuit receives a first DC input voltage and a second DC input voltage and converts them to output a third DC input voltage. The boost converter circuit receives and converts the third DC input voltage and includes an input inductor, a main switch, a boost capacitor, a coupling inductor having a first winding, a second winding, and a third winding, a clamping diode, and a clamping capacitor. Through this design, the present invention can achieve high voltage gain with two design degrees of freedom: the coupling inductor turns ratio and the switch conduction ratio, thus avoiding the need for operation at extremely high conduction ratios.

Description

Technical Field

[0001] This invention relates to a voltage converter, and more particularly to a three-port DC converter. Prior Technology

[0002] Solar power generation is one solution to reduce greenhouse gas emissions. However, due to the intermittent nature of solar power generation, it cannot meet the demand for stable power supply throughout the day. Therefore, a solar power generation device is usually used in conjunction with an energy storage device (such as a battery) to supply power to the load, as shown in Figure 1. Under this system architecture, three DC-DC converters are required to meet the power conversion needs between the solar power generation device and the energy storage device, between the solar power generation device and the load, and between the energy storage device and the load. This results in high construction costs. Therefore, a three-port DC converter, as shown in Figure 2, has emerged. In use, this three-port DC converter can operate in three modes depending on the different power flow directions. I. Single-Input Single-Output (SISO) Mode: This mode is further divided into three types: Type 1: When the energy storage device is fully charged, the solar power generation device provides energy to the load, i.e., P + PV = PO; Type 2: When the solar power generation device is not generating electricity, the energy storage device provides energy to the load, i.e., PB = PO; Type 3: When the load has no demand and the energy storage device is not fully charged, the solar power generation device charges the energy storage device, i.e., P + PV = PB. II. Dual-Input Single-Output (DISO) Mode: When the load demand exceeds the power generated by the solar power generation device, both the solar power generation device and the energy storage device provide energy to the load, i.e., P + PV + PB = PO. 3. Single-Input-Dual-Output (SIDO) mode: When the power generated by the solar power generation device is greater than the load demand and the energy storage device is not fully charged, the solar power generation device charges the energy storage device and provides energy to the load, i.e., P PV=P O+PB.

[0003] While this three-port DC-DC converter offers advantages such as simplified system architecture and cost savings, the relatively low output voltages of both the solar power generation device and the energy storage device necessitate a higher voltage gain, requiring operation at a very high conduction ratio. However, in practice, due to the influence of parasitic components, the voltage gain may decrease instead of increase when operating at a very high conduction ratio. Therefore, developing a three-port DC-DC converter with high voltage gain without requiring operation at a high conduction ratio has become a key research focus for the industry. Summary of the Invention

[0004] Therefore, the object of the present invention is to provide a three-port DC-DC converter that can improve upon at least one of the disadvantages of the prior art.

[0005] Therefore, the three-port DC-DC converter of the present invention is suitable for receiving a first DC input voltage and a second DC input voltage, and includes a voltage selection switch circuit, a boost converter circuit, and an output circuit.

[0006] The voltage selection switching circuit can receive the first DC input voltage and the second DC input voltage and convert them to output a third DC input voltage. It includes a power supply diode and a power supply switch. The power supply diode has an anode and a cathode that receive the first DC input voltage. The power supply switch has a first terminal electrically connected to the cathode of the power supply diode, a second terminal that receives the second DC input voltage, and a control terminal that receives a power supply control signal. The power supply switch is controlled by the power supply control signal to operate in a conducting or non-conducting state.

[0007] The boost converter circuit is electrically connected to the selection voltage switching circuit and includes an input inductor, a main switch, a boost capacitor, a coupling inductor, a clamping diode, and a clamping capacitor. The input inductor has a first terminal electrically connected to the cathode of the power supply diode and receiving the third DC input voltage, and a second terminal. The main switch has a first terminal electrically connected to the second terminal of the input inductor, a second terminal grounded, and a control terminal receiving a main control signal. The main switch is controlled by the main control signal to operate in a conducting or non-conducting state. The boost capacitor has a first terminal electrically connected to the second terminal of the input inductor and a second terminal. The coupling inductor has a first winding, a second winding, and a third winding. Each winding has a first terminal and a second terminal. The second terminal of the first winding is electrically connected to the first terminal of the second winding and to the second terminal of the boost capacitor. The clamping diode has an anode electrically connected to the second terminal of the input inductor and a cathode electrically connected to the first terminal of the first winding. The clamping capacitor has a first terminal electrically connected to the cathode of the clamping diode and a second terminal electrically connected to the second terminal of the main switch.

[0008] The output circuit includes a first output diode, a first output capacitor, a second output diode, and a second output capacitor. The first output diode has an anode and a cathode electrically connected to the second terminal of the second winding. The first output capacitor has a first terminal electrically connected to the cathode of the first output diode and a second terminal grounded. The second output diode has an anode and a cathode electrically connected to the second terminal of the third winding. The second output capacitor has a first terminal electrically connected to the cathode of the second output diode and a second terminal electrically connected to the first terminal of the third winding. The first terminal of the second output capacitor and the second terminal of the first output capacitor cooperate to provide a DC output voltage.

[0009] The advantage of this invention is that, through the circuit architecture of this invention with the design of the coupled inductor, this invention can achieve high voltage gain with two design degrees of freedom of the coupled inductor turns ratio and the switch conduction ratio, so it does not need to operate at a very large conduction ratio. Simple Explanation of the Diagram

[0010] Other features and effects of the present invention will be clearly presented in the embodiments with reference to the drawings, wherein: Figure 1 is a schematic diagram illustrating the use of a solar power generation device in conjunction with an energy storage device; Figure 2 is a schematic diagram illustrating a three-port DC-DC converter; Figure 3 is a circuit diagram illustrating one embodiment of the three-port DC-DC converter of the present invention; Figure 4 is an equivalent circuit diagram illustrating this embodiment; Figure 5 is a timing diagram illustrating the operation of this embodiment in SISO mode; Figures 6 to 9 are equivalent circuit diagrams, illustrating the first to fourth stages of operation in SISO mode of this embodiment; Figure 10 is a timing diagram illustrating the operation of this embodiment in DISO mode; Figures 11 to 15 are equivalent circuit diagrams, illustrating the first to fifth stages of operation in DISO mode of this embodiment; Figure 16 is a timing diagram illustrating the operation of this embodiment in SIDO mode; Figures 17 to 21 are equivalent circuit diagrams, illustrating the first to fifth stages of operation of this embodiment in SIDO mode; Figure 22 is a graph illustrating the relationship between different turns ratios, different conduction ratios, and voltage gain of one of the coupled inductors in SISO mode of this embodiment. Figure 23 is a timing diagram illustrating the voltage waveforms of an input inductor and a magnetized inductor in DISO mode of this embodiment; and Figure 24 is a timing diagram illustrating the voltage waveforms of the input inductor and the magnetized inductor when the embodiment is operating in SIDO mode. Implementation

[0011] Referring to Figure 3, an embodiment of the three-port DC-DC converter of the present invention is applicable to receiving a first DC input voltage VPV from a first DC voltage source 11 and a second DC input voltage VB from a second DC voltage source 12, and performing a boost conversion on the first DC input voltage VPV or the second DC input voltage VB to generate a DC output voltage VO, and using the DC output voltage VO to output to a load R.

[0012] In this embodiment, the first DC voltage source 11 is a solar power generation device, and the first DC input voltage VPV is the power generation voltage of the solar power generation device. The second DC voltage source 12 is an energy storage device, and the second DC input voltage VB is the voltage of the energy storage device. It should be noted that the first DC voltage source 11 and the second DC voltage source 12 have a common ground structure. The three-port DC-DC converter includes a voltage selection switch circuit 2, a boost converter circuit 3, an output circuit 4, and a charging switch circuit 5.

[0013] The selected voltage switching circuit 2 can be controlled to output a third DC input voltage Vin, using either the first DC input voltage VPV or the second DC input voltage VB as the output. It includes a power supply diode DPV and a power supply switch SB. The power supply diode DPV has an anode and a cathode that receive the first DC input voltage VPV. The power supply switch SB has a first terminal electrically connected to the cathode of the power supply diode DPV, a second terminal that receives the second DC input voltage VB, and a control terminal that receives a power supply control signal. The power supply switch SB is controlled by the power supply control signal to operate in a conducting or non-conducting state. The power supply switch SB is an N-type metal-oxide-semiconductor field-effect transistor, and the first terminal of the power supply switch SB is the source, and the second terminal of the power supply switch SB is the drain.

[0014] The boost converter circuit 3 is electrically connected to the selection voltage switching circuit 2 to receive and convert the third DC input voltage Vin, and is also electrically connected to the output circuit 4. The boost converter circuit 3 includes an input inductor L, a main switch S1, a boost capacitor CS, a coupling inductor L1, a clamping diode DC, and a clamping capacitor CC.

[0015] The input inductor L has a first terminal and a second terminal electrically connected to the cathode of the power supply diode DPV. The main switch S1 has a first terminal electrically connected to the second terminal of the input inductor L, a second terminal grounded, and a control terminal for receiving a main control signal. The main switch S1 is controlled by the main control signal to operate in a conducting or non-conducting state. The main switch S1 is an N-type metal-oxide-semiconductor field-effect transistor, and the first terminal of the main switch S1 is the drain, and the second terminal of the main switch S1 is the source. The boost capacitor CS has a first terminal and a second terminal electrically connected to the second terminal of the input inductor L.

[0016] The coupled inductor L1 has a first winding N1, a second winding N2, and a third winding N3. Each winding N1, N2, and N3 has a first terminal and a second terminal. The second terminal of the first winding N1 is electrically connected to the first terminal of the second winding N2, and is also electrically connected to the second terminal of the boost capacitor CS. It should be noted that the first terminal of the first winding N1 is a dotted terminal, and the second terminal of the first winding N1 is a non-dotted terminal. The first terminal of the second winding N2 is a dotted terminal, and the second terminal of the third winding N3 is a non-dotted terminal. In the figure, each dotted terminal is indicated by a "●".

[0017] The clamping diode DC has an anode electrically connected to the second terminal of the input inductor L and a cathode electrically connected to the first terminal of the first winding N1. The clamping capacitor CC has a first terminal electrically connected to the cathode of the clamping diode DC and a second terminal electrically connected to the second terminal of the main switch S1.

[0018] The output circuit 4 includes a first output diode D1, a first output capacitor C1, a second output diode D2, and a second output capacitor C2. The first output diode D1 has an anode and a cathode electrically connected to the second terminal of the second winding N2. The first output capacitor C1 has a first terminal electrically connected to the cathode of the first output diode D1 and a second terminal grounded. The second output diode D2 has an anode and a cathode electrically connected to the second terminal of the third winding N3. The second output capacitor C2 has a first terminal electrically connected to the cathode of the second output diode D2 and a second terminal electrically connected to the first terminal of the third winding N3. The first terminal of the second output capacitor C2 cooperates with the second terminal of the first output capacitor C1 to provide the DC output voltage VO.

[0019] The charging switch circuit 5 includes a charging switch S2 and a charging diode DB. The charging switch S2 has a first terminal and a second terminal electrically connected to the second terminal of the input inductor L, and a control terminal for receiving a charging control signal. The charging switch S2 is controlled by the charging control signal to operate in a conducting or non-conducting state. The charging switch S2 is an N-type metal-oxide-semiconductor field-effect transistor, and the first terminal of the charging switch S2 is the drain, and the second terminal of the charging switch S2 is the source. The charging diode DB has an anode electrically connected to the second terminal of the charging switch S2, and a cathode electrically connected to the second terminal of the power supply switch SB and the second DC voltage source 12.

[0020] Referring to Figure 4, which is an equivalent circuit diagram of this embodiment, the difference from Figure 3 is that the equivalent circuit of the coupling inductor L1 is added, that is, a magnetizing inductance Lm is formed between the first end and the second end of the first winding N1, and a leakage inductance Lk is formed between the first end of the first winding N1 and the cathode of the clamping diode DC.

[0021] The following will explain the operating principles of this embodiment in Single Input Single Output (SISO) mode, Dual Input Single Output (DISO) mode, and Single Input Dual Output (SIDO) mode in sequence. It should be noted that the following explanation is based on the following assumptions: 1. All power semiconductor components are considered ideal, that is, the on-state voltage drop of the main switch S1, the power supply switch SB, the charging switch S2, the power supply diode DPV, the clamping diode DC, the first output diode D1, the second output diode D2, and the charging diode DB is zero; 2. The turns ratio of the windings of the coupling inductor L1 is N2 / N1 = N3 / N1 = n, and the leakage inductance Lk is much smaller than the magnetizing inductance Lm; 3. The capacitance values ​​of the boost capacitor CS, the clamping capacitor CC, the first output capacitor C1, and the second output capacitor C2 are large enough that the voltage of each capacitor can be considered constant within a switching cycle T.

[0022] Referring to Figure 5, this is a timing diagram of the operation in the single-input single-output (SISO) mode of this embodiment. In the figure, parameter Vgs1 represents the main control signal, parameter d1 represents the on-state ratio of the main switch S1, parameter T is the switching period of the main control signal, parameter iL represents the current flowing through the input inductor, parameters iDc, iD1, and iD2 represent the current flowing through the clamping diode DC, the first output diode D1, and the second output diode D2, respectively, parameters im and iLk represent the current flowing through the magnetizing inductor Lm and the leakage inductor Lk, respectively, and parameter t is time.

[0023] It should be noted that in this embodiment, the second DC input voltage VB is greater than the first DC input voltage VPV, and in SISO mode, only the first DC input voltage VPV or the second DC input voltage VB will be used as the third DC input voltage Vin. When the second DC input voltage VB is to be used as the third DC input voltage Vin, the power supply switch SB is controlled by the power supply control signal to operate in a constantly conducting state, at which time the power supply diode DPV is reverse biased. When the first DC input voltage VPV is to be used as the third DC input voltage Vin, the power supply switch SB is controlled by the power supply control signal to operate in a constantly non-conducting state, at which time the power supply diode DPV is forward biased. That is to say, in SISO mode, whether the first DC input voltage VPV or the second DC input voltage VB is used as the third DC input voltage Vin depends on whether the power supply control signal controls the power supply switch SB to operate in a constantly conducting or constantly non-conducting state.

[0024] Referring to Figures 6 to 9, in this embodiment under SISO mode, the power supply control signal controls the power supply switch SB to operate in a state of constant non-conduction, and the first DC input voltage VPV can be used as the third DC input voltage Vin, cyclically operating from the first stage to the fourth stage. The circuit diagrams in Figures 6 to 9 are similar to those in Figure 4, except that in Figures 6 to 9, the conductive components are drawn with solid lines, while the non-conductive components are drawn with dashed lines, and the actual current flow in the circuit is indicated by solid lines with arrows. Each stage will be described below, with the parameter ON indicating that the component is conducting and the parameter OFF indicating that the component is not conducting.

[0025] Phase 1 (Time point t: t0~t1):

[0026] Referring to Figures 5 and 6, the main switch S1 is ON, the power supply switch SB is OFF, the charging switch S2 is OFF, the power supply diode DPV is ON, the clamping diode DC is OFF, the first output diode D1 is OFF, the second output diode D2 is OFF, and the charging diode DB is OFF.

[0027] In this first stage, since the main switch S1 is turned on, the first DC voltage source 11 charges the input inductor L with the first DC input voltage VPV, causing the current iL of the input inductor to rise linearly, the current iLk of the leakage inductor to rise linearly, and the current iLk of the leakage inductor to flow to the magnetizing inductor Lm (upward in the figure). From an energy point of view, the clamping capacitor CC transfers energy to the coupling inductor L1 and the boost capacitor CS. The first output capacitor C1 and the second output capacitor C2 provide power to the load R. In this stage, the voltage VLk of the leakage inductor is negligible compared to the voltage VLm of the magnetizing inductor, so we can obtain

[0028] ; ; ;

[0029] When t=t1, the main switch S1 switches to non-conducting, and this stage ends.

[0030] Second stage (time point t: t1~t2):

[0031] Referring to Figures 5 and 7, the main switch S1 is OFF, the power supply switch SB is OFF, the charging switch S2 is OFF, the power supply diode DPV is ON, the clamping diode DC is ON, the first output diode D1 is ON, the second output diode D2 is OFF, and the charging diode DB is OFF.

[0032] In this second stage, due to the continuity of the current iL in the input inductor, the clamping diode DC is turned on. The current iL in the input inductor charges the clamping capacitor CC through the clamping diode DC. The current iL in the input inductor and the current iDc in the clamping diode decrease linearly. The primary side voltage of the coupling inductor L1 is -VCs, the leakage inductor current iLk decreases rapidly, and the direction of the leakage inductor current iLk changes to flow towards the clamping capacitor CC (i.e., from upward to downward in the figure). This allows the energy stored in the magnetized inductor Lm to be transferred to the second winding N2, and then charges the first output capacitor C1 through the first output diode D1. In this stage,

[0033] ; ;

[0034] After sorting, we can obtain

[0035]

[0036]

[0037] When t=t2, the current iDc of the clamping diode drops to 0, and the DC of the clamping diode naturally transitions to non-conducting state under the condition of zero current, thus ending this stage.

[0038] The third stage (time point t: t2~t3):

[0039] Referring to Figures 5 and 8, the main switch S1 is OFF, the power supply switch SB is OFF, the charging switch S2 is OFF, the power supply diode DPV is ON, the clamping diode DC is OFF, the first output diode D1 is ON, the second output diode D2 is ON, and the charging diode DB is OFF.

[0040] In this third stage, the boost capacitor CS discharges, and the primary side of the coupling inductor L1 charges the clamping capacitor CC. The current iLiLk flowing through the second winding N2 and the first output diode D1 charges the first output capacitor C1. The energy stored in the magnetizing inductor Lm is transferred to the second winding N2 and the third winding N3. In this stage,

[0041] ; ; ;

[0042]

[0043] When t=t3, the main switch S1 switches to conduction, and this stage ends.

[0044] Fourth stage (time point t: t3~t4):

[0045] Referring to Figures 5 and 9, the main switch S1 is ON, the power supply switch SB is OFF, the charging switch S2 is OFF, the power supply diode DPV is ON, the clamping diode DC is OFF, the first output diode D1 is ON, the second output diode D2 is ON, and the charging diode DB is OFF.

[0046] In this fourth stage, the current iL of the input inductor flows through the main switch S1, the leakage inductance current iLk increases rapidly, and the direction of the leakage inductance current iLk changes to flow towards the magnetizing inductance Lm (i.e., from downward to upward in the diagram). When iLk = iLm, the current iN1 of the first winding is 0, the current iN2 of the second winding is 0, and the current iN3 of the third winding is 0. Therefore, the first output diode D1 and the second output diode D2 naturally transition to a non-conductive state.

[0047] At this point, this phase ends, and the next switching cycle T begins.

[0048] Additionally, it should be noted that when this embodiment is in SISO mode, and the power supply control signal controls the power supply switch SB to operate in a constant-on state, the second DC input voltage VB of the second DC voltage source 12 can be used as the third DC input voltage Vin. The difference between this and the previous paragraph, which used the first DC input voltage VPV as the third DC input voltage Vin, is that the power supply switch SB is always on and the power supply diode DPV is always off. The operating principles and conduction conditions of other components are the same as those in the previous paragraph, so they will not be repeated here.

[0049] Referring to Figure 10, this is a timing diagram of the operation in the dual-input single-output (DISO) mode of this embodiment. In the figure, parameters Vgs1 and VgsB represent the main control signal and the power supply control signal, respectively; parameters d1 and dB represent the conduction ratios of the main switch S1 and the power supply switch SB, respectively; parameter T is the switching period of the main control signal; parameter VL represents the voltage of the input inductor; parameters iDc, iD1, and iD2 represent the currents flowing through the clamping diode DC, the first output diode D1, and the second output diode D2, respectively; parameter iLk represents the current flowing through the leakage inductor; and parameter t is time.

[0050] It should be noted that in DISO mode, the first DC voltage source 11 and the second DC voltage source 12 together supply power to meet the needs of the load R. In practice, when the first DC voltage source 11 fails to provide sufficient power to meet the needs of the load R, the second DC voltage source 12 can provide power to meet the needs of the load R. In DISO mode, the charging switch S2 is controlled by the charging control signal to operate in a constantly non-conducting state, and the power supply control signal controls the power supply switch SB to determine whether power is supplied by the second DC voltage source 12.

[0051] Referring to Figures 11 to 15, this embodiment operates cyclically through stages one through five in DISO mode. The circuit diagrams in Figures 11 to 15 are similar to those in Figure 4, except that in Figures 11 to 15, conductive components are drawn with solid lines, while non-conductive components are drawn with dashed lines, and solid lines with arrows indicate the actual current flow in the circuit. Each stage will be described below, with the parameter ON indicating that the component is conductive and the parameter OFF indicating that the component is not conductive.

[0052] Phase 1 (Time point t: t0~t1):

[0053] Referring to Figures 10 and 11, the main switch S1 is ON, the power supply switch SB is ON, the charging switch S2 is OFF, the power supply diode DPV is OFF, the clamping diode DC is OFF, the first output diode D1 is OFF, the second output diode D2 is OFF, and the charging diode DB is OFF.

[0054] In this first stage, since the main switch S1 and the power supply switch SB are turned on, the second DC voltage source 12 charges the input inductor L with the second DC input voltage VB, causing the current iL to rise linearly with a slope of VB / L. From an energy perspective, the clamping capacitor CC transfers energy to the coupling inductor L1 and the boost capacitor CS. The first output capacitor C1 and the second output capacitor C2 provide power to the load R. In this stage,

[0055] ; ;

[0056] When t=t1, the power supply switch SB switches to non-conducting, and this stage ends.

[0057] Second stage (time point t: t1~t2):

[0058] Referring to Figures 10 and 12, the main switch S1 is ON, the power supply switch SB is OFF, the charging switch S2 is OFF, the power supply diode DPV is ON, the clamping diode DC is OFF, the first output diode D1 is OFF, the second output diode D2 is OFF, and the charging diode DB is OFF.

[0059] In this second stage, the first DC voltage source 11 charges the input inductor L with the first DC input voltage VPV, causing the current iL to continue to rise linearly with a slope of VPV / L.

[0060] From an energy perspective, the clamping capacitor CC continues to transfer energy to the coupling inductor L1 and the boost capacitor CS. The first output capacitor C1 and the second output capacitor C2 continue to provide power to the load R.

[0061] When t=t2, the main switch S1 switches to non-conducting, and this stage ends.

[0062] The third stage (time point t: t2~t3):

[0063] Referring to Figures 10 and 13, the main switch S1 is OFF, the power supply switch SB is OFF, the charging switch S2 is OFF, the power supply diode DPV is ON, the clamping diode DC is ON, the first output diode D1 is ON, the second output diode D2 is OFF, and the charging diode DB is OFF.

[0064] In this third stage, due to the continuity of the current iL in the input inductor, the clamping diode DC is turned on, and the current iL in the input inductor charges the clamping capacitor CC through the clamping diode DC. The current iL in the input inductor and the current iDc in the clamping diode decrease linearly with a slope of (VPV - VCc) / L. In this stage, the circuit operation principle is the same as in the second stage of SISO mode.

[0065] When t=t3, the current iDc of the clamping diode DC drops to 0, and the clamping diode DC naturally transitions to non-conducting state under the condition of zero current, thus ending this stage.

[0066] Fourth stage (time point t: t3~t4):

[0067] Referring to Figures 10 and 14, the main switch S1 is OFF, the power supply switch SB is OFF, the charging switch S2 is OFF, the power supply diode DPV is ON, the clamping diode DC is OFF, the first output diode D1 is ON, the second output diode D2 is ON, and the charging diode DB is OFF. In this stage, the circuit operation principle is the same as in the third stage of SISO mode, so it will not be described again.

[0068] When t=t4, the main switch S1 switches to conduction, the power supply switch SB switches to conduction, and this stage ends.

[0069] Fifth stage (time point t: t4~t5):

[0070] Referring to Figures 10 and 15, the main switch S1 is ON, the power supply switch SB is ON, the charging switch S2 is OFF, the power supply diode DPV is OFF, the clamping diode DC is OFF, the first output diode D1 is ON, the second output diode D2 is ON, and the charging diode DB is OFF.

[0071] In this fifth stage, the current iL of the input inductor flows through the main switch S1, the leakage inductor current iLk increases rapidly, and the direction of the leakage inductor current iLk changes from downward to upward. When iLk = iLm, the current iN1 of the first winding is 0, at this time the current iN2 of the second winding is 0, and the current iN3 of the third winding is 0. Therefore, the first output diode D1 and the second output diode D2 naturally transition to a non-conducting state.

[0072] At this point, this phase ends, and the next switching cycle T begins.

[0073] Referring to Figure 16, this is a timing diagram of the operation in the single-input dual-output (SIDO) mode of this embodiment. In the figure, parameters Vgs1 and Vgs2 represent the main control signal and the charging control signal, respectively; parameters d1 and d2 represent the conduction ratios of the main switch S1 and the charging switch S2, respectively; parameter T is the switching period of the main control signal; parameter VL represents the voltage of the input inductor; parameters iDc, iD1, and iD2 represent the currents flowing through the clamping diode DC, the first output diode D1, and the second output diode D2, respectively; parameter iLk represents the current flowing through the leakage inductor; and parameter t is time.

[0074] It should be noted that in SIDO mode, the power provided by the first DC voltage source 11 is greater than the power required by the load R, so additional power must be provided to the second DC voltage source 12. Therefore, in SIDO mode, the power supply switch SB is controlled by the power supply control signal to operate in a state of constant non-conduction, the power supply diode DPV is constantly on, and the charging control signal controls the charging switch S2 to control whether the second DC voltage source 12 is charged by the first DC voltage source 11.

[0075] Referring to Figures 17 to 21, this embodiment operates cyclically through stages one through five in SIDO mode. The circuit diagrams in Figures 17 to 21 are similar to those in Figure 4, except that in Figures 17 to 21, conductive components are drawn with solid lines, while non-conductive components are drawn with dashed lines, and solid lines with arrows indicate the actual current flow in the circuit. Each stage will be described below, with the parameter ON indicating that the component is conductive and the parameter OFF indicating that the component is not conductive.

[0076] Phase 1 (Time point t: t0~t1):

[0077] Referring to Figures 16 and 17, the main switch S1 is ON, the power supply switch SB is OFF, the charging switch S2 is ON, the power supply diode DPV is ON, the clamping diode DC is OFF, the first output diode D1 is OFF, the second output diode D2 is OFF, and the charging diode DB is OFF.

[0078] In this first stage, although both the main switch S1 and the charging switch S2 are turned on, since the main switch S1 is grounded, no current flows through the charging switch S2 and the charging diode DB. In other words, no current flows to the second DC voltage source 12.

[0079] The first DC voltage source 11 charges the input inductor L with the first DC input voltage VPV, causing the current iL in the input inductor to rise linearly. From an energy perspective, the clamping capacitor CC transfers energy to the coupling inductor L1 and the boost capacitor CS. The first output capacitor C1 and the second output capacitor C2 provide power to the load R.

[0080] When t=t1, the main switch S1 switches to non-conducting, and this stage ends.

[0081] Second stage (time point t: t1~t2):

[0082] Referring to Figures 16 and 18, the main switch S1 is OFF, the power supply switch SB is OFF, the charging switch S2 is ON, the power supply diode DPV is ON, the clamping diode DC is OFF, the first output diode D1 is OFF, the second output diode D2 is OFF, and the charging diode DB is ON.

[0083] In this second stage, the current iL of the input inductor charges the second DC voltage source 12 via the charging switch S2 and the charging diode DB. The current im of the magnetized inductor charges the second DC voltage source 12 via the boost capacitor CS, the charging switch S2, and the charging diode DB. The first output capacitor C1 and the second output capacitor C2 provide power to the load R.

[0084] When t=t2, the charging switch S2 switches to non-conducting, and this stage ends.

[0085] The third stage (time point t: t2~t3):

[0086] Referring to Figures 16 and 19, the main switch S1 is OFF, the power supply switch SB is OFF, the charging switch S2 is OFF, the power supply diode DPV is ON, the clamping diode DC is ON, the first output diode D1 is ON, the second output diode D2 is OFF, and the charging diode DB is OFF.

[0087] In this third stage, due to the continuity of the current iL in the input inductor, the clamping diode DC is turned on, and the current iL in the input inductor charges the clamping capacitor CC through the clamping diode DC. The current iL in the input inductor and the current iDc in the clamping diode decrease linearly. The primary side voltage of the coupling inductor L1 is -VCs, and the leakage inductance current iLk decreases rapidly, causing the energy stored in the magnetized inductor Lm to be transferred to the second winding N2 and to charge the first output capacitor C1 through the first output diode D1. In this stage, the voltage VLm of the magnetized inductor and the voltage VL of the input inductor are the same as in the second stage of SISO mode (see paragraphs

[0035] ~

[0036] ).

[0088] When t=t3, the current iDc of the clamping diode DC drops to 0, and the clamping diode DC naturally transitions to non-conducting state under the condition of zero current, thus ending this stage.

[0089] Fourth stage (time point t: t3~t4):

[0090] Referring to Figures 16 and 20, the main switch S1 is OFF, the power supply switch SB is OFF, the charging switch S2 is OFF, the power supply diode DPV is ON, the clamping diode DC is OFF, the first output diode D1 is ON, the second output diode D2 is ON, and the charging diode DB is OFF.

[0091] In this fourth stage, the boost capacitor CS discharges, and the primary side of the coupling inductor L1 charges the clamping capacitor CC. The current iLiLk flowing through the second winding N2 and the first output diode D1 charges the first output capacitor C1. The energy stored in the magnetizing inductor Lm is transferred to the second winding N2 and the third winding N3. In this stage, the voltage and current equations are the same as in the third stage of the SISO mode (see paragraphs

[0041] ~

[0042] ).

[0092] When t=t4, the main switch S1 switches to conduction, the charging switch S2 switches to conduction, and this stage ends.

[0093] Fifth stage (time point t: t4~t5):

[0094] Referring to Figures 16 and 21, the main switch S1 is ON, the power supply switch SB is OFF, the charging switch S2 is ON, the power supply diode DPV is ON, the clamping diode DC is OFF, the first output diode D1 is ON, the second output diode D2 is ON, and the charging diode DB is OFF.

[0095] In this fifth stage, the current iL of the input inductor flows through the main switch S1, the leakage inductor current iLk increases rapidly, and the direction of the leakage inductor current iLk changes from downward to upward. When iLk = iLm, the current iN1 of the first winding is 0, at this time the current iN2 of the second winding is 0, and the current iN3 of the third winding is 0. Therefore, the first output diode D1 and the second output diode D2 naturally transition to a non-conducting state.

[0096] At this point, this phase ends, and the next switching cycle T begins.

[0097] Next, the voltage gain in each mode will be explained. To simplify the analysis, the leakage inductance Lk will be ignored, and the voltage of all capacitors will be considered constant.

[0098] Voltage Gain in SISO Mode

[0099] Applying the volt-second balance principle to both the input inductor L and the magnetizing inductor Lm, that is, the average voltage of the input inductor during the complete switching cycle T, is...<V L> and the average voltage of the magnetizing inductor<V Lm> Since both are 0, we can conclude that:

[0100]

[0101]

[0102] Coordinating the component voltage relationships in the second stage The voltages of the clamping capacitor CC, the boosting capacitor CS, the first output capacitor C1, and the second output capacitor C2 are as follows:

[0103] ; ;

[0104] ; ;

[0105] Therefore, the DC output voltage VO is

[0106] Voltage gain is Similarly, if the second DC voltage source 12 supplies power independently, the voltage gain is... .

[0107] As can be seen from the above formula, the voltage gain has two design degrees of freedom: the turns ratio n of the coupling inductor L1 and the conduction ratio d1 of the main switch S1. The three-port DC-DC converter of the present invention can achieve high boost performance by designing a suitable turns ratio n and without operating at a very large conduction ratio d1.

[0108] Referring to Figure 22, this embodiment shows the relationship between voltage gain and conduction ratio d1 when operating in SISO mode, with different turns ratios (i.e., n=1 / n=2 / n=3). As can be seen from the figure, when the turns ratio n=2 and the conduction ratio d1=0.6, the voltage gain is 10 times.

[0109] Voltage Gain in DISO Mode

[0110] In the complete switching cycle T, since the time supplied by the second DC voltage source 12 is dBT and the time supplied by the first DC voltage source 11 is (1-dB)T, the average voltage of the third DC input voltage Vin in the switching cycle T is dBVB + (1-dB)VPV. Therefore, by replacing the average voltage of the third DC input voltage Vin in the switching cycle T with the first DC input voltage VPV in the capacitor voltages and voltage gains of the SISO mode, we can obtain:

[0111]

[0112]

[0113]

[0114] è

[0115]

[0116]

[0117] è

[0118] Another approach is to apply the volt-second balance theorem to both the input inductor L and the magnetizing inductor Lm, referring to Figure 23, where... The same results as those for segments

[0111] to

[0117] can also be obtained.

[0119] Voltage Gain in SIDO Mode

[0120] Applying the volt-second balance theorem to the input inductor L and the magnetizing inductor Lm respectively, and referring to Figure 24, where... Therefore, we can conclude that:

[0121]

[0122]

[0123]

[0124]

[0125]

[0126] Voltage Stress Analysis of Each Switch

[0127] As can be seen from the aforementioned operating principle, the voltage stress of the main switch S1 is equal to the voltage of the clamping capacitor CC. If the leakage inductance Lk is ignored, the voltage stress of the main switch S1 is:

[0128] SISO mode:

[0129] DISO mode:

[0130] SIDO mode:

[0131] In addition, the voltage stress of the charging switch S2 is The voltage stress of the power supply switch SB is .

[0132] In SISO mode, the voltage stress of the main switch S1 is only 1 / (1+(2n+1)d1) times that of the DC output voltage VO. The voltage stresses of the charging switch S2 and the power supply switch SB are also much smaller than the DC output voltage VO. Therefore, in high output voltage applications, power semiconductor transistors with low rated withstand voltage and low RDS(ON) can be used to reduce switching conduction losses. Furthermore, in this embodiment, the voltage stresses of the power supply diode DPV, the clamping diode DC, the first output diode D1, the second output diode D2, and the charging diode DB are also smaller than the DC output voltage VO. Therefore, diodes with lower forward conduction voltage drops can be used to reduce conduction losses and improve conversion efficiency.

[0133] In summary, by incorporating the coupling inductor L1 into the circuit architecture of this invention, the invention can achieve high voltage gain using the two design degrees of freedom of the turns ratio n of the coupling inductor L1 and the conduction ratio d1 of the main switch, thus effectively achieving the purpose of this invention.

[0134] Furthermore, since the voltage stress of the main switch S1, the power supply switch SB, and the charging switch S2 is much lower than that of the DC output voltage VO, power semiconductor transistors with low on-resistance can be used. In addition, the voltage stress of the power supply diode DPV, the clamping diode DC, the first output diode D1, the second output diode D2, and the charging diode DB is also lower than that of the DC output voltage VO, so diodes with lower forward voltage drop can be used. Therefore, this invention has the advantages of reducing conduction losses and improving conversion efficiency.

[0135] Furthermore, since the selected voltage switching circuit 2 is electrically connected to the input inductor L, the first DC voltage source 11 and the second DC voltage source 12 have the advantage of being able to provide continuous current and low current ripple.

[0136] However, the above description is merely an embodiment of the present invention and should not be construed as limiting the scope of the present invention. Any simple equivalent changes and modifications made in accordance with the scope of the patent application and the contents of the patent specification of the present invention shall still fall within the scope of the patent of the present invention.

[0137] 11: First DC voltage source 12: Second DC voltage source 2: Select voltage switching circuit DPV: Power supply diode SB: Power switch 3: Boost converter circuit L: Input inductance VL: Voltage of the input inductor iL: Current in the input inductor S1: Main switch CS: Boost capacitor L1: Coupled inductor N 1: First winding N 2: Second winding N 3: Third winding L m: Magnetizing inductance V Lm: Voltage of the magnetizing inductor im: Current in the magnetizing inductor Lk: Leakage inductance i Lk: Current of leakage inductance DC: Clamping Diode iDc: Current of the clamping diode CC: Clamping capacitor 4: Output Circuit D 1: First output diode D 2: Second output diode i D1: Current of the first output diode i D2: Current of the second output diode C 1: First output capacitor C2: Second output capacitor 5: Charging switch circuit S2: Charging switch DB: Rechargeable Diode R: Load VPV: First DC input voltage VB: Second DC input voltage V in: Third DC input voltage VO: DC output voltage V Cc: Voltage of the clamping capacitor V Cs: Increases the voltage of the capacitor V gs1: Main control signal V gsB: Power supply control signal V gs2: Charging control signal t: time t0~t5: Time points T: Switching cycle d1: Conduction ratio d2: Conduction ratio d B: Conduction ratio

Claims

1. A three-port DC-DC converter suitable for receiving a first DC input voltage and a second DC input voltage, and comprising: a voltage selection switching circuit capable of receiving the first DC input voltage and the second DC input voltage and converting them to output a third DC input voltage, and including a power supply diode and a power supply switch, the power supply diode having an anode and a cathode for receiving the first DC input voltage, the power supply switch having a first terminal electrically connected to the cathode of the power supply diode, a second terminal for receiving the second DC input voltage, and a control terminal for receiving a power supply control signal, the power supply switch being controlled by the power supply control signal to operate in a conducting or non-conducting state; A boost converter circuit, electrically connected to a voltage selection switch circuit, includes an input inductor, a main switch, a boost capacitor, a coupling inductor, a clamping diode, and a clamping capacitor. The input inductor has a first terminal electrically connected to the cathode of the power supply diode and receiving a third DC input voltage, and a second terminal. The main switch has a first terminal electrically connected to the second terminal of the input inductor, a second terminal grounded, and a control terminal receiving a main control signal. The main switch is controlled by the main control signal to operate in a conducting or non-conducting state. The boost capacitor has a first terminal electrically connected to the second terminal of the input inductor and a second terminal. The coupling inductor has a first winding, a second winding, and a third winding, each winding having a first terminal and a second terminal. The second terminal of the first winding is electrically connected to the first terminal of the second winding and to the second terminal of the boost capacitor. The clamping diode has a first terminal electrically connected to the cathode of the input inductor and receiving a third DC input voltage, and a second terminal. The clamping capacitor has an anode at the second terminal and a cathode electrically connected to the first terminal of the first winding. The clamping capacitor has a first terminal electrically connected to the cathode of the clamping diode and a second terminal electrically connected to the second terminal of the main switch. The output circuit includes a first output diode, a first output capacitor, a second output diode, and a second output capacitor. The first output diode has an anode and a cathode electrically connected to the second terminal of the second winding. The first output capacitor has a first terminal electrically connected to the cathode of the first output diode and a second terminal grounded. The second output diode has an anode and a cathode electrically connected to the second terminal of the third winding. The second output capacitor has a first terminal electrically connected to the cathode of the second output diode and a second terminal electrically connected to the first terminal of the third winding. The first terminal of the second output capacitor and the second terminal of the first output capacitor cooperate to provide a DC output voltage.

2. The three-port DC-DC converter as claimed in claim 1 further includes a charging switch circuit, the charging switch circuit including a charging switch and a charging diode, the charging switch having a first terminal and a second terminal electrically connected to the second terminal of the input inductor, and a control terminal for receiving a charging control signal, the charging switch being controlled by the charging control signal to operate in a conducting or non-conducting state, the charging diode having an anode electrically connected to the second terminal of the charging switch and a cathode electrically connected to the second terminal of the power supply switch.

3. The three-port DC-DC converter as described in claim 2, wherein, The first end of each winding is the dotted end, and the second end of each winding is the non-dotted end.

4. The three-port DC-DC converter as described in claim 3, wherein, The voltage gain of the three-port DC-DC converter is (1+(2n+1)d 1) / (1-d 1), where n is the turns ratio of the windings of the coupled inductor and d 1 is the conduction ratio of the main switch.

5. The three-port DC-DC converter as described in claim 4, wherein, The power supply switch is controlled to operate in a non-conductive state, and the charging switch is controlled to operate in a non-conductive state.

6. The three-port DC-DC converter as claimed in claim 4, wherein, The power switch is controlled to operate in the ON position, and the charging switch is controlled to operate in the OFF position.

7. The three-port DC-DC converter as claimed in claim 1, wherein, The main switch is an N-type metal-oxide-semiconductor field-effect transistor, and the first terminal of the main switch is the drain, and the second terminal of the main switch is the source.

8. The three-port DC-DC converter as claimed in claim 5, wherein, The main control signal, the power supply control signal, and the charging control signal have the same period.

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