Power mosfet device with source embedded heteroepitaxy and their fabrication methods

Abstract

This invention discloses a power MOSFET device with a source region embedded in heteroepitaxial growth and its manufacturing method. The manufacturing method includes: growing an epitaxial layer on a silicon substrate and forming a trench gate structure; implanting to form the body region; etching to form the source recess; growing heteroepitaxial material to fill the source recess and form the source region; forming the source contact and creating an ohmic contact region at the bottom of the source contact; and completing subsequent manufacturing processes. In this invention, the source region is formed by embedding heteroepitaxial growth. The different lattice constants of the heteroepitaxial material and silicon material generate the required elastic deformation, applying corresponding local stress to the silicon near the conduction channel in the source-drain direction. This increases the carrier mobility in the source-drain direction, further reducing the on-resistance of the power MOSFET device and decreasing power consumption.

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