Chip package and method for forming the same

Abstract

Chip packages and methods for forming the same are provided. The method includes providing a substrate having at least a chip region and a scribe-line region. The scribe-line region includes a first region surrounding the chip region and a second region surrounding the first region. A metallization layer is formed on an active surface of the substrate and includes a dielectric layer and first metal stacking layers in the dielectric layer and aligned with the first region. A first opening is formed in the metallization layer along the first region and surrounds the chip region. The first opening exposes the surface of the top layer of at least one of the first metal stack layers and has different depths. A second opening is formed along the second region and surrounds the first region. The second opening passes through the metallization layer and extends into the substrate.

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