Substrate

Abstract

A substrate includes a base layer and a through hole. A material of the substrate layer includes glass or ceramic. The through hole includes a first conductive member, a second conductive member, and an insulating member. The insulating member separates the first conductive member and the second conductive member so that the first conductive member and the second conductive member are electrically independent from each other in the through hole.

Description

Technical Field

[0001] This invention relates to a substrate. Prior Technology

[0002] Currently, based on the three-dimensional (3D) design requirements of electronic devices, through-silicon vias (TSVs) are often used as the medium for vertical electrical connections. However, since TSVs are formed within a silicon substrate, they pose risks such as leakage, which significantly reduces product reliability. To avoid these problems, insulation treatment and other processes are required within the silicon substrate, which in turn increases manufacturing costs. Summary of the Invention

[0003] This invention provides a substrate that has good product reliability while effectively improving yield, increasing wiring density, and thus reducing manufacturing costs.

[0004] A substrate according to the present invention includes a base layer and a through-hole. The base layer is made of glass or ceramic. The through-hole includes a first conductive element, a second conductive element, and an insulating element. The insulating element spacees the first conductive element and the second conductive element, such that the first conductive element and the second conductive element are electrically independent of each other within the through-hole.

[0005] In one embodiment of the present invention, the material of the insulating element is the same as or different from the material of the base layer.

[0006] In one embodiment of the present invention, the first conductive element is in direct contact with the hole wall of the substrate layer, and the insulating element is disposed between the first conductive element and the second conductive element.

[0007] In one embodiment of the present invention (as shown in FIG1A), the first conductive element is a closed ring structure, while the second conductive element is a point structure in the form of a metal pillar.

[0008] In one embodiment of the present invention, both the first conductive element and the second conductive element are closed-loop ring structures.

[0009] In one embodiment of the present invention (as shown in Figures 1E to 1F), the first conductive element is a non-closed ring structure with multiple arc-shaped segments, while the second conductive element can be a point structure in the form of one or multiple metal pillars.

[0010] In one embodiment of the present invention (as shown in Figures 2A and 2B), the contours formed by the multiple top surfaces of the multiple arc-shaped segments are misaligned with the contours formed by the multiple bottom surfaces of the multiple arc-shaped segments.

[0011] In one embodiment of the present invention, there is a first gap between two adjacent top surfaces and a second gap between two adjacent bottom surfaces, and the first gap and the second gap do not overlap in the orthographic projection direction.

[0012] In one embodiment of the present invention (as shown in FIG. 3), the substrate further includes a circuit structure disposed on the substrate layer. The first conductive element and the second conductive element are electrically connected to the same conductive trace in the circuit structure outside the through-hole.

[0013] In one embodiment of the present invention (substrate 100B as shown in FIG. 4), the substrate further includes a circuit structure disposed on a substrate layer. The first conductive element and the second conductive element are electrically connected to different conductive traces in the circuit structure outside the through-hole.

[0014] Based on the above, the present invention uses insulating and low-cost materials such as glass / ceramics to replace silicon substrates in the substrate layer. Furthermore, through the design of the insulating components, at least two independent traces can be designed within the vias to improve via quality. Based on this, the substrate of the present invention has good product reliability while effectively reducing manufacturing costs.

[0015] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings for detailed explanation. Simple Explanation of the Diagram

[0016] Figures 1A and 2A are partial top views of a substrate according to some embodiments of the present invention. Figures 1B and 2B are partial bottom view schematic diagrams corresponding to Figures 1A and 2A, respectively. Figures 1C, 1D, 1E, and 1F are partial top views of a substrate according to some embodiments of the present invention. Figures 3, 4, 5, and 6 are partial schematic cross-sectional views illustrating a substrate and its application according to some embodiments of the present invention. Implementation

[0017] The directional terms used in this article (e.g., up, down, right, left, front, back, top, bottom) are used for reference only and are not intended to imply absolute orientation.

[0018] The invention is described more fully with reference to the drawings of this embodiment. However, the invention may be embodied in various different forms and should not be limited to the embodiments described herein. The thickness, dimensions, or size of layers or regions in the drawings are enlarged for clarity. The same or similar reference numerals denote the same or similar elements, which will not be described again in the following paragraphs.

[0019] Figures 1A and 2A are partial top views of a substrate according to some embodiments of the present invention. Figures 1B and 2B are partial bottom views corresponding to Figures 1A and 2A, respectively. Figures 1C, 1D, 1E, and 1F are partial top views of a substrate according to some embodiments of the present invention. Here, these figures only show views of a portion of the substrate; the overall appearance of these substrates can be seen in Figures 3 to 6 below.

[0020] Referring to Figures 1A and 1B, the substrate 100 of this embodiment includes a base layer 10 and through-holes 110. The material of the base layer 10 includes glass or ceramic (including any insulating layer applied to the surface of the glass or ceramic, but not limited thereto). By using such insulating materials instead of a silicon substrate, the insulation treatment steps performed to avoid leakage can be omitted, and such materials also have cost advantages. Thus, the substrate 100 of this embodiment can effectively reduce manufacturing costs. Furthermore, when the material of the base layer 10 is glass, the ease of processing glass can more effectively reduce manufacturing time (e.g., the speed of forming the through-holes 110 is faster). Alternatively, when the material of the base layer 10 is ceramic, its good heat dissipation properties allow it to be applied to high-power products, but the present invention is not limited thereto.

[0021] Furthermore, since the required number of vias is closely related to the reliability of the substrate, for example, when the required number of vias is large, the size of a single via will be compressed, causing difficulties in via manufacturing, and thus increasing the probability of substrate failure due to poor-quality vias. To improve the aforementioned problems, the via 110 in this embodiment includes a conductive element 111 (which can be regarded as a first conductive element), a conductive element 112 (which can be regarded as a second conductive element), and an insulating element 113. The insulating element 113 separates the conductive elements 111 and 112, so that the conductive elements 111 and 112 are electrically independent of each other within the via 110. In this way, through the design of the insulating element 113, the via 110 can have at least two independent trace designs, increasing the wiring density and structural strength within a single via 110, reducing the required number of vias 110 in the substrate 100, reducing the aspect ratio, and reducing manufacturing risks, thereby improving the quality of the vias 110. As a result, the substrate 100 of this embodiment can have good product reliability. Here, the diameter of the perforation 110 can be at least greater than 100 micrometers, for example, it can be about 200 micrometers or other larger values, and the depth of the perforation 110 is, for example, between 0.7 mm and 1.1 mm, but the invention is not limited thereto.

[0022] It should be noted that the description of the electrical independence of conductive components 111 and 112 within the perforation 110 is limited to the electrical relationship within the perforation 110, and does not limit whether these two components will be further electrically connected outside the perforation 110. That is, the present invention does not limit the electrical relationship of conductive components 111 and 112 outside the perforation 110. As long as conductive components 111 and 112 within the perforation 110 are separated by insulating component 113 and are electrically independent of each other, they are within the protection scope of the present invention.

[0023] In some embodiments, the material of the insulating element 113 differs from the material of the base layer 10 (e.g., it may be any insulating layer applied to a surface such as glass or ceramic). That is, the material of the insulating element 113 is not glass or ceramic, but the invention is not limited thereto; the material of the insulating element 113 may be the same as the material of the base layer 10 (e.g., it may be any insulating layer applied to a surface such as glass or ceramic). In some embodiments, the material of the insulating element 113 includes epoxy resin or the like, but the invention is not limited thereto; the material of the insulating element 113 can be selected according to the actual design requirements. Furthermore, the materials of the conductive element 111 and the conductive element 112 are, for example, copper or the like.

[0024] In some embodiments, since the insulation process to prevent leakage is omitted, the conductive element 111 is in direct contact with the hole wall 10s of the through-hole 110, and the insulating element 113 is disposed between the conductive element 111 and the conductive element 112. For example, the through-hole 110 can be manufactured as follows (not shown): First, an opening is formed in a bulk substrate layer 10, and a metallization process is performed on the opening and all surfaces of the substrate layer 10. Next, the aforementioned metal layer is patterned to form the conductive element 111, wherein the conductive element 111 may be conformally aligned with the hole wall 10s and form another opening therein. Then, insulating material is filled into the aforementioned opening, and drilling is performed to form the insulating element 113 with another opening. Finally, the conductive element 112 is formed in the aforementioned opening.

[0025] In this embodiment, in FIG1A, conductive element 111 and conductive element 112 can be perpendicularly penetrating the substrate layer 10, so the top view of FIG1A and the bottom view of FIG1B have the same outline. In addition, in this embodiment, conductive element 111 is a closed ring structure, while conductive element 112 is a point structure in the form of a metal pillar. However, the present invention is not limited to this, and the present invention may also have other embodiments.

[0026] In one embodiment, as shown in FIG1C, the difference between substrate 100A in FIG1C and substrate 100 in FIG1A is that the through-hole 110A of substrate 100A further includes another conductive element 114 in the form of a metal pillar-shaped dot structure, wherein the insulating element 113 can space the conductive elements 111, 112, and 114 to make them independent of each other within the through-hole 110, forming at least three trace designs. Here, although only two conductive elements in the form of metal pillar-shaped dot structures are shown, the number of conductive elements in the form of metal pillar-shaped dot structures can be determined according to the actual design requirements, for example, there can be three, four, or more.

[0027] In one embodiment, as shown in FIG1D, the difference between substrate 100B in FIG1D and substrate 100 in FIG1A is that the conductive elements 111 and 112B of the through-hole 110B of substrate 100B are both closed-loop annular structures. Furthermore, substrate 100B includes another conductive element 115 and another insulating element 116, wherein the insulating element 116 is configured to space the conductive elements 112B and 115 apart, such that the conductive elements 111, 112B, and 115 within the through-hole 110B are electrically independent of each other. Although only one conductive element with a metal pillar-like dot structure is shown here, the number of conductive elements with a metal pillar-like dot structure can be determined according to actual design requirements; for example, there can be two or more.

[0028] In one embodiment, as shown in FIG1E, the difference between substrate 100C in FIG1E and substrate 100A in FIG1B is that the conductive element 111C of the through hole 110C of substrate 100C is a non-closed type with a ring structure having two arc-shaped segments, which increases the number of lines. Therefore, under the same required line density, the number of through holes can be further reduced, thereby more effectively improving product reliability. However, the present invention is not limited to this.

[0029] In one embodiment, as shown in FIG1F, the difference between substrate 100D in FIG1F and substrate 100C in FIG1E is that the conductive element 111D of the through hole 110D of substrate 100D is a non-closed ring structure with three arc-shaped segments, and further includes another conductive element 117, that is, there are three metal pillar-type point structures (conductive element 112, conductive element 114, conductive element 117). Here, although only the embodiments of FIG1E and FIG1F are shown, the number of arc-shaped segments and the number of multiple metal pillar-type point structures can be determined according to the actual design requirements, for example, there can be four or more. Here, the number of arc-shaped segments and the number of multiple metal pillar-type point structures are the same, but the present invention is not limited to this, and the number of arc-shaped segments and the number of multiple metal pillar-type point structures can also be different.

[0030] It should be noted that since the conductive elements 111 and 112 in Figures 1C, 1D, 1E, and 1F can also be perpendicular to the substrate layer 10 as shown in Figures 1A and 1B, the bottom views of Figures 1C, 1D, 1E, and 1F can have the same outline as their top views. For the sake of simplicity, they are not shown separately in this article. However, since the top view and bottom view of the substrate 100E shown in Figures 2A and 2B have different outlines, they will be further explained below.

[0031] In substrate 100E, as shown in Figure 2A, its top view outline can be the same as that in Figure 1E, while as shown in Figure 2B, its bottom view outline can be different from that in Figure 1E. Specifically, the outlines of the multiple top surfaces TS of the multiple arc-shaped segments of the conductive element 111E of the through-hole 110E of substrate 100E are staggered with the outlines of the multiple bottom surfaces BS of the multiple arc-shaped segments. For example, there is a gap 101 (which can be regarded as the first gap) between two adjacent top surfaces TS, and there is a gap 102 (which can be regarded as the second gap) between two adjacent bottom surfaces BS, and the gaps 101 and 102 do not overlap in the orthographic projection direction. In this way, staggered routing designs can be used in subsequent applications, improving the flexibility of circuit layout, which will be further explained in Figure 5.

[0032] Figures 3, 4, 5, and 6 are partial schematic cross-sectional views illustrating a substrate and its application according to some embodiments of the present invention. In Figures 1A, 1C, 1D, 1E, 1F, and 2A, the top view is taken from above the paper. Corresponding to product applications, as shown in Figures 3 to 6, the top of the paper may represent a fine circuit. Furthermore, in Figures 1B and 2B, the bottom view is taken from below the paper. Corresponding to product applications, as shown in Figures 3 to 6, the bottom of the paper may represent a coarse circuit.

[0033] Please refer to Figure 3. The electronic device 20 of this embodiment includes a substrate 200, a chip 210, and a circuit board 220. Specifically, the substrate 200 may include a core layer composed of the substrate 100, substrate 100A, and substrate 100C, and a circuit structure 201 including a top conductive trace 201a and a bottom conductive trace 201b disposed on the base layer 10. Furthermore, the chip 210 can be disposed on the top surface 200t of the substrate 200 and electrically connected to the top conductive trace 201a via solder balls 211, while the circuit board 220 can be disposed on the bottom surface 200b of the substrate 200 and electrically connected to the bottom conductive trace 201b via solder balls 221. The chip 210 may further include a circuit layer 212 (pad 212a and passivation layer 212b surrounding it) electrically connected to the solder balls 211, and the circuit board 220 may further include a circuit layer 222 (pad 222a and passivation layer 222b surrounding it) electrically connected to the solder balls 221.

[0034] Please refer to Figures 1A, 1B, 1C, and 3. In this embodiment, the conductive elements 111 and 112 of the through-hole 110 in the substrate 100 can be electrically connected simultaneously to the same top conductive trace 201a and the same bottom conductive trace 201b. Similarly, the conductive elements 111, 112, and 114 of the through-hole 110A in the substrate 100A can also be electrically connected simultaneously to the same top conductive trace 201a and the same bottom conductive trace 201b. Therefore, when one of the multiple conductive elements in the through-hole 110 / through-hole 110A is damaged, the other conductive elements can still continue to operate. In this way, the repair function can be realized, improving the product yield. On the other hand, the substrate 100C may have two independent lines (a ring structure connected to the same layer line). For example, an arc-shaped section of the conductive element 111C of the through hole 110C in the substrate 100C and the conductive element 112 can be electrically connected to the same top conductive trace 201a and the same bottom conductive trace 201b (as shown in the left part of the figure). Another arc-shaped section of the conductive element 111C of the through hole 110C in the substrate 100C and the conductive element 114 can be electrically connected to the same top conductive trace 201a and the same bottom conductive trace 201b, which are different from those mentioned above (as shown in the right part of the figure). However, the present invention is not limited to this.

[0035] Please refer to Figure 4. The difference between the electronic device 30 in Figure 4 and the electronic device 20 in Figure 3 is that the substrate 300 may include a core layer composed of the substrates 100A and 100B described above, and a circuit structure 204 including a top conductive trace 201a, a bottom conductive trace 201b, a three-layer top redistribution layer 202 (including an internal conductive trace 202a and an internal dielectric layer 202b) and a three-layer bottom redistribution layer 203 (including an internal conductive trace 203a and an internal dielectric layer 203b).

[0036] Please refer to Figures 1C, 1D, and 4. In this embodiment, the substrate 100A can be designed similarly to that in Figure 3, and has a repair function, which will not be described in detail here. The conductive elements 111, 112B, and 115 of the through-hole 110B in the substrate 100B can be electrically connected to the internal conductive traces 202a of different layers in the top redistribution layer 202 and the internal conductive traces 203a of different layers in the bottom redistribution layer 203. In this way, the conductive elements 111, 112B, and 115 in the same through-hole 110B can be converted into multiple lines and redistributed through the circuit structure 204. Therefore, under the same required circuit density, the number of through-holes can be further reduced and / or the size of the through-holes can be increased, making the substrate more competitive. However, the present invention is not limited to this.

[0037] Please refer to Figure 5. The difference between the electronic device 40 in Figure 5 and the electronic device 30 in Figure 4 is that the substrate 400 may include a core layer composed of the substrates 100B and 100D described above. Specifically, as shown in Figures 1D, 1F and 5, the substrate 100B can be similar to the design in Figure 4, which will not be described in detail here. The conductive elements 111, 112, 114 and 117 of the same through-hole 110D in the substrate 100D can also be converted into multiple lines and redistributed through the same or different layers in the circuit structure 204. Therefore, under the same required line density, the number of through-holes can be further reduced and / or the size of the through-holes can be increased, making the substrate more competitive. However, the present invention is not limited to this.

[0038] Please refer to Figure 6. The difference between the electronic device 50 in Figure 6 and the electronic device 20 in Figure 3 is that the substrate 500 may include a core layer composed of the aforementioned substrates 100A, 100C, and 100E. Specifically, as shown in Figures 1C, 1E, 2A, 2B, and 6, substrates 100A and 100C can be similar to the design in Figure 3. Since their through holes 110A and 110C vertically penetrate the base layer 10, they can form a conductive path CR1 as shown in Figure 6 in a vertical conductive manner. The through holes 110E in substrate 100E interlacedly penetrate the base layer 10, thus forming a conductive path CR2 as shown in Figure 6 in an interlaced conductive manner, further enhancing layout flexibility. However, the present invention is not limited to this.

[0039] It should be noted that the above-mentioned circuit structures 201 and 204 are merely illustrative examples. Depending on the actual design requirements, any suitable circuit and number of layers can be used, and those skilled in the art can manufacture them using any suitable methods and materials. Furthermore, the dotted area R1 can be replaced with other components and made with suitable electrical connections, such as an interposer, a fan-out fine circuit structure, or the like. Similarly, the dotted area R2 can also be replaced with other components and made with suitable electrical connections, such as other fan-out thick circuit structures or the like. Moreover, the above-mentioned chip 210 and circuit board 220 can also be selected from any suitable types based on application requirements. This invention does not impose any limitations. For example, the application requirements of the above-mentioned substrates 100, 100A, 100B, 100C, 100D, 100E, 200, 300, 400, and 500 are, for example, applied to micro LED structures, microelectromechanical systems (MEMS) structures, wafer-level RF switch structures, or the like.

[0040] In summary, the present invention uses insulating and low-cost materials such as glass / ceramics to replace silicon substrates in the substrate layer, and through the design of insulating components, at least two independent traces can be designed within the vias to improve via quality. Based on this, the substrate of the present invention has good product reliability while effectively reducing manufacturing costs.

[0041] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

[0042] 10: Basal layer 20, 30, 40, 50: Electronic devices 10s: Hole wall 100, 100A, 100B, 100C, 100D, 100E, 200, 300, 400, 500: substrate 101, 102: Gap 110, 110A, 110B, 110C, 110D, 110E: Perforation 111, 111C, 111D, 111E, 112, 112B, 114, 115, 117: Conductive components 113, 116: Insulating components 200t: Top surface 200b: Bottom surface 201, 204: Line Structure 201a, 201b: Conductive traces 202, 203: Rewire Layer 202a, 203a: Internal conductive traces 202b, 203b: Dielectric layer 210: Chip 211, 221: Welding balls 212, 222: Line Layer 212a, 222a: Seam Pads 212b, 222b: Passivation layer 220: Circuit board CR1, CR2: Conductive paths BS: Bottom TS: Top surface R1, R2: Dashed line area

Claims

1. A substrate, comprising: A substrate layer, wherein the substrate layer is made of glass or ceramic; and a perforation, comprising: a first conductive element; a second conductive element, the second conductive element being a point structure in the form of a metal pillar; and an insulating element, spaced apart from the first conductive element and the second conductive element, such that the first conductive element and the second conductive element are electrically independent of each other within the perforation.

2. The substrate as claimed in claim 1, wherein the material of the insulating element is the same as or different from the material of the base layer.

3. The substrate as claimed in claim 1, wherein the first conductive element is in direct contact with the hole wall of the substrate layer, and the insulating element is disposed between the first conductive element and the second conductive element.

4. The substrate as claimed in claim 3, wherein the first conductive element is a closed-loop structure.

5. The substrate as claimed in claim 4 further includes a third conductive element in a closed-loop annular structure, wherein the third conductive element is disposed between the first conductive element and the second conductive element and is electrically independent of each other.

6. The substrate as claimed in claim 3, wherein the first conductive element is a non-closed annular structure having multiple arc-shaped segments, and the second conductive element is a point structure of the form of a single or multiple metal pillars.

7. The substrate of claim 6, wherein the contours of the plurality of top surfaces of the plurality of arcuate segments are offset from the contours of the plurality of bottom surfaces of the plurality of arcuate segments.

8. The substrate as claimed in claim 7, wherein a first notch is provided between two adjacent top surfaces, a second notch is provided between two adjacent bottom surfaces, and the first notch and the second notch do not overlap in the orthographic projection direction.

9. The substrate as claimed in claim 1, further comprising a circuit structure disposed on the substrate layer, wherein the first conductive element and the second conductive element are electrically connected outside the via to the same conductive trace in the circuit structure.

10. The substrate as claimed in claim 1, further comprising a circuit structure disposed on the substrate layer, wherein the first conductive element and the second conductive element are electrically connected, respectively, to different conductive traces in the circuit structure outside the via.

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