Integrated circuit device including a power via

Abstract

An integrated circuit includes: a cell transistor including: a nanosheet stack including nanosheets spaced apart from each other in a vertical direction; a gate electrode on the nanosheet stack and extending in a horizontal direction; and a first source / drain region connected to the nanosheet stack; a back contact beneath the cell transistor and connected to the first source / drain region; a first power via at a vertical level lower than that of the back contact and connected to the back contact; a front wiring structure on and connected to the cell transistor; and a back wiring structure beneath the first power via and connected to the cell transistor. The back wiring structure is configured such that connected to the first power via and the back contact. And a lower surface of the first power via does not overlap the back contact in the vertical direction and includes a recess.

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