Semiconductor package warpage and alignment management
TW202641395APending Publication Date: 2026-10-01ARM LTD
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Patent Information
- Application Number
- TW115106005
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-03-17
- Filing Date
- 2026-02-13
- Publication Date
- 2026-10-01
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Abstract
An integrated circuit is attached to a substrate by separating them using one or more spacers and by a plurality of solder balls, and aligning them using at least one alignment element. A clamping mechanism biases the integrated circuit and substrate toward one another and coplanar to one another, and the integrated circuit, the substrate, and the clamping mechanism are heated to reflow the plurality of solder balls. The heat is removed, causing the plurality of reflowed solder balls to solidify, and the clamping mechanism is removed. The plurality of solder balls is underfilled, further securing the integrated circuit to the substrate.
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