Semiconductor testing method
TW202642176APending Publication Date: 2026-10-16TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information
- Application Number
- TW114115850
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-03-31
- Filing Date
- 2025-04-28
- Publication Date
- 2026-10-16
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Abstract
A method is provided. The method includes: extending a first probe needle of a probe card assembly to contact a first electrical bump of an integrated circuit (IC) die, the first probe needle including: a first crystalline layer extending from a first end of the first probe needle to a second end of the first probe needle, the first crystalline layer having a first resistivity; and a second crystalline layer extending from the first end to the second end and positioned adjacent the first crystalline layer, the second crystalline layer having crystalline structure that is different than that of the first crystalline layer and having a second resistivity that is less than the first resistivity. The method includes: extending a second probe needle of the probe card assembly to contact a second electrical bump of the IC die; and performing an electrical test on the IC die by a test head in electrical communication with the probe card assembly, including: transmitting a test signal from the test head to the first electrical bump via the first probe needle; and receiving a response signal associated with the test signal from the second electrical bump via the second probe needle.
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