Display apparatus

Abstract

An display apparatus is provided. The display apparatus includes a pixel array, a timing controller and a source driver. The pixel array has a plurality of liquid crystal pixels and a plurality of emission pixels. The timing controller receives display data to provide driving mode data and pixel grayscale data, wherein the driving mode data is based on disposing positions of the liquid crystal pixels and the emission pixels. The source driver is coupled between the pixel array and the timing controller, and receives the driving mode data and the pixel grayscale data to provide a plurality of liquid crystal source voltages and a plurality of emission source voltages based on the driving mode data and the pixel grayscale data.

Description

Technical Field

[0001] This invention relates to a display device, and more particularly to a display device that simultaneously has liquid crystal pixels and self-emissive pixels. Prior Technology

[0002] Currently, display panels mainly include liquid crystal display (LCD) panels, micro light-emitting diode (uLED) panels, and organic light-emitting diode (OLED) panels. Each type of panel requires a different driving method. If different panels are to be driven on the same display device to realize a display screen spliced ​​with heterogeneous panels, source drivers corresponding to each type of panel are required, which increases the number of source driver chips and increases the overall hardware cost. Summary of the Invention

[0003] The present invention provides a display device in which the source driver can provide liquid crystal source voltage with polarity alternating over time for liquid crystal pixels and provide self-emissive pixel source voltage with fixed polarity for self-emissive pixels, thereby improving the versatility of the source driver, simplifying the implementation architecture, and reducing the overall hardware cost of the display device.

[0004] The display device of the present invention includes a pixel array, a timing controller, and a source driver. The pixel array has a plurality of liquid crystal pixels and a plurality of self-emissive pixels. The timing controller receives display data to provide driving mode data and pixel grayscale data, wherein the driving mode data is based on the configuration positions of the liquid crystal pixels and the self-emissive pixels. The source driver is coupled between the pixel array and the timing controller, and receives the driving mode data and the pixel grayscale data to provide a plurality of liquid crystal source voltages and a plurality of self-emissive source voltages based on the driving mode data and the pixel grayscale data. The liquid crystal source voltages are voltages supplied to the liquid crystal pixels whose polarity relative to a common voltage varies over time, and the self-emissive source voltages are voltages supplied to the self-emissive pixels whose polarity relative to the common voltage does not vary over time.

[0005] Based on the above, the display device of the present invention can simplify the hardware circuit implementation of the display device and reduce the number of source driver chips / timing controllers by determining the position of liquid crystal pixels and self-emissive pixels based on driving mode data, and then provide liquid crystal source voltage or self-emissive source voltage accordingly.

[0006] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings for detailed explanation. Simple Explanation of the Diagram

[0007] Figure 1A is a system schematic diagram of a display device according to an embodiment of the present invention. Figure 1B is a waveform diagram of the liquid crystal source voltage according to an embodiment of the present invention. Figure 1C is a waveform diagram of the liquid crystal source voltage according to an embodiment of the present invention. Figure 2 is a schematic diagram of source driver data for a single screen according to an embodiment of the present invention. Figure 3 is a schematic diagram of the field definition of driving mode data according to an embodiment of the present invention. Figure 4 is a schematic diagram of a source driver system according to an embodiment of the present invention. Figure 5 is a schematic diagram of a source channel according to an embodiment of the present invention. Figure 6 is a schematic diagram of the application of a display device according to an embodiment of the present invention. Figure 7 is a schematic diagram of the application of a display device according to another embodiment of the present invention. Implementation

[0008] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with their meanings in the context of the relevant technology and this invention, and will not be interpreted as having idealized or overly formal meanings unless expressly defined herein.

[0009] It should be understood that although the terms “first,” “second,” “third,” etc., may be used herein to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, and / or parts should not be limited by these terms. These terms are used only to distinguish one element, component, region, layer, or part from another. Therefore, “first element,” “component,” “region,” “layer,” or “part” discussed below may be referred to as a second element, component, region, layer, or part without departing from the teachings of this document.

[0010] The terminology used herein is for the purpose of describing particular embodiments only and is not restrictive. As used herein, unless the content clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to include the plural forms, including “at least one.” “or” signifies “and / or.” As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. It should also be understood that, when used in this specification, the terms “comprising” and / or “comprising” specify the presence of the stated features, areas, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, areas, integrals, steps, operations, elements, components, and / or combinations thereof.

[0011] Figure 1A is a system schematic diagram of a display device according to an embodiment of the present invention. Figure 1B is a waveform diagram of the liquid crystal source voltage according to an embodiment of the present invention. Figure 1C is a waveform diagram of the liquid crystal source voltage according to an embodiment of the present invention. Referring to Figures 1A-1C, in this embodiment, the display device 100 includes a timing controller 110, a source driver 120, and a pixel array 130, wherein the source driver 120 is coupled between the pixel array 130 and the timing controller 110.

[0012] The pixel array 130 has multiple liquid crystal pixel DPXs, multiple self-emissive pixel EPXs, and multiple source lines Lsrc coupled to the liquid crystal pixel DPXs and the self-emissive pixel EPXs. The timing controller 110 receives display data DATAdis to provide drive mode data DMS and pixel grayscale data DATARGB. The drive mode data DMS is provided based on the distribution positions of the liquid crystal pixel DPXs and self-emissive pixel EPXs. The distribution positions of the liquid crystal pixel DPXs and self-emissive pixel EPXs can be stored in the timing controller 110 or in other storage devices (not shown) in the display device 100, but the embodiments of the present invention are not limited thereto.

[0013] The source driver 120 receives drive mode data DMS and pixel grayscale data DATARGB, and provides multiple liquid crystal source voltages Vsoutd and multiple self-emissive source voltages Vsoute based on the drive mode data DMS and pixel grayscale data DATARGB. The liquid crystal source voltage Vsoutd is provided to the liquid crystal pixel DPX and its voltage polarity relative to the common voltage VCOM changes over time. The self-emissive source voltage Vsoute is provided to the self-emissive pixel EPX and its voltage polarity relative to the common voltage VCOM does not change over time.

[0014] Based on the above, since the source driver 120 can determine the position of the liquid crystal pixel DPX and the self-emissive pixel EPX based on the driving mode data DMS, and then correspondingly control each source channel (source channels 420 and 430 as shown in Figure 4) to provide liquid crystal source voltage Vsoutd or self-emissive source voltage Vsoute, the implementation of hardware circuitry can be simplified, the number of source driver chips / timing controllers can be reduced, and the cost can be reduced.

[0015] In other words, in this embodiment, the output of the timing controller 110 carries a setting code (i.e., drive mode data DMS) to control the state of the output pins of the source driver 120. Therefore, when the display device 100 is powered on, it can be determined that the chip / channel of each source driver 120 is driving the liquid crystal pixel DPX / emitting pixel EPX.

[0016] In this embodiment of the invention, the self-emissive pixel EPX may include at least one micro light-emitting diode (uLED) pixel and / or at least one organic light-emitting diode (OLED) pixel, but this embodiment of the invention is not limited thereto.

[0017] In this embodiment, each source line Lsrc represents a plurality of liquid crystal pixels (DPX) or a plurality of self-emissive pixels (EPX). However, in this embodiment of the invention, each source line Lsrc can be coupled to a plurality of liquid crystal pixels (DPX) and self-emissive pixels (EPX) arranged in any order, but this embodiment of the invention is not limited thereto.

[0018] Figure 2 is a schematic diagram of source driver data for a single screen according to an embodiment of the present invention. Referring to Figures 1A and 2, in this embodiment, source driver data for a single screen is shown, and the source driver data is transmitted, for example, using an integrated-stream protocol (ISP). As shown in Figure 2, the source driver data includes first to last line data, setting line data, and vertical blank line data.

[0019] The data structures of the first to last rows are largely the same, and each row is encapsulated in data packets BK, DMS_1, DMS_2, BAC, POL, DATARGB, and EOL. Data packets DMS_1 and DMS_2 constitute the driving mode data DMS, the DATARGB data packet transmits the pixel grayscale data DATARGB, and the POL data packet transmits the polarity data POL. The setting row data is encapsulated in data packets BK, BAC, Setting, DATAREG+DATAGAMMA, and EOL. The vertical blank row data is encapsulated in data packets BK, BAC, BKPOL, and EOL.

[0020] According to the integrated streaming protocol, each data packet consists of 9 bits. Before each line of data is entered, data packets BK, BAC, and POL are input. After the display data (e.g., pixel grayscale data DATARGB) is entered, a data packet EOL is input, indicating the end of a line. Data packets BK and BAC are fixed data, while data packet POL is divided into POL=+ and POL=-, representing the flipping mode of the data in this line. After the valid display signal input for each screen is completed, setting line data (i.e., data packets BK, BAC, Setting, DATAREG+DATAGAMMA, and EOL) is input to set the registers in the source driver (e.g., 120). Then, vertical blank line data (i.e., data packets BK, BAC, BKPOL, and EOL) is input line by line to control the display of blanking areas.

[0021] In this embodiment, the driving mode data (DMS) is composed of, for example, two data packets. However, the driving mode data (DMS) can be composed of one data packet or three or more data packets, depending on the circuit design. This embodiment of the invention is not limited to this. Furthermore, the driving mode data (DMS) in each row of data can determine the arrangement of different driving methods for each column of liquid crystal pixel DPX / self-emissive pixel EPX in the pixel array 130, that is, determine the driving method of each source channel when the source driver 120 drives each column of liquid crystal pixel DPX / self-emissive pixel EPX in the pixel array 130.

[0022] Figure 3 is a schematic diagram of the field definition of drive mode data according to an embodiment of the present invention. Referring to Figures 1A, 2 and 3, in this embodiment, the drive mode data DMS is composed of data packets DMS_1 and DMS_2, and the drive mode data DMS includes an enable field EN (e.g., including bits [0] of data packet DMS_1), a channel number field CH_NUM (e.g., including bits [4:1] of data packet DMS_1), and a channel start field CH_SEL (e.g., including bits [7:5] of data packet DMS_1 and bits [7:0] of data packet DMS_2).

[0023] The enable field EN is used to determine the driving mode of the corresponding column in the pixel array 130, that is, to confirm whether the source line Lsrc (corresponding source channel) in each column of pixels is coupled to the self-emissive pixel EPX. Furthermore, when the source line Lsrc (corresponding source channel) in the corresponding column is not coupled to the self-emissive pixel EPX, the enable field EN can be 0, indicating that all pixels in the corresponding column are liquid crystal pixels (DPX), and therefore can be driven only in liquid crystal driving mode; when the source line Lsrc in the corresponding column is coupled to the self-emissive pixel EPX, the enable field EN can be 1, indicating that some pixels are liquid crystal pixels (DPX), and therefore need to be driven in micro LED / organic light-emitting diode (OLED) driving mode.

[0024] The Channel Quantity field CH_NUM indicates the number of source channels coupled to the self-emissive pixel EPX in the corresponding column. For example, the maximum value that the bit range [4:1] of the data packet DMS_1 can determine is 3n, where n=24. The Channel Start field CH_SEL indicates the starting position of the source channels coupled to the self-emissive pixel EPX in the corresponding column. In this embodiment of the invention, the packet setting method of the Channel Quantity field CH_NUM and the Channel Start field CH_SEL can be determined according to the circuit design, and this embodiment of the invention is not limited to this definition method.

[0025] Based on the above, by adding drive mode data DMS to the source driver data output by the timing controller 110, the source driver 120 can identify whether the source line Lsrc contains a source channel coupled to the self-illuminating pixel EPX and its number, so that the source driver 120 can switch the drive mode when the corresponding source channel is output.

[0026] Figure 4 is a schematic diagram of a source driver system according to an embodiment of the present invention. Referring to Figures 1A, 2 to 4, in this embodiment, the source driver 120 is, for example, source driver 120a, and source driver 120a includes a decoding circuit 410 and multiple source channels (such as 420, 430). The decoding circuit 410 receives drive mode data DMS, pixel grayscale data DATARGB, and polarity data POL (e.g., data transmitted by data packets POL) to provide multiple sub-pixel data (such as DATA_pixel1~DATA_pixel4), multiple drive mode signals (such as Sdm1~Sdm2), and polarity switch signal SWPOL.

[0027] Source channels (e.g., 420, 430) are coupled to decoding circuit 410. Each source channel 420, 430 receives two consecutive sub-pixel data entries (i.e., a pair of sub-pixel data) from sub-pixel data DATA_pixel1~DATA_pixel4, and receives one corresponding drive mode signal (e.g., Sdm1~Sdm2) and polarity switch signal SWPOL to provide a pair of liquid crystal source voltages Vsoutd or a pair of self-emissive source voltages Vsoute.

[0028] For example, the source channel 420 receives sub-pixel data DATA_pixel1 (corresponding to the first sub-pixel data) and DATA_pixel2 (corresponding to the second sub-pixel data), receives the drive mode signal Sdm1 (corresponding to the first drive mode signal) and the polarity switch signal SWPOL, so as to provide a pair of liquid crystal source voltages Vsoutd or a pair of self-emissive source voltages Vsoute.

[0029] Figure 5 is a schematic diagram of a source channel system according to an embodiment of the present invention. Referring to Figures 1A, 2 to 5, in this embodiment, source channel 420 is used as an example for illustration. Other source channels (such as 430) can refer to the example of source channel 420, but the embodiments of the present invention are not limited thereto. Source channel 420 is exemplified by source channel 420a, which includes a first switch SW1, a second switch SW2, a first potential converter LSR1, a second potential converter LSR2, a multiplexing circuit MUX, a first digital-to-analog converter DAC1, a second digital-to-analog converter DAC2, a third switch SW3, and a fourth switch SW4.

[0030] The first switch SW1 has a first terminal for receiving first sub-pixel data DATA_pixel1, a second terminal for receiving sub-pixel data DATA_pixel2, a control terminal for receiving polarity switch signal SWPOL, and an output terminal. The second switch SW2 has a first terminal for receiving sub-pixel data DATA_pixel2, a second terminal for receiving sub-pixel data DATA_pixel1, a control terminal for receiving polarity switch signal SWPOL, and an output terminal.

[0031] The first potentiometer LSR1 has an input terminal coupled to the output of the first switch SW1, a positive power supply terminal receiving the positive system voltage PAVDD, a negative power supply terminal receiving the ground voltage AGND, and an output terminal. The second potentiometer LSR2 has an input terminal coupled to the output of the second switch SW2, a positive power supply terminal, a negative power supply terminal receiving the ground voltage AGND, and an output terminal. The multiplexing circuit MUX has a first input terminal receiving the negative system voltage NAVDD, a second input terminal receiving the positive system voltage PAVDD, a control terminal receiving the drive mode signal Sdm1, and an output terminal coupled to the positive power supply terminal of the second potentiometer LSR2.

[0032] The first digital-to-analog converter DAC1 has an input terminal coupled to the output terminal of the first potentiometer LSR1, and an output terminal. The second digital-to-analog converter DAC2 has an input terminal coupled to the output terminal of the second potentiometer LSR2, and an output terminal. The third switch SW3 has an input terminal coupled to the output terminal of the first digital-to-analog converter DAC1, a control terminal receiving the polarity switch signal SWPOL, a first output terminal coupled to the first source line Lsrc1, and a second output terminal coupled to the second source line Lsrc2. The fourth switch SW4 has an input terminal coupled to the output terminal of the second digital-to-analog converter DAC2, a first output terminal coupled to the second source line Lsrc2, and a second output terminal coupled to the first source line Lsrc1.

[0033] In this embodiment, the first potential converter LSR1 and the second potential converter LSR2 are designed to perform in-phase logic potential switching when receiving a positive system voltage PAVDD, and to perform in-phase logic potential switching when receiving a negative system voltage NAVDD.

[0034] Therefore, when used to drive the liquid crystal pixel DPX, the drive mode signal Sdm1 controls the multiplexing circuit MUX to provide a negative system voltage NAVDD to the second potential converter LSR2, so that the first digital-to-analog converter DAC1 and the second digital-to-analog converter DAC2 alternately convert each of the sub-pixel data DATA_pixel1 and DATA_pixel2 into a positive and negative voltage (as shown in Figure 1B), thereby providing a pair of liquid crystal source voltages Vsoutd whose voltage polarity varies with time to the first source line Lsrc1 and the second source line Lsrc2; Conversely, when used to drive the self-emissive pixel EPX, the drive mode signal Sdm1 controls the multiplexing circuit MUX to provide a positive system voltage PAVDD to the second potential converter LSR2, so that the first digital-to-analog converter DAC1 and the second digital-to-analog converter DAC2 alternately convert each of the sub-pixel data DATA_pixel1 and DATA_pixel2 into a voltage with only positive polarity (as shown in Figure 1C), thereby providing a pair of self-emissive source voltages Vsoute with voltage polarity that does not change with time to the first source line Lsrc1 and the second source line Lsrc2.

[0035] In this embodiment of the invention, the polarity switching signal SWPOL can be periodically switched to alternately provide sub-pixel data DATA_pixel1 and DATA_pixel2 to the first digital-to-analog converter DAC1 and the second digital-to-analog converter DAC2.

[0036] In this embodiment of the invention, the first source line Lsrc1 and the second source line Lsrc2 can be two adjacent source lines Lsrc, but this embodiment of the invention is not limited thereto.

[0037] Based on the above, the source channel 420a of the source driver (such as 120a) has a switching circuit inside. The driving voltage of the output pin can be switched between the self-emissive source voltage Vsoute and the liquid crystal source voltage Vsoutd by setting the multiplexing circuit MUX. That is, the source driver 120a (or source channel 420a) can be used to simultaneously couple the source line Lsrc to the liquid crystal pixel DPX and the self-emissive pixel EPX. Therefore, it is not necessary to design separate circuits for the liquid crystal pixel DPX and the self-emissive pixel EPX, thereby simplifying the circuit design and reducing the hardware cost.

[0038] Figure 6 is a schematic diagram of the application of a display device according to an embodiment of the present invention. Referring to Figures 1A and 6, in this embodiment, the display device 100 is applied, for example, to a folding screen. By combining liquid crystal pixel DPX and self-emissive pixel EPX, the width of the splicing seam can be reduced, and the viewing experience can be more complete.

[0039] In this embodiment, a flexible substrate SB3 connects to transparent substrates SB1 and SB2. Liquid crystal pixel DPXs can be disposed on transparent substrates SB1 and SB2, and self-emissive pixel EPXs can be disposed on the flexible substrate SB3 as splicing points between liquid crystal pixel DPXs. Therefore, compared to foldable screens made with all-self-emissive pixel EPXs (such as micro-light-emitting diode (uLED) pixels and / or organic light-emitting diode (OLED) pixels), foldable screens using all-self-emissive pixel EPXs as splicing points between liquid crystal pixel DPXs can reduce manufacturing costs.

[0040] Figure 7 is a schematic diagram illustrating the application of a display device according to another embodiment of the present invention. Referring to Figures 1A and 7, in this embodiment, the display device 100 is applied, for example, to a liquid crystal television, wherein the liquid crystal pixel DPX can be disposed on one side of the transparent substrate SB4, while the self-emissive pixel EPX and the backlight module BLM can be disposed on the other side of the transparent substrate SB4 opposite to the liquid crystal pixel DPX. The self-emissive pixel EPX can be disposed close to the edge of the transparent substrate SB4, but this embodiment of the present invention is not limited thereto.

[0041] Since the ambient effects of currently available flat-screen TVs all require the addition of light strips and controllers to project the TV scene onto the back of the screen, this invention uses the heterogeneous splicing effect of the display device 100 to attach the connecting parts of the self-illuminating pixels EPX to the back of the flat-screen TV, achieving accurate colors consistent with the displayed image, without the need for additional controllers and light strips.

[0042] In summary, the display device of the present invention can simplify the hardware circuit implementation of the display device and reduce the number of source driver chips / timing controllers by determining the positions of liquid crystal pixels and self-emissive pixels based on driving mode data, and then providing liquid crystal source voltage or self-emissive source voltage accordingly.

[0043] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

[0044] 100: Display device 110: Timing Controller 120, 120a: Source driver 130:Pixel array 410: Decoding circuit 420, 420a, 430: Source Channel AGND: Grounding voltage BK, DMS_1, DMS_2, BAC, EOL, Setting, DATAREG+DATAGAMMA, BKPOL: Data Packets BLM: Backlight Module CH_NUM: Channel Quantity Field CH_SEL: Channel start field DAC1: First Digital-to-Analog Converter DAC2: Second Digital-to-Analog Converter DATA_pixel1~DATA_pixel4: sub-pixel data DATAdis: Display data DATARGB: Pixel grayscale data\data packet DMS: Driver Mode Data DPX: LCD pixel EN: Enable Field EPX: Self-illuminating pixels LSR1: First Potentiometer LSR2: Second Potentiometer Lsrc: Source line Lsrc1: First source pole line Lsrc2: Second source pole line MUX: Multiplexing circuit NAVDD: Negative system voltage PAVDD: Positive system voltage POL: Data Packet\Polarity Data SB1, SB2, SB4: Transparent substrate SB3: Flexible substrate Sdm1, Sdm2: Drive mode signals SW1: First switch SW2: Second switch SW3: Third switch SW4: Fourth Switch SWPOL: Polarity switch signal VCOM: Common Voltage Vsoutd: Liquid crystal source voltage Vsoute: Self-emitting source voltage

Claims

1. A display device, comprising: A pixel array having multiple liquid crystal pixels and multiple self-emissive pixels; a timing controller receiving display data to provide driving mode data and pixel grayscale data, wherein the driving mode data is based on an arrangement position of the liquid crystal pixels and the self-emissive pixels; and a source driver coupled between the pixel array and the timing controller, and receiving the driving mode data and the pixel grayscale data to provide multiple liquid crystal source voltages and multiple self-emissive source voltages based on the driving mode data and the pixel grayscale data, wherein the liquid crystal source voltages are provided to the liquid crystal pixels and their voltage polarity relative to a common voltage varies with time, and the self-emissive source voltages are provided to the self-emissive pixels and their voltage polarity relative to the common voltage does not vary with time.

2. The display device as claimed in claim 1, wherein the drive mode data includes a enable field, a channel number field, and a channel start field, wherein the enable field is used to determine a drive mode for a corresponding column in the pixel array, the channel number field indicates a number of self-emissive pixels in the corresponding column, and the channel start field indicates a starting position of the self-emissive pixels in the corresponding column.

3. The display device as claimed in claim 1, wherein the source driver comprises: A decoding circuit receives the driving mode data, the pixel grayscale data, and a polarity data to provide multiple sub-pixel data, multiple driving mode signals, and a polarity switch signal; and multiple source channels are coupled to the decoding circuit, and each of the source channels receives a first sub-pixel data and a second sub-pixel data of the sub-pixel data, a first driving mode signal of the driving mode signals, and the polarity switch signal to provide a pair of liquid crystal source voltages or self-emissive source voltages.

4. The display device as claimed in claim 3, wherein each of the source channels comprises: A first switch has a first terminal for receiving first sub-pixel data, a second terminal for receiving second sub-pixel data, a control terminal for receiving a polarity switch signal, and an output terminal; a second switch has a first terminal for receiving second sub-pixel data, a second terminal for receiving first sub-pixel data, a control terminal for receiving the polarity switch signal, and an output terminal; a first potentiometer has an input terminal coupled to the output terminal of the first switch, a positive power supply terminal for receiving a positive system voltage, a negative power supply terminal for receiving a ground voltage, and an output terminal; A second potential converter has an input terminal coupled to the output terminal of the second switch, a positive power supply terminal, a negative power supply terminal receiving the ground voltage, and an output terminal; a multiplexing circuit has a first input terminal receiving a negative system voltage, a second input terminal receiving the positive system voltage, a control terminal receiving the first drive mode signal, and an output terminal coupled to the positive power supply terminal of the second potential converter. A first digital-to-analog converter has an input terminal coupled to the output terminal of the first potentiometer and an output terminal; A second digital-to-analog converter having an input terminal coupled to the output terminal of the second potentiometer and an output terminal; A third switch has an input terminal coupled to the output terminal of the first digital-to-analog converter, a control terminal for receiving the polarity switch signal, a first output terminal coupled to a first source line, and a second output terminal coupled to a second source line. And a fourth switch having an input terminal coupled to the output terminal of the second digital-to-analog converter, a first output terminal coupled to the second source line, and a second output terminal coupled to the first source line, wherein the first source line and the second source line are used to receive the pair of liquid crystal source voltages or the self-emissive source voltages.

5. The display device as claimed in claim 3, wherein the driving mode data, the pixel grayscale data, and the polarity data are encapsulated in a single line of data.

6. The display device as claimed in claim 5, wherein the line of data is transmitted via an integrated-stream protocol (ISP).

7. The display device as claimed in claim 1, wherein the self-emissive pixels include at least one micro light-emitting diode pixel and / or at least one organic light-emitting diode pixel.

Images