Operation method for memory device and memory device

Abstract

Disclosed are a memory device and an operation method for the same. The memory device may be a 3D NAND flash memory with high capacity and high performance. The operation method includes: dividing each of multiple dummy word lines into one of multiple dummy groups; performing a dummy word line programming operation on the multiple dummy word lines. The dummy word line programming operation includes: performing a first dummy word line programming operation on at least one first dummy word line divided into a first dummy group; performing a second dummy word line programming operation on at least one second dummy word line divided into a second dummy group. A programming bias n energy of a first pulse in the first dummy word line programming operation is less than a programming bias n energy of a second pulse in the second dummy word line programming operation. Time points for providing the first pulse and the second pulse to the plurality of dummy word lines respectively are different from each other.

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