Sidewall epi-defined channel for 4f2 dram

Abstract

DRAM process, the trench width can be increased to reduce tapering and roughness. A sacrificial layer may then be epitaxially grown on the trench sidewalls, followed by a layer of epitaxial silicon for the channel. The back gate oxide and metal may then be formed within the trench. The hard mask used to define the silicon fins may be removed to exactly expose the silicon fins for a self-aligned removal process. These fins can then be removed to expose the sacrificial layer, which may also be removed to expose the silicon channel. A relatively thick portion of the sacrificial layer formed at the bottom of the trenches may remain throughout the front side processing to be later used as a stop layer when removing the bulk of the underlying substrate during backside processing.

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