Memory device, manufacturing method thereof, and transistor

Abstract

A memory device, a manufacturing method thereof, and a transistor are provided. The memory device includes: a semiconductor substrate, comprising a memory region; a plurality of first trenches, defined in the semiconductor substrate; a gate insulating layer and a semi-floating gate, arranged in a corresponding one of the first trenches; a plurality of second trenches, defined in the semiconductor substrate, where each of the second trenches is disposed above multiple first trenches, and each of the second trenches is in communication with multiple first trenches disposed in a same row along a first direction; a first isolation layer is arranged on a sidewall of a corresponding one of the second trenches; and an inter-gate dielectric layer and a control gate, arranged in the corresponding one of the second trenches in the memory region. Along a second direction, a width of the control gate is less than that of the semi-floating gate. By arranging first isolation layers on two sides of the control gate, it may be possible to ensure a distance between the control gate and the semiconductor substrate. In this way, it may be possible to effectively reduce electrical leakage and breakdown between the control gate and source / drain.

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