Integrated chip and method of manufacturing the same

Abstract

An integrated chip includes a semiconductor substrate. The substrate includes a bulk region having a first doping type. A first doped region is in the substrate along a first side of the substrate has a second doping type, different than the first doping type. The first doped region forms a first terminal of a single photon avalanche diode (SPAD). A conductive layer extends from a second side of the substrate toward the first side of the substrate and laterally surrounds the SPAD. The integrated chip includes a dielectric layer between a first sidewall of the conductive layer and a first sidewall of the substrate. The integrated chip includes a second terminal of the SPAD along the second side of the substrate. The second terminal has the first doping type and is coupled to the conductive layer along an upper surface and a second sidewall of the conductive layer.

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