Integrated circuit device and method of fabrication

TW202643016APending Publication Date: 2026-10-16TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
TW114134372
Authority / Receiving Office
TW · TW
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-07-10
Filing Date
2025-09-08
Publication Date
2026-10-16

Smart Images

  • Figure TWG2TA001080505_001
    Figure TWG2TA001080505_001
  • Figure TWG2TA001080505_002
    Figure TWG2TA001080505_002
  • Figure TWG2TA001080505_003
    Figure TWG2TA001080505_003
Patent Text Reader

Abstract

An integrated circuit device includes: a die; an interconnect at least partially overlapping the die; and a plurality of bumps where the interconnect and die overlap. The interconnect includes at least a first conductive layer and a second conductive layer, the plurality of bumps includes a first bump and a second bump, each of the first and second conductive layers includes a plurality of signal conductors between the first and second bumps and a plurality of ground conductors between the first and second bumps, and all of the signal conductors in each of the first and second conductive layers between the first bump and the second bump are between corresponding pairs of ground conductors in the corresponding conductive layer, and the pairs of ground conductors are continuously coupled within the first and second conductive layers from a first side to a second side of the plurality of signal conductors.
Need to check novelty before this filing date? Find Prior Art