Semiconductor chip, chip stacked structure and semiconductor package including the same

Abstract

According to some embodiments of the present disclosure, a semiconductor chip includes a device layer having a first surface and a second surface opposite to the first surface and a first wiring structure on the first surface of the device layer. The first wiring structure includes a first via layer having a first via, a first metal layer having a first wiring, the first metal layer being stacked on the first via layer in a first direction perpendicular to the first surface of the device layer, and a first heat-dissipation structure including a first heat-dissipation film having a first portion surrounding a bottom surface and a side surface of the first via. The first heat-dissipation structure includes a 2D material, and an upper surface of the first portion of the first heat-dissipation film contacts a lower surface of the first wiring.

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