Method of selective deposition for forming fully self-aligned vias
Patent Information
- Application Number
- TW107141020
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2018-06-15
- Filing Date
- 2018-11-19
- Publication Date
- 2023-04-11
- Estimated Expiration
- 2038-11-18
Smart Images

Figure TWG2TB001700273_001 
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Figure TWG2TB001700273_003
Abstract
Description
[Technical Field] Cross-reference to related applications: This application relates to and claims priority to the following application: U.S. Provisional Patent Application No. 62 / 588,855, filed November 20, 2017, the entire contents of which are incorporated herein by reference. This application relates to and claims priority to the following application: U.S. Provisional Patent Application No. 62 / 685,847, filed June 15, 2018, the entire contents of which are incorporated herein by reference. This invention relates to semiconductor manufacturing processes and semiconductor devices, and more particularly to a method for selectively depositing thin films using surface pretreatment. [Previous Technology] As device dimensions shrink, the complexity of semiconductor device manufacturing increases. The cost of manufacturing semiconductor devices also rises, necessitating cost-effective solutions and innovations. With the manufacture of even smaller transistors, producing the critical dimension (CD) or resolution of patterned features becomes increasingly challenging. At highly miniaturized technology nodes, selective thin film deposition is a key step in patterning. New deposition methods that provide selective thin film deposition on different material surfaces are needed. [Summary of the Invention] Specific embodiments of the present invention provide a method for selectively depositing thin films using a surface pretreatment. According to one specific embodiment, the method includes: providing a substrate, wherein the substrate includes a dielectric material and a metal layer, and the metal layer has a metal oxide layer thereon; coating the substrate with a metal-containing catalyst layer; treating the substrate with an alcohol solution to remove the metal oxide layer together with the metal-containing catalyst layer thereon from the metal layer; and exposing the substrate to a process gas containing a silanol gas for a period of time to selectively deposit a SiO2 thin film on the metal-containing catalyst layer located on the dielectric material. According to another specific embodiment of the present invention, the method includes: providing a substrate comprising a dielectric material and a metal layer having a metal oxide layer thereon; exposing the substrate to a reactive gas containing molecules forming self-assembled monolayers (SAMs) on the substrate; selectively depositing a metal oxide film on the dielectric material relative to the metal oxide layer by exposing the substrate to a deposition gas; and exposing the substrate to a process gas containing a silanol gas for a period of time to selectively deposit a silicon oxide (SiO2) film on the metal oxide film. According to another specific embodiment, the method includes: providing a substrate, wherein the substrate includes a dielectric material and a metal layer, and the metal layer has a metal oxide layer thereon; exposing the substrate to hydrogen gas excited by a plasma source; selectively depositing a metal oxide film on the dielectric material by exposing the substrate to a deposition gas; and exposing the substrate to a process gas containing silanol gas for a period of time to selectively deposit a SiO2 thin film on the metal oxide film.
Implementation Method
Claims
1. A substrate fabrication method, comprising: providing a substrate comprising a dielectric material, a metal layer, and a metal oxide layer on the metal layer; coating the substrate with a metal catalyst layer; treating the substrate with an alcohol solution, the alcohol solution removing the metal oxide layer and the metal catalyst layer on the metal oxide layer from the metal layer; and exposing the substrate to a process gas containing silanol gas for a period of time to selectively deposit a SiO2 thin film on the metal catalyst layer on the dielectric material.
2. The substrate manufacturing method of claim 1, wherein the metal layer comprises copper (Cu), ruthenium (Ru), cobalt (Co) or tungsten (W), and the oxide metal layer comprises copper oxide, ruthenium oxide, cobalt oxide or tungsten oxide.
3. The substrate manufacturing method of claim 1, wherein the metal catalyst layer comprises aluminum (Al), titanium (Ti), or both aluminum and titanium.
4. The substrate manufacturing process method of claim 1, wherein the step of exposing the substrate to the process gas containing silanol gas is performed at a substrate temperature of about 150°C or lower in the absence of any oxidizing agent and hydrolyzing agent.
5. The substrate manufacturing method of claim 1, wherein the silanol gas is selected from the group consisting of triterpenoid silanol, triterpenoid butyroid silanol and bis(terpenoid butyroid)(isopropoxy)silanol.
6. The substrate manufacturing method of claim 1 further includes: repeating the steps of coating the substrate, treating the substrate with an alcohol solution, and exposing the substrate to a process gas containing silanol gas at least once to increase the thickness of the SiO2 film on the dielectric material.
Citation Information
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