Method and apparatus for substrate stress control

Abstract

The embodiments described herein relate to a method and apparatus for substrate stress control. In some embodiments, the method may include: providing a substrate including a first main side opposite a second main side, wherein a plurality of features are provided on the first main side; performing a metrological scan on the first main side to determine substrate distortion caused by the formation of the plurality of features; and depositing a stress-compensating membrane along the second main side of the substrate, wherein the stress and thickness of the stress-compensating membrane are determined based on the substrate distortion. The method may further include directing ions to the stress-compensating membrane during ion implantation.

Description

Technical Field

[0001] This disclosure relates to stress control in a substrate, and more specifically, to localized stress modulation by implanting on the back side of the substrate to reduce in-plane distortion. [Cross-reference to related applications]

[0002] This application claims priority over U.S. Provisional Patent Application No. 63 / 179,944, filed on April 26, 2021, the entire contents of which are incorporated herein by reference. Prior Technology

[0003] Devices such as integrated circuits, memory devices, and logic devices can be fabricated on substrates such as silicon wafers through a combination of deposition processes, etching, ion implantation, annealing, and other processes. Generally, specific requirements are set for wafer flatness and thickness uniformity. However, various process steps performed during fabrication can alter the stress in the thin film deposited on the wafer and cause elastic deformation, which can lead to significant distortions, including in-plane distortion (IPD) and / or global distortion. Such distortions can cause errors in downstream processes. For example, distortion can lead to overlay errors in processes such as photolithography patterning.

[0004] This embodiment is provided in consideration of these and other factors. Summary of the Invention

[0005] This summary is provided to introduce a set of selected concepts in a simplified form, which are further elaborated below in the detailed description. This summary is not intended to identify key or essential features of the claimed subject matter, nor is it intended to help determine the scope of the claimed subject matter.

[0006] In one embodiment, a method may include: providing a substrate including a first main side opposite a second main side, wherein a plurality of features are provided on the first main side; and performing a metrological scan on the first main side to determine distortions in the substrate caused by the formation of the plurality of features. The method may further include depositing a stress-compensating membrane along the second main side of the substrate, wherein the stress and thickness of the stress-compensating membrane are determined based on the distortions in the substrate; and guiding ions to the stress-compensating membrane during ion implantation.

[0007] In another embodiment, a method may include: providing a substrate including a first main side opposite a second main side, wherein a plurality of features are provided on the first main side; and performing a metrological scan on the first main side to determine distortions in the substrate caused by the formation of the plurality of features. The method may further include depositing a stress-compensating membrane along the second main side of the substrate, wherein the stress and thickness of the stress-compensating membrane are determined based on the distortions in the substrate, and wherein the stress or thickness of the stress-compensating membrane varies between two different locations along the second main side. The method may further include directing ions to the stress-compensating membrane during the ion implantation process.

[0008] In another embodiment, an apparatus for substrate stress control may include: a beam scanner operable to scan an ion beam against a substrate; and a controller coupled to the beam scanner, wherein the controller may include: a processor; and a memory unit coupled to the processor, including a scanning routine operable on the processor to perform a metrological scan of a first main side of the substrate to determine distortions in the substrate caused by the formation of multiple features along the substrate. The controller may also be operable to: deposit a stress-compensating film along a second main side of the substrate, wherein the stress and thickness of the stress-compensating film are determined based on the distortions in the substrate; and guide the ion beam to the stress-compensating film. Simple Explanation of the Diagram

[0009] The accompanying drawings illustrate exemplary aspects of this disclosure, including practical applications of its principles, as follows: Figure 1A illustrates a top view of a wafer according to an embodiment of the present disclosure. Figure 1B illustrates a bottom view of a wafer according to an embodiment of the present disclosure. Figure 1C illustrates a side cross-sectional view of a wafer according to an embodiment of the present disclosure. Figures 2A to 2C illustrate various compensation pattern morphologies according to embodiments of the present disclosure. Figure 3 illustrates the process flow according to an embodiment of the present disclosure. Figure 4A shows the original view and the modified stress diagram on opposite sides of the substrate according to an embodiment of the present disclosure. Figure 4B illustrates a manner in which an additional film is formed on the back side of a substrate according to an embodiment of the present disclosure. Figures 5A and 5B illustrate different representations of ion implantation devices consistent with various embodiments of this disclosure. Figure 6 illustrates in-plane distortion correction according to an embodiment of the present disclosure. Figures 7A and 7B show front and rear views of a substrate according to an embodiment of the present disclosure, including multiple overlapping implantations performed on the dorsal side of the substrate. The drawings are not necessarily drawn to scale. They are for illustrative purposes only and are not intended to depict specific parameters of this disclosure. The drawings are intended to illustrate exemplary embodiments of this disclosure and are therefore not to be considered limiting in scope. In the drawings, the same numbers denote the same elements. Furthermore, for clarity of illustration, certain elements in some figures may be omitted or shown off-scale. For clarity of illustration, sectional views may be presented as "slices" or "near-sighted" sectional views, and some background lines that would otherwise be visible in a "true" sectional view may be omitted. Additionally, for clarity, some reference numbers may be omitted in certain figures. Implementation

[0010] Embodiments of the invention will now be set forth more fully below with reference to the accompanying drawings, in which some embodiments are illustrated. The subject matter of this disclosure may be implemented in many different forms and should not be construed as limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the subject matter to those skilled in the art. In the drawings, the same reference numerals refer to the same elements throughout.

[0011] The embodiments described herein relate to techniques and apparatus for improving stress control in a substrate (e.g., a semiconductor wafer in which a patterned structure is formed). These embodiments can be employed during device fabrication to reduce stresses developed during wafer processing (e.g., device fabrication).

[0012] More specifically, this embodiment may employ an ion beam generated in an ion implanter, such as, but not limited to, a scanned dot beam. Various embodiments employ novel ion implantation methods to alter substrate curvature caused by stress in features formed on the substrate during device processing. This embodiment may employ a novel pattern implanted along the back side of the substrate into a stress-compensating film to generate compensating stress, wherein the compensating stress can be used to reduce in-plane distortion along the front side of the substrate.

[0013] Referring now to Figures 1A to 1C, top, bottom, and side sectional views of a substrate 100 according to an embodiment of the present disclosure will be discussed. While not limiting, the substrate 100 may be a wafer for forming three-dimensional (3D) and non-device structures. As shown, the substrate 100 may include a first main side 101 opposite a second main side 102. The first main side 101 may be the front or top surface of the substrate and may include a plurality of features 105 (FIG. 1C), such as layers, devices, semiconductor dies (wafers), etc., fabricated within a surface region of the substrate 100, as known in the art. In various embodiments, features 105 may generally be formed continuously across the surface of the first main side 101. The features may be isolated from each other, connected to each other by continuous layers, partially connected to each other, isolated from each other along a first direction, but not isolated from each other along a second direction. During the fabrication of features 105, one or more layers (not separate) may be deposited on the substrate 100, wherein at least one layer may exhibit intrinsic stress. For example, as more layers are deposited, the intrinsic stress within the layers may tend to increase, leading to distortion, deformation, bending and / or curvature of the substrate 100.

[0014] According to embodiments of this disclosure, distortion of the substrate 100 can be addressed by a combination of deposition and ion implantation. One or more substances can be deposited onto the second main side 102 of the substrate 100. In various embodiments, the deposition of the substance can form a suitable layer, such as silicon nitride or other materials. The embodiments are not limited to this context. The resulting layer is shown in Figures 1B and 1C as a stress-compensating film or layer 112.

[0015] According to various embodiments, film 112 can be deposited to a suitable thickness to generate sufficient compensating stress to adjust substrate curvature. It is well known that the curvature caused by a deposited layer on a substrate having a given substrate thickness is proportional to the product of the stress in film 112 and the thickness in film 112. Therefore, for a given stress to be applied to film 112, the thickness of film 112 can be locally adjusted to generate a target stress-thickness product, thereby generating a targeted change in the curvature of substrate 100. According to various embodiments, film 112 may have a thickness from 100 nm to 500 nm. The embodiments are not limited to this context. According to different embodiments, the deposited film 112 may have neutral stress (zero stress), tensile stress, or compressive stress. In some embodiments, more than one film layer may be present.

[0016] In some embodiments, the thickness of film 112 can be controlled or optimized based on first-order bow-shaped correction information of substrate 100. For example, wafer grain warpage measurements of the first principal side 101 of substrate 100 can be performed using any type of metrology device to map a plurality of target regions 122 uniformly arranged across the first principal side 101. The plurality of target regions 122 may represent areas of the first principal side 101 of substrate 100 where desired defects or corrections are desired to address distortions (e.g., wafer bending) in substrate 100. When the arrangement is consistent or uniform, the plurality of target regions 122 may be identified according to a grid or coordinate system. The local thickness and stress characteristics of film 112 along the second principal side 102 are fine-tuned using stress information from the plurality of target regions 122 along the first principal side 101, as will be described in more detail below.

[0017] As used herein, "deposition" and / or "being deposited" can include any technique now known or hereafter developed applicable to the material to be deposited, including but not limited to, for example: chemical vapor deposition (CVD), low-pressure CVD (LPCVD), and plasma-enhanced CVD (PECVD). Additional techniques may include semi-atmosphere CVD (SACVD), high-density plasma CVD (HDPCVD), rapid thermal CVD (RTCVD), ultra-high vacuum CVD (UHVCVD), limited reaction processing CVD (LRPCVD), metal-organic CVD (MOCVD), and sputtering deposition. Additional techniques may include ion beam deposition, electron beam deposition, laser-assisted deposition, thermal oxidation, thermal nitriding, spin coating, physical vapor deposition (PVD), atomic layer deposition (ALD), chemical oxidation, molecular beam epitaxy (MBE), plating, and vapor deposition.

[0018] As shown in Figure 1C, an ion implantation process (e.g., scanned point or strip ion beam implantation) is performed to guide ions 114 into a stress-compensating membrane 112. In the illustrated example, ions 114 may be guided into the membrane 112 to generate multiple localized stress patterns 126 within the membrane 112 (Figure 1B). Ions 114 may include one or more different substances delivered using one or more implantation steps. As will be explained in more detail below, the localized stress patterns 126 may correspond to reactive forces that resolve stress messages from the multiple target regions 122 along a first main side 101 of the substrate. Although not limiting, the localized stress patterns 126 may overlap multiple target regions 122.

[0019] According to various embodiments, the ion energy of ion 114 can be fine-tuned to implant ions at a suitable depth within membrane 112 to induce an appropriate change in stress state. In some instances, ions 114 can be directed into membrane 112 with energies ranging from 100 keV to 300 keV. The embodiments are not limited to this context.

[0020] Referring to FIG3, a non-limiting method 300 according to an embodiment of the present disclosure will be described. At block 301, method 300 may include performing front-side wafer metrology. In some embodiments, metrology may include a process of profiling and filtering out various morphologies (e.g., the first morphology 201 shown in FIG2A, the second morphology 202 shown in FIG2B, and the third morphology 203 shown in FIG2C). In one example, first-order bow-shaped correction information may be used to determine the stress / thickness of film 112.

[0021] At block 302, method 300 may include depositing membrane 112 onto a second main side 102 of a substrate, as described above. At block 303, method 300 may include associating second-order and third-order topographic information with the coordinates of the plurality of target regions 122, and providing the information to an implantation device.

[0022] At block 304, the method may include transforming coordinate and stress information to determine the dose and energy of ion 114 during the ion implantation process. In some embodiments, the information may be used for stress correction based on stress calibration input coupled to an algorithm that maps a stress pattern to a target implanter dose map pattern in x and y coordinates or circular coordinates. At block 305, method 300 may include using ion beam profile information to create a predicted dose map pattern based on the determined dose and energy of ion 114 and other formulation information. In some embodiments, a beam profiler operable to measure certain parameters associated with the ion beam, such as beam current as a function of position, may be used to create the graph. While not limiting, the beam profiler may include one or more Faraday devices arranged linearly. In another embodiment, the beam profile may be measured by a plurality of Faraday devices arranged in a two-dimensional array. The Faraday devices collect current and the beam profiler is capable of measuring the amount of current collected by each Faraday device. The controller can acquire information from the beam profiler and generate the desired implantation pattern. This desired implantation pattern can be stored as a two-dimensional array in a non-transitory storage element, where the value of each element in the array represents the desired dose at this particular location.

[0023] In block 306, ion implantation is performed on membrane 112. In some embodiments, ion implantation occurs using horizontal and vertical scanning of substrate 100. Although not limiting, the scanning is performed according to a desired implantation pattern and can be a combination of electrostatic, magnetic, and mechanical methods.

[0024] At block 307, a second metering operation can then be performed on the front of the substrate to further refine the algorithm and restart the process.

[0025] Figure 4A shows the original pattern 408 on a first side of the substrate 400 and the modified / reverse stress pattern 409 on a second main side of the substrate 400. As shown in Figure 4B, in this embodiment, the process may include providing one or more front-side wafer films 410 and back-side wafer films 412 formed on opposite sides of the substrate 400. The back-side wafer film 412 is removable and a second film 430 may be formed along the back side of the substrate 400. In some embodiments, the second film 430 may include multiple layers.

[0026] Figure 5A illustrates a schematic top view of an ion implantation system for stress control according to an embodiment of the present disclosure. The ion implantation system (also referred to as ion implanter 500) represents a process chamber containing, among other components, an ion source 504 for generating an ion beam 508 and a series of beam assemblies. The ion source 504 may include a chamber for receiving a gas stream and generating ions. The ion source 504 may further include a power supply and an extraction electrode assembly (not shown) disposed close to the chamber. The beam assemblies may include, for example, an analyzer magnet 520, a mass resolving slit (MRS) 524, a steering / focusing component 526, and a terminal station 530 including a substrate holder 531. Although the ion implanter 500 described herein is a medium-current (MC) ion implanter, it should be understood that a high-current (HC) ion implanter may also be used in alternative embodiments.

[0027] The ion implanter 500 further includes a beam scanner 536 located along beamline 538 between MRS 524 and terminal station 530. The beam scanner 536 can be configured to receive the ion beam 508 as a spot beam and scan the ion beam 508 along a rapid scanning direction (e.g., parallel to the X-axis in the Cartesian coordinate system shown). It should be noted that the substrate 532 can be scanned along the Y-axis, thus a given ion treatment can be applied to a given area of ​​the substrate 532 while simultaneously scanning the ion beam 508 back and forth along the X-axis. The ion implanter 500 may have other components (e.g., collimators known in the art, not shown for clarity) to guide the ions of the ion beam 508 to the substrate 532 along a series of mutually parallel trajectories after scanning, as shown in FIG. 5A. In various embodiments, the ion beam 508 can be scanned at frequencies of several Hz, 10 Hz, 100 Hz, up to several kiloHz, or greater than several kiloHz. For example, beam scanner 536 may use magnetic scanning elements or electrostatic scanning elements to scan ion beam 508, as is known in the art.

[0028] By rapidly scanning the ion beam 508 in a fast scanning direction (e.g., back and forth along the X-axis), the ion beam 508, configured as a spot beam, can deliver a target ion dose with a uniform density across the substrate 532. According to various embodiments, the ion beam 508 can be controlled in response to user input to generate a targeted implantation pattern by combining scanning of the substrate 532 with scanning of the ion beam 508.

[0029] For example, the ion implanter 500 may further include a controller 540 coupled to the beam scanner 536 to coordinate the operation of the beam scanner 536 and the substrate 531. As further shown in FIG5A, the ion implanter 500 may include a user interface 542 also coupled to the controller 540. The user interface 542 may be implemented as a display and may include user selection devices, including a touch screen, display menus, buttons, knobs, and other devices known in the art. According to various embodiments, the user interface 542 may send instructions to the controller 540 to generate a suitable implantation pattern for the substrate 532 based on user input.

[0030] As further shown in Figure 5B, the controller 540 may include a processor 552, such as a microprocessor, dedicated processor chip, general-purpose processor chip, or similar device of a known type. The controller 540 may further include a memory or memory unit 554 coupled to the processor 552, wherein the memory unit 554 contains a scan routine 556. The scan routine 556 may operate on the processor 552 to manage the scanning of the ion beam 508 and the substrate 532 as described below. The memory unit 554 may include an article of manufacture. In one embodiment, the memory unit 554 may include any non-transitory computer-readable or machine-readable medium, such as optical storage, magnetic storage, or semiconductor storage. The storage medium may store various types of computer-executable instructions to implement one or more of the logical flows described herein. Examples of computer-readable or machine-readable storage media may include any tangible medium capable of storing electronic data, including volatile or non-volatile memory, removable or non-removable memory, erasable or non-erasable memory, writable or rewritable memory, and so on. Examples of computer-executable instructions may include any suitable type of code, such as source code, compiled code, interpreted code, executable code, static code, dynamic code, object-oriented code, visual code, and so on. The embodiments described are not limited to this context.

[0031] In a particular embodiment, scanning routine 556 may include an implantation pattern processor 558 and a scan control processor 560. The implantation pattern processor 558 may, for example, receive from a host interface 542 a set of substrate stress information indicating the stress state in the substrate 532. The substrate stress information may include substrate thickness, stress compensation film thickness, substrate curvature, etc. The implantation pattern processor 558 may use the substrate stress information to calculate suitable implantation pattern information to counteract the substrate curvature. As generally discussed above, the implantation pattern information may include ion dose, ion type, and implant strip size. In various embodiments, a series of implantation patterns may be stored in a database 562, wherein different implantation patterns may be associated with different levels of curvature in the substrate. The scan control processor 560 may control the scanning of the substrate 532 and the scanning of the ion beam 508 to implement the implantation pattern in the substrate 532. Therefore, in various embodiments, the treatment of the substrate using the implantation pattern to generate anisotropic stress in the stress control layer may be automatic or partially automatic.

[0032] Figure 6 illustrates the in-plane distortion correction as a result of an embodiment of this disclosure. Figure 600 shows the original morphology (201, 202, 203) at different levels in the wafer. Higher wavelengths (lower frequencies) are represented by the initial stress in the wafer. The lower curve 601 represents the correction after the back-side film 112 has been deposited. Lower wavelengths (higher frequencies) are represented by the order of the stress corrected by the mapped implant. The lower curve 601 represents the stress reduction after implantation.

[0033] Figures 7A and 7B show the front and rear views of the substrate 700, respectively, in which multiple overlapping implants of 714A and 714B can be performed on the dorsal side of the substrate 700.

[0034] The foregoing discussion is presented for illustrative purposes and is not intended to limit this disclosure to the one or more forms disclosed herein. For example, for the purpose of simplifying this disclosure, various features of this disclosure may be combined in one or more aspects, embodiments, or configurations. However, it should be understood that various features of certain aspects, embodiments, or configurations of this disclosure may be combined in alternative aspects, embodiments, or configurations. Furthermore, the foregoing claims are hereby incorporated by reference into this specific embodiment, each claim being itself a separate embodiment of this disclosure.

[0035] 100, 400, 532, 700: Base 101: First Main Side 102: Second Main Side 105: Features 112: Membrane / Stress Compensation Membrane / Layer / Backside Membrane 114: Ions 122: Target Area 126: Local stress pattern 201: First-order morphology / Original morphology 202: Second-order morphology / Original morphology 203: Third-order morphology / Original morphology 300: Method 301, 302, 303, 304, 305, 306, 307: Squares 408: Original Image 409: Modified / Reverse Stress Diagram 410: Front wafer film 412: Backside wafer film 430: Second membrane 500: Ion Implantation Machine 504: Ion source 508: Ion Beam 520: Analyzer Magnet 524: Quality Analysis Slit (MRS) 526: Steering / Focus Component 530: Terminal Station 531: Base Holder / Base Stage 536: Beam Scanner 538: Cable Bundle 540: Controller 542: User Interface / Host Interface 552: Processor 554: Memory Unit 556: Scanning Routine 558: Implanted Pattern Processor 560: Scan Control Processor 562: Database 600: Chart 601: Curve 714A, 714B: Overlapping implantation X, Y: Axes

Claims

1. A method for controlling substrate stress, comprising: A substrate is provided, the substrate including a first main side opposite to a second main side, wherein a plurality of film layers are disposed on the first main side and the second main side; a metrological scan is performed to determine the distortion of the substrate caused by the formation of the plurality of film layers; the plurality of film layers are removed from the second main side of the substrate; Depositing a stress compensation membrane along the second main side of the substrate, wherein the stress and thickness of the stress compensation membrane are determined based on the distortion of the substrate, and wherein the thickness varies across the stress compensation membrane; and guiding ions to the stress compensation membrane during ion implantation.

2. The method of claim 1, wherein the metrological scan generates a topographic map of the first main side of the substrate, and wherein the topographic map is characterized by a plurality of coordinates and stress information associated with each of the plurality of coordinates.

3. The method as described in claim 2, further comprising modifying the dose and energy of the ions guided to the stress compensation membrane based on the stress information.

4. The method as described in claim 1, wherein the distortion of the substrate is calculated based on a first-order bow-shaped correction message.

5. The method of claim 1, further comprising forming a second stress compensation membrane on the stress compensation membrane.

6. The method of claim 1, wherein the implantation process includes scanning a dot bundle or band bundle across the stress compensation membrane along a first direction and a second direction.

7. The method of claim 1, further comprising performing a second metrological scan on the first primary side to determine changes in the distortion of the substrate.

8. A method for controlling substrate stress, comprising: A substrate is provided including a first main side opposite to a second main side, wherein a plurality of film layers are disposed on the first main side and the second main side; Remove the plurality of membrane layers from the second main side of the substrate; perform a metrological scan on the first main side to determine the distortion of the substrate caused by the formation of the plurality of membrane layers; deposit a stress-compensating membrane along the second main side of the substrate, wherein the stress or thickness of the stress-compensating membrane is determined based on the distortion of the substrate, and wherein the stress or thickness of the stress-compensating membrane varies between two different locations along the second main side; and guide ions to the stress-compensating membrane during ion implantation.

9. The method of claim 8, wherein the metrological scan generates a topographic map of the first main side of the substrate, and wherein the topographic map is characterized by a plurality of coordinates and stress information associated with each of the plurality of coordinates.

10. The method of claim 9, further comprising modifying the dose and energy of the ions guided to the stress compensation membrane based on the stress information and the thickness of the stress compensation membrane.

11. The method of claim 8, wherein the distortion of the substrate is calculated based on a first-order bow-shaped correction message.

12. The method of claim 8 further includes forming a second stress compensation membrane on the stress compensation membrane.

13. The method of claim 8, wherein the ion implantation process includes scanning a dot bundle or band bundle across the stress compensation membrane along a first direction and a second direction.

14. The method of claim 8 further includes performing a second metrological scan on the first primary side to determine the change in the distortion of the substrate.

15. An apparatus for controlling substrate stress, comprising: A beam scanner capable of scanning an ion beam against a substrate; and a controller coupled to the beam scanner, the controller including: a processor; and a memory unit coupled to the processor, including a scanning routine that operates on the processor to perform a metrological scan of a first main side of the substrate to determine distortions of the substrate caused by the formation of multiple features along the substrate, wherein the controller is also operable to: deposit a stress-compensating film along a second main side of the substrate, wherein the stress and thickness of the stress-compensating film are determined based on the distortions of the substrate; and guide the ion beam to the stress-compensating film.

16. The apparatus for substrate stress control as claimed in claim 15, wherein the metrological scan generates a topographic image of the first main side of the substrate, and wherein the topographic image is characterized by a plurality of coordinates and stress information associated with each of the plurality of coordinates.

17. The apparatus for substrate stress control as claimed in claim 16, wherein the controller is further operable to modify the dose and energy of the ion beam guided to the stress compensation membrane based on the stress information.

18. The apparatus for substrate stress control as described in claim 15, wherein the distortion of the substrate is calculated based on a first-order bow correction message.

19. The apparatus for substrate stress control as claimed in claim 15, wherein guiding the ion beam to the stress compensation membrane includes scanning the point beam or strip beam across the stress compensation membrane along a first direction and a second direction.

20. The apparatus for substrate stress control as claimed in claim 15, wherein the scanning routine operating on the processor further includes performing a second metrological scan on the first primary side to determine changes in the distortion of the substrate.

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