Display device

Abstract

A display device is provided. According to an exemplary embodiment of the present invention, the display device includes: a substrate comprising a non-display area and a display area, the display area comprising an optical area containing a light-emitting area and a transmissive area, and a general area surrounding the optical area; a planarization layer disposed on the substrate in the display area; a plurality of light-emitting elements disposed on the planarization layer, including an anode, a light-emitting layer, and a cathode; a dam disposed on the planarization layer and used to cover one end of the anode; and a deposition suppression layer disposed on the light-emitting layer in the transmissive area of ​​the optical area, wherein the dam is disposed in the light-emitting area of ​​the transmissive area of ​​the optical area.

Description

Technical Field

[0001] The present invention relates to a display device, and more particularly to a display device capable of suppressing the separation of thin films stacked in an area where a camera or sensor is disposed. Prior Technology

[0002] With the advent of the information age, display devices that visually display electronic information signals are rapidly developing. Various research efforts are ongoing to develop thin, lightweight, low-power display devices with improved performance.

[0003] Representative display devices include liquid crystal displays (LCDs), field emission displays (FEDs), electrowetting displays (EWDs), organic light-emitting diode (OLEDs), and so on.

[0004] Electroluminescent displays, as a representative type of organic light-emitting display device, refer to self-emissive display devices. Unlike liquid crystal displays (LCDs), electroluminescent displays do not require a separate light source, and therefore can be manufactured as lightweight and thin displays. Furthermore, because electroluminescent displays operate at low voltage, they offer advantages in terms of power consumption. Moreover, due to their superior performance in color reproduction, response time, viewing angle, and contrast ratio (CR), electroluminescent displays are expected to be adopted in various fields.

[0005] Recently, the multimedia capabilities of mobile devices have improved. For example, cameras or sensors are essentially embedded in the front surface of the display device. However, the placement of cameras or sensors on the front surface of the display device limits screen design, making it difficult to implement a screen design. Display devices employ designs that include notches or perforations to reduce the space occupied by cameras or sensors on the front surface of the display device. However, screen size is still limited by the cameras or sensors, making it difficult to implement full-screen displays.

[0006] To implement full-screen display, a configuration has been proposed in which an area with low-resolution pixels is provided in the screen of the display device, and a camera and / or various types of sensors are arranged in the area with low-resolution pixels. Summary of the Invention

[0007] The objective of this invention is to provide a display device that improves the transmittance of an area where a camera or sensor is mounted.

[0008] Another objective of this invention is to provide a display device capable of suppressing the separation of thin films stacked in an area where a camera or sensor is disposed.

[0009] Another objective of this invention is to provide a display device that can suppress pixel shrinkage in the light-emitting portion caused by outgassing of organic materials, which is caused by UV light transmission during a process in which UV reliability is evaluated in an area where a camera or sensor is located.

[0010] The purpose of this invention is not limited to the purposes mentioned above, and other purposes not mentioned above will be clearly understood by those skilled in the art from the following description.

[0011] According to one aspect of the present invention, a display device includes: a substrate comprising a non-display area and a display area, the display area comprising an optical area containing a light-emitting area and a transmissive area and a general area surrounding the optical area; a planarization layer disposed on the substrate in the display area; a plurality of light-emitting elements disposed on the planarization layer and comprising an anode, a light-emitting layer and a cathode; a dam disposed on the planarization layer and used to cover one end of the anode; and a deposition suppression layer disposed on the light-emitting layer in the transmissive area of ​​the optical area and the light-emitting area, wherein the dam is disposed in the light-emitting area of ​​the transmissive area of ​​the optical area and the light-emitting area.

[0012] According to another embodiment of the present invention, a display device includes: a substrate comprising a non-display area and a display area, the display area comprising an optical area containing a light-emitting area and a transmissive area and a general area surrounding the optical area; a planarization layer disposed on the substrate in the display area; a plurality of light-emitting elements disposed on the planarization layer and comprising an anode, a light-emitting layer and a cathode; a deposition suppression layer disposed on the light-emitting layer in the transmissive area, wherein the deposition suppression layer does not overlap the cathode; and an optical electronic device disposed on a lower portion of the substrate in the optical area, wherein the optical electronic device overlaps the deposition suppression layer.

[0013] Further details of the exemplary embodiments are included in the detailed description and figures.

[0014] According to an exemplary embodiment of the present invention, a camera or sensor is disposed at the lower end of a touch electrode or light-emitting element in the display area, such that the display or touch located on the upper side can be continuously switched off.

[0015] According to an exemplary embodiment of the present invention, a deposition suppression layer is disposed in a region overlapping with a region where a camera or sensor is disposed. A metal electrode is then deposited. Therefore, a transmissive region without opaque constituent elements such as metal electrodes can be disposed on the deposition suppression layer. Thus, the light transmittance of the region where the camera or sensor is disposed can be improved, thereby improving the visual sensitivity of the display device.

[0016] The effects of the present invention are not limited to the examples above, and many more effects are included in the present invention. Simple Explanation of the Diagram

[0017] The above and other aspects, features and other advantages of the present invention will become clearer from the following detailed description taken in conjunction with the accompanying drawings, in which: Figures 1A to 1D are top plan views of a display device according to an exemplary embodiment of the present invention; Figure 2 is a system configuration diagram of a display device according to an exemplary embodiment of the present invention; Figure 3 is an equivalent circuit diagram of a sub-pixel of a display panel according to an exemplary embodiment of the present invention; Figure 4 is a diagram illustrating the arrangement of a plurality of sub-pixels in a display area of ​​a display panel according to an exemplary embodiment of the present invention; Figure 5A is a diagram illustrating an example of the arrangement of signal lines in a first optical area and a general area of ​​a display panel according to an exemplary embodiment of the present invention; Figure 5B is a diagram illustrating an example of the arrangement of signal lines in a second optical area and a general area of ​​a display panel according to an exemplary embodiment of the present invention; Figure 6 is a cross-sectional view illustrating the cross-sectional structure of a pixel area disposed in a general area according to an exemplary embodiment of the present invention; FIG. 7 is a cross-sectional view illustrating the cross-sectional structure of the light-emitting region and the transmission region in the optical region according to an exemplary embodiment of the present invention; FIG. 8A is a diagram illustrating the positional relationship between the deposition suppression layer and the transmission region according to an exemplary embodiment of the present invention; FIG. 8B is an enlarged view of the transmission region according to an exemplary embodiment of the present invention; FIG. 9 is a cross-sectional view illustrating the cross-sectional structure of the light-emitting region and the transmission region in the optical region according to another exemplary embodiment of the present invention; FIG. 10A is a diagram illustrating the positional relationship between the deposition suppression layer and the transmission region according to another exemplary embodiment of the present invention; FIG. 10B is an enlarged view of the transmission region according to another exemplary embodiment of the present invention; FIG. 11 is a top plan view illustrating the first optical region of the flexible display device according to another exemplary embodiment of the present invention; and FIG. 12 is an enlarged view illustrating region X in FIG. 11. Implementation

[0018] The advantages, features, and implementation methods of the present invention will become clear from the exemplary embodiments described in detail below with reference to the accompanying drawings. However, the present invention is not limited to the exemplary embodiments disclosed herein and may be implemented in different forms. These embodiments are provided by way of example only to enable those skilled in the art to fully understand the invention and its scope.

[0019] The shapes, dimensions, proportions, angles, quantities, etc., illustrated in the accompanying drawings used to describe exemplary embodiments of the present invention are merely examples, and the present invention is not limited thereto. Similar symbols throughout the specification generally denote similar elements. Furthermore, in the following description of the present invention, detailed descriptions of prior art may be omitted to avoid unnecessarily obscuring the spirit of the invention. Terms such as "comprising," "having," and "consisting of," as used herein, are generally intended to allow for the addition of other components unless used with the term "only." Unless otherwise stated, singular references may include plurals.

[0020] Even without explicit description, components are still interpreted as including a general error range.

[0021] When using terms such as “above,” “on top,” “below,” and “beside,” to describe the positional relationship between two parts, one or more parts may be placed between the two parts unless used with the terms “exactly” or “directly.”

[0022] When one element or layer is disposed "on" other elements or layers, another layer or element can be directly inserted between them or directly on the other elements.

[0023] Although terms such as "first" and "second" are used to describe various components, these components are not limited to these terms. These terms are only used to distinguish one component from other components. Therefore, in the technical concept of this invention, the first component to be mentioned below may be the second component.

[0024] Similar symbols throughout the instruction manual usually represent similar components.

[0025] The dimensions and thicknesses of the components shown in the drawings are for ease of description, and the present invention is not limited to the dimensions and thicknesses of the components shown.

[0026] The features of various embodiments of the present invention can be partially or entirely coupled or combined with each other, and can be interlocked and operated in various technical ways, and these embodiments can be implemented independently or in association with each other.

[0027] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0028] Figures 1A to 1D are top plan views of a display device according to an exemplary embodiment of the present invention.

[0029] Referring to Figures 1A to 1D, a display device 100 according to an exemplary embodiment of the present invention may include a display panel DP for displaying images and one or more optical electronic devices 170, 170a, 170b. Each of the optical electronic devices 170, 170a, 170b may include a light receiving device (e.g., a camera or sensor) for receiving light.

[0030] Display panel (DP) is a panel used to display images to the user.

[0031] A display panel (DP) may include display elements, driving elements, and circuitry. The display elements are used to display images, the driving elements are used to operate the display elements, and the circuitry is used to transmit various types of signals to the display elements and the driving elements. Different display elements can be defined according to the type of display panel (DP). For example, in the case of an organic light-emitting diode (OLED) display panel, the display element may be an organic light-emitting element comprising an anode, a light-emitting layer, and a cathode. Similarly, in the case of a liquid crystal display (LCD) panel, the display element may be a liquid crystal display element.

[0032] Hereinafter, we assume that the display panel DP is an organic light-emitting display panel. However, the display panel DP is not limited to organic light-emitting display panels.

[0033] Meanwhile, the display panel (DP) may include a substrate and multiple insulating films, transistor layers, and light-emitting element layers disposed on the substrate. For displaying images, the display panel (DP) may include multiple sub-pixels and various types of signal lines for operating these sub-pixels. The signal lines may include multiple data lines, multiple gate lines, multiple power lines, etc. In this case, each sub-pixel may include a transistor disposed on the transistor layer and a light-emitting element disposed on the light-emitting element layer.

[0034] The display panel (DP) can include the display area (DA) and the non-display area (NDA).

[0035] The display area DA is the area in the display panel DP where the image is displayed.

[0036] The display area DA may include sub-pixels constituting multiple pixels and circuitry for operating these sub-pixels. These sub-pixels are the smallest units constituting the display area DA. Display elements may be disposed in each of these sub-pixels. These sub-pixels may constitute a pixel. For example, each of these sub-pixels may include an organic light-emitting element containing an anode, a light-emitting layer, and a cathode. However, the invention is not limited thereto. Furthermore, the circuitry for operating these sub-pixels may include driving elements, lines, etc. For example, the circuitry may include thin-film transistors, storage capacitors, gate circuits, data lines, etc. However, the invention is not limited thereto.

[0037] The non-display area (NDA) is the area where no image is displayed.

[0038] The non-display area NDA can be bent so that it is not visible from the front surface. The non-display area NDA can be covered by a casing (not shown). The non-display area NDA is referred to as the border area.

[0039] Figures 1A to 1D illustrate a non-display area NDA surrounding a display area DA with a quadrilateral shape. However, the shape and arrangement of the display area DA and the non-display area NDA are not limited to the examples shown in Figures 1A to 1D. That is, the display area DA and the non-display area NDA can be adapted to the design of an electronic device equipped with a flexible display device 100. For example, exemplary shapes of the display area DA can also be pentagonal, hexagonal, circular, elliptical, etc.

[0040] Various lines and circuits used to operate the organic light-emitting elements in the display area (DA) can be disposed in the non-display area (NDA). For example, the non-display area (NDA) may contain connection lines for transmitting signals to these sub-pixels and circuits in the display area (DA). The non-display area (NDA) may contain on-board gate-in-line (GIP) lines or, for example, gate driver integrated circuits and data driver integrated circuits. However, the present invention is not limited thereto.

[0041] The display device 100 may further include various additional components for generating various signals or for operating pixels in the display area DA. These additional components for operating pixels may include inverter circuits, multiplexers, electrostatic discharge (ESD) circuits, etc. The display device 100 may also include additional components related to functions other than those operating pixels. For example, the display device 100 may further include additional components that provide touch detection functions, user authentication functions (e.g., fingerprint recognition), multi-level pressure detection functions, haptic feedback functions, etc. The aforementioned additional components may be located in the non-display area NDA and / or connected to external circuitry of the interface.

[0042] Please refer to Figures 1A to 1D. The display area DA may include a first optical area DA1 and a second optical area DA2. However, the present invention is not limited thereto.

[0043] In Figures 1A to 1D, one or more optoelectronic devices 170, 170a, and 170b, which are electronic components, are disposed on the lower side of the display panel DP (the side opposite to the visual surface).

[0044] Light can enter the front surface (visual surface) of the display panel DP, pass through the display panel DP, and then be transmitted to one or more optical electronic devices 170, 170a, 170b disposed on the lower side (opposite to the visual surface) of the display panel DP.

[0045] One or more optical electronic devices 170, 170a, 170b may be devices that receive light that has passed through the display panel DP and perform a preset function in response to the received light.

[0046] For example, optical electronic devices 170, 170a, and 170b may each include one or both of a camera and a proximity sensor.

[0047] As described above, the optical electronic devices 170, 170a, and 170b can be devices that need to receive light. However, the optical electronic devices 170, 170a, and 170b can be disposed on the lower side of the display panel DP. That is, the optical electronic devices 170, 170a, and 170b can be disposed on the side opposite to the visual surface of the display panel DP. The optical electronic devices 170, 170a, and 170b are not exposed on the front surface of the flexible display device 100. Therefore, when a user looks at the front surface of the flexible display device 100, the user will not visually identify the optical electronic devices 170, 170a, and 170b.

[0048] For example, a camera located on the lower side of the display panel (DP) can be a front-surface camera used to capture images of objects positioned in front of the camera. The camera can be a camera lens.

[0049] Optical electronic devices 170, 170a, and 170b can be configured as the display area DA of the overlay display panel DP. That is, optical electronic devices 170, 170a, and 170b can be disposed in the display area DA.

[0050] Please refer to Figures 1A to 1D. The display area DA may include the general area NA and one or more optical areas DA1 and DA2.

[0051] One or more optical regions DA1, DA2 may be regions that overlap one or more optoelectronic devices 170, 170a, 170b.

[0052] According to the example in Figure 1A, the display area DA may include a general area NA and a first optical area DA1. In this case, at least a portion of the first optical area DA1 may overlap with the first optoelectronic device 170.

[0053] Figure 1A illustrates a case where the first optical region DA1 has a circular structure. However, the shape of the first optical region DA1 according to an exemplary embodiment of the present invention is not limited thereto.

[0054] For example, as shown in Figure 1B, the shape of the first optical zone DA1 can be an octagonal shape or various polygonal shapes.

[0055] According to the example in Figure 1C, the display area DA may include a general area NA, a first optical area DA1, and a second optical area DA2. In the example in Figure 1C, the general area NA may exist between the first optical area DA1 and the second optical area DA2. In this case, at least a portion of the first optical area DA1 may overlap with the first optoelectronic device 170a, and at least a portion of the second optical area DA2 may overlap with the second optoelectronic device 170b.

[0056] According to the example in Figure 1D, the display area DA may include a general area NA, a first optical area DA1, and a second optical area DA2. In the example in Figure 1D, the general area NA does not exist between the first optical area DA1 and the second optical area DA2. That is, the first optical area DA1 and the second optical area DA2 are adjacent to each other. In this case, at least a portion of the first optical area DA1 may overlap the first optoelectronic device 170a, and at least a portion of the second optical area DA2 may overlap the second optoelectronic device 170b.

[0057] One or more optical zones DA1 and DA2 each need to have both an image display structure and a light transmission structure. That is, since one or more optical zones DA1 and DA2 are part of the display area DA, multiple sub-pixels used to display images need to be set in one or more optical zones DA1 and DA2. One or more optical zones DA1 and DA2 each need to have a light transmission structure for transmitting light to one or more optoelectronic devices 170, 170a, and 170b.

[0058] One or more optical electronic devices 170, 170a, 170b are devices that need to receive light. However, one or more optical electronic devices 170, 170a, 170b are disposed on the rear side (lower side, i.e. the side opposite to the visual surface) of the display panel DP and receive light that has passed through the display panel DP.

[0059] One or more optoelectronic devices 170, 170a, 170b are not exposed on the front surface (visual surface) of the display panel DP. Therefore, when a user looks at the front surface of the flexible display device 100, the user will not visually identify the optoelectronic devices 170, 170a, 170b.

[0060] For example, the first optoelectronic device 170 (170a) may be a camera, and the second optoelectronic device 170b may be a detection sensor, such as a proximity sensor or an illuminance sensor. For example, the detection sensor may be an infrared sensor that detects infrared light.

[0061] Conversely, the first optical electronic device 170 (170a) may be a detection sensor, and the second optical electronic device 170b may be a camera.

[0062] For ease of description, the following example will be described where the first optical electronic device 170 (170a) is a camera and the second optical electronic device 170b is a detection sensor. In this case, the camera may be a camera lens or an image sensor.

[0063] When the first optical electronic device 170 (170a) is a camera, the camera can be located on the rear (lower) side of the display panel DP. However, the camera can be a front-surface camera used to capture images of objects located in front of the display panel DP. Therefore, the user can capture images using a camera that is not visible from the visual surface while looking at the visual surface of the display panel DP.

[0064] One or more optical areas DA1, DA2 and a general area NA contained in the display area DA are areas where images can be displayed. However, the general area NA is an area that does not require a light transmission structure, and one or more optical areas DA1, DA2 are areas that require a light transmission structure.

[0065] Therefore, one or more optical zones DA1 and DA2 must each have a preset level of transmittance or a higher level. The general zone NA may have no light transmission or a low transmittance below the preset level.

[0066] For example, one or more optical regions DA1, DA2 and general region NA may differ in terms of resolution, subpixel arrangement structure, number of subpixels per unit area, electrode structure, circuit structure, electrode arrangement structure, and circuit arrangement structure.

[0067] For example, the number of subpixels per unit area in one or more optical zones DA1, DA2 may be less than the number of subpixels per unit area in a general zone NA. That is, the resolution in one or more optical zones DA1, DA2 may be lower than the resolution in a general zone NA. In this case, the number of subpixels per unit area can be used as a standard to measure resolution, and can also be referred to as PPI (pixels per inch), which represents the number of pixels per inch.

[0068] For example, the number of subpixels per unit area in the first optical region DA1 can be less than the number of subpixels per unit area in the general region NA. The number of subpixels per unit area in the second optical region DA2 can be equal to or greater than the number of subpixels per unit area in the first optical region DA1.

[0069] The first optical region DA1 can have various shapes, such as circular, elliptical, quadrilateral, hexagonal, or octagonal. The second optical region DA2 can have various shapes, such as circular, elliptical, quadrilateral, hexagonal, or octagonal. The first optical region DA1 and the second optical region DA2 can have the same shape or different shapes.

[0070] Please refer to Figure 1C. When the first optical region DA1 and the second optical region DA2 are adjacent to each other, the entire optical region including the first optical region DA1 and the second optical region DA2 can have various shapes, such as circular, elliptical, quadrilateral, hexagonal or octagonal.

[0071] For ease of description, examples of the first optical region DA1 and the second optical region DA2 each having a circular shape will be described below.

[0072] In the flexible display device 100 according to an exemplary embodiment of the present invention, if the first optical electronic device 170 (170a) hidden on the lower side of the display panel DP and not exposed to the outside is a camera, the flexible display device 100 according to an exemplary embodiment of the present invention may be a display that applies under-display camera (UDC) technology.

[0073] According to this configuration, in the flexible display device 100 according to an exemplary embodiment of the present invention, there is no need to form a notch or camera hole in the display panel DP to expose the camera, so that the area of ​​the display area DA is not reduced.

[0074] Therefore, since there is no need to form a notch or camera hole in the display panel DP to expose the camera, the size of the bezel area can be reduced, and design constraints can be eliminated, thereby increasing design freedom.

[0075] In the flexible display device 100 according to an exemplary embodiment of the present invention, even if one or more optical electronic devices 170, 170a, 170b are configured to be hidden behind the display panel DP, the one or more optical electronic devices 170, 170a, 170b still need to receive light normally and perform preset functions normally.

[0076] Furthermore, in the flexible display device 100 according to an exemplary embodiment of the present invention, even if one or more optical electronic devices 170, 170a, 170b are configured to be hidden behind the display panel DP and configured to overlap the display area DA, the image still needs to be displayed normally in one or more optical areas DA1, DA2, where one or more optical areas DA1, DA2 overlap one or more optical electronic devices 170, 170a, 170b in the display area DA.

[0077] Therefore, the flexible display device 100 according to an exemplary embodiment of the present invention may have a structure capable of improving the transmittance of the first optical region DA1 and the second optical region DA2 of the overlapping optical electronic devices 170, 170a, and 170b.

[0078] Figure 2 is a system configuration diagram of a display device according to an exemplary embodiment of the present invention.

[0079] Please refer to Figure 2. The display device 100 may include a display driving circuit and a display panel DP as constituent elements for displaying images.

[0080] The display driver circuit can be a circuit used to operate the display panel DP, and includes a data driver circuit DDC, a gate driver circuit GDC, and a display controller DCTR.

[0081] The display panel DP may include a display area DA for displaying images and a non-display area NDA for not displaying images. The non-display area NDA may be the outer perimeter of the display area DA and is also called the bezel area. The entire or part of the non-display area NDA may be an area that can be seen from the front surface of the display device 100, or it may be a curved area that is not seen from the front surface of the display device 100.

[0082] The display panel (DP) may include a substrate (SUB) and multiple sub-pixels (SPs) disposed on the substrate (SUB). Furthermore, the display panel (DP) may include various types of signal lines to operate these sub-pixels (SPs).

[0083] The display device 100 according to several exemplary embodiments of the present invention may be a liquid crystal display device or a self-emissive display device having a self-emissive display panel DP. In the case where the display device 100 according to several exemplary embodiments of the present invention is a self-emissive display device, each of these sub-pixels SP may include a light-emitting element.

[0084] For example, the display device 100 according to several exemplary embodiments of the present invention may be an organic light-emitting display device that implements the light-emitting element with an organic light-emitting diode (OLED). As another example, the display device 100 according to several exemplary embodiments of the present invention may be an inorganic light-emitting display device that implements the light-emitting element with a light-emitting diode made of an inorganic material. As yet another example, the display device 100 according to several exemplary embodiments of the present invention may be a quantum dot display device implemented with quantum dots as semiconductor crystals, such that the light-emitting element emits light autonomously.

[0085] The structure of each of these sub-pixels SP can vary depending on the type of display device 100. For example, in the case of a self-emissive display device having self-emissive sub-pixels SP, each sub-pixel SP may include a light-emitting element for self-emissive emission, one or more transistors, and one or more capacitors.

[0086] For example, various types of signal lines may include multiple data lines DL for transmitting data signals (also known as data voltage or image signals) and multiple gate lines GL for transmitting gate signals (also known as scan signals).

[0087] These data lines DL and these gate lines GL can be interleaved. Each of the data lines DL can be configured to extend along a first direction. Each of the gate lines GL can be configured to extend along a second direction.

[0088] In this case, the first direction can be a row direction, and the second direction can be a column direction. Alternatively, the first direction can be a column direction, and the second direction can be a row direction.

[0089] The data drive circuit DDC can be a circuit used to operate these data lines DL and output data signals to these data lines DL. The gate drive circuit GDC can be a circuit used to operate these gate lines GL and output gate signals to these gate lines GL.

[0090] The display controller DCTR can be a device for controlling the data drive circuit DDC and the gate drive circuit GDC, and for controlling the drive timing for these data lines DL and the drive timing for these gate lines GL.

[0091] The display controller DCTR can supply the data drive control signal DCS to the data drive circuit DDC to control the data drive circuit DDC, and can also supply the gate drive control signal GCS to the gate drive circuit GDC to control the gate drive circuit GDC.

[0092] The display controller DCTR can receive input image data from the host system HSYS and supply image data (Data) to the data drive circuit DDC based on the input image data.

[0093] The data drive circuit DDC can supply data signals to these data lines DL based on the drive timing control of the display controller DCTR.

[0094] The data drive circuit DDC can receive digital image data (Data) from the display controller DCTR, convert the received image data (Data) into analog data signals, and output the analog data signals to these data lines DL.

[0095] The gate drive circuit GDC can supply gate signals to these gate lines GL based on the timing control of the display controller DCTR. The gate drive circuit GDC can generate gate signals by receiving a first gate voltage corresponding to the turn-on level voltage, a second gate voltage corresponding to the turn-off level voltage, and various types of gate drive control signals GCS, and supply the generated gate signals to these gate lines GL.

[0096] In response to the gate drive control signal GCS supplied from the display controller DCTR, the gate drive circuit GDC supplies the gate signal to the gate line GL. The gate drive circuit GDC can be configured as a gate-in-panel (GIP) on one side or two opposite sides of the display panel DP.

[0097] Under the control of the display controller DCTR, the gate drive circuit GDC sequentially outputs multiple gate signals to these gate lines GL. The gate drive circuit GDC can use a shift register to shift the gate signals and sequentially supply multiple signals to the gate lines GL.

[0098] In an organic light-emitting display device, the gate signal may include a scan signal and a light-emitting control signal EM. The scan signal includes scan signal pulses that oscillate between a first gate voltage and a second gate voltage. The light-emitting control signal EM may include light-emitting control signal pulses that oscillate between a third gate voltage and a fourth gate voltage.

[0099] The scan pulse is synchronized with the data voltage Vdata and selects the sub-pixels SP on the lines where data is written. The emission control signal EM defines the emission time of each of these sub-pixels SP.

[0100] The gate drive circuit GDC may include an LED control signal drive unit EDC for outputting an LED control signal EM, and one or more scan drive units SDC for outputting a scan signal SC.

[0101] The light emission control signal driver unit (EDC) outputs a light emission control signal (EM) in response to the start pulse and shift clock from the display controller (DCTR), and sequentially shifts the light emission control signal pulses in response to the shift clock.

[0102] One or more scan drive units (SDCs) output scan signals in response to the start pulse and shift clock from the display controller (DCTR), and shift the scan signal pulses according to the shift clock timing.

[0103] In the gate drive circuit (GDC) configured in a GIP (Gate In-Place) manner, shift registers can be symmetrically arranged on both opposite sides of the display area (DA). Furthermore, the gate drive circuit (GDC) can be configured such that the shift register on one side of the display area (DA) includes at least one scan drive unit (SDC) and one light emission control signal drive unit (EDC), and the shift register on the other side of the display area (DA) includes at least one scan drive unit (SDC). However, the present invention is not limited thereto. The light emission control signal drive unit (EDC) and the at least one scan drive unit (SDC) can be arranged differently depending on the exemplary embodiment.

[0104] The data drive circuit DDC can be connected to the display panel DP via tape automated bonding (TAB), to the bonding pad of the display panel DP via chip-on-glass (COG) or chip-on-panel (COP), or to the display panel DP via chip-on-film (COF).

[0105] The gate drive circuit (GDC) can be connected to the display panel (DP) via tape-and-reel auto-bonding (TAB), to the bonding pads of the display panel (DP) via chip-on-glass (COG) or chip-on-plate (COP) bonding, or to the display panel (DP) via chip-on-film (COF) bonding. Alternatively, the gate drive circuit (GDC) can be formed as a gate-on-plate (GIP) type in the non-display area (NDA) of the display panel (DP). The gate drive circuit (GDC) can be disposed on the substrate or connected to the substrate. That is, when the gate drive circuit (GDC) is of the GIP type, it can be disposed in the non-display area (NDA) of the substrate. When the gate drive circuit (GDC) is of the COG or COP type, it can be connected to the substrate.

[0106] Simultaneously, at least one of the data driving circuit DDC and the gate driving circuit GDC can be disposed in the display area DA of the display panel DP. For example, at least one of the data driving circuit DDC and the gate driving circuit GDC can be configured to not overlap sub-pixels SP, or to overlap some or all sub-pixels SP.

[0107] The data drive circuit (DDC) can be connected to one side of the display panel (DP) (e.g., the top or bottom side). Depending on the operating method, panel design, etc., the data drive circuit (DDC) can be connected to two opposite sides of the display panel (DP) (e.g., the top and bottom sides), or to two or more of the four sides of the display panel (DP).

[0108] The gate drive circuit (GDC) can be connected to one side of the display panel (DP) (e.g., the left or right side). Depending on the operating method, panel design method, etc., the gate drive circuit (GDC) can be connected to two opposite sides of the display panel (DP) (e.g., the left and right sides), or to two or more of the four sides of the display panel (DP).

[0109] The display controller DCTR can be implemented as a separate component from the data drive circuit DDC, or it can be implemented as an integrated circuit by integrating it with the data drive circuit DDC.

[0110] The display controller DCTR can be a timing controller used in typical display technologies, or it can be a control device that includes a timing controller and is used to further perform other control functions. Alternatively, the display controller DCTR can be a control device different from the timing controller, or it can be a circuit set in the control device. The display controller DCTR can be implemented as various circuits or electronic components such as integrated circuits (ICs), field programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), or processors.

[0111] The display controller DCTR can be installed on printed circuit boards, flexible printed circuits, etc., and is electrically connected to the data drive circuit DDC and the gate drive circuit GDC via the printed circuit board, flexible printed circuit, etc.

[0112] The display controller DCTR can transmit signals to the data drive circuit DDC according to one or more preset interfaces, and receive signals from the data drive circuit DDC. For example, in this case, the interface may include a low-voltage differential signaling (LVDS) interface, an embedded point-to-point interface (EPI), a serial peripheral interface (SPI), etc.

[0113] To further provide touch sensing functions in addition to image display functions, the display device 100 according to several exemplary embodiments of the present invention may include a touch sensor and a touch sensing circuit, wherein the touch sensing circuit is used to sense the touch sensor to detect touch generated by a touch object such as a finger or pen, or to detect the touch position.

[0114] The touch sensing circuit may further include a touch driving circuit and a touch controller. The touch driving circuit is used to operate the touch sensor, sense the touch sensor, and generate and output touch sensing data. The touch controller is used to use the touch sensing data to detect the occurrence of a touch or the touch location.

[0115] A touch sensor may include multiple touch electrodes. The touch sensor may further include multiple touch lines for electrically connecting these touch electrodes and touch driving circuitry.

[0116] Touch sensors can be provided as a type of touch panel located outside the display panel (DP), or they can be provided within the display panel (DP). When the touch sensor is provided as a type of touch panel located outside the display panel (DP), the touch sensor is referred to as an externally-carried touch sensor. In the case of an externally-carried touch sensor, the touch panel and the display panel (DP) can be manufactured independently and coupled to each other during the assembly process. The externally-carried touch panel may include a touch panel substrate and a plurality of touch electrodes disposed on the touch panel substrate.

[0117] When a touch sensor is present within a display panel (DP), the touch sensor can be provided on the substrate (SUB) along with signal lines and electrodes related to display operation during the manufacturing process of the display panel (DP).

[0118] The touch driving circuit TDC can supply touch driving signals to at least one of these touch electrodes, sense at least one of these touch electrodes, and generate touch sensing data.

[0119] Touch sensing circuits can perform touch sensing using either self-capacitance sensing or mutual-capacitance sensing.

[0120] When the touch sensing circuit performs touch sensing in a self-capacitance sensing manner, the touch sensing circuit can perform touch sensing based on the capacitance between each of the multiple touch electrodes and the touch object (such as a finger, pen, etc.).

[0121] Based on the self-capacitance sensing method, these touch electrodes can serve as both driving and sensing touch electrodes. The touch driving circuit TDC can operate all or some of the touch electrodes and sense all or some of them.

[0122] When the touch sensing circuit performs touch sensing in the form of mutual capacitance sensing, the touch sensing circuit can perform touch sensing based on the capacitance between multiple touch electrodes.

[0123] Based on the mutual capacitance sensing method, these touch electrodes are divided into driving touch electrodes and sensing touch electrodes. The touch driving circuit can operate to drive the touch electrodes and sense the sensing touch electrodes.

[0124] The touch driving circuit and touch controller included in the touch sensing circuit can be implemented as multiple independent devices or a single device. Furthermore, the touch driving circuit and data driving circuit (DDC) can be implemented as multiple independent devices or a single device.

[0125] The display device 100 may further include a power supply circuit for supplying various types of power to the display driving circuit and / or touch sensing circuit.

[0126] The display device 100 according to several exemplary embodiments of the present invention may be a mobile terminal such as a smartphone or tablet computer, or may be a screen or television (TV) of various sizes. However, the present invention is not limited thereto. The display device 100 may be one of a variety of displays of various types and sizes capable of displaying information or images.

[0127] As described above, the display area DA of the display panel DP may include a general area NA and one or more optical areas DA1 and DA2.

[0128] The general area NA and one or more optical areas DA1 and DA2 are areas where images can be displayed. However, the general area NA is an area that does not require a light transmission structure, while the one or more optical areas DA1 and DA2 are areas that require a light transmission structure.

[0129] As described above, the display area DA of the display panel DP may include one or more optical areas DA1, DA2 and a general area NA. However, for ease of description, it is assumed that the display area DA includes both the first optical area DA1 and the second optical area DA2 (Figures 1C and 1D).

[0130] Figure 3 is an equivalent circuit diagram of a sub-pixel of a display panel according to an exemplary embodiment of the present invention.

[0131] Figure 3 illustrates a pixel circuit for illustrative purposes only. The pixel circuit is not limited as long as it has a structure that allows the light-emitting element ED(120) to emit light by applying a light-emitting signal EM(n). For example, the pixel circuit may include an additional scan signal and a switching thin-film transistor connected to the additional scan signal. An additional initialization voltage may be applied to the switching thin-film transistor. The connection relationships between the multiple switching elements and the connection positions of the capacitors may be configured differently. Hereinafter, for ease of description, a display device having the pixel circuit structure shown in Figure 3 will be described.

[0132] Please refer to Figure 3. Each of these sub-pixels SP may contain a pixel circuit with a driving transistor DT and a light-emitting element ED (120) connected to the pixel circuit.

[0133] The multiple sub-pixels SP in the general area NA, the first optical area DA1 and the second optical area DA2 included in the display area DA of the display panel DP may each include a light-emitting element ED (120), a driving transistor DT for operating the light-emitting element ED (120), multiple scanning transistors T1, T2, T3, T4, T5, T6 and T7 for operating the driving transistor DT, and a capacitor Cst for maintaining a constant voltage within one frame.

[0134] The pixel circuit can operate the light-emitting element ED (120) by controlling the driving current flowing into the light-emitting element ED (120). The pixel circuit may include a driving transistor DT, first to seventh transistors T1, T2, T3, T4, T5, T6, T7, and a capacitor Cst. Transistors DT, T1, T2, T3, T4, T5, T6, and T7 may each include a first electrode, a second electrode, and a gate electrode. One of the first and second electrodes may be a source electrode, and the other of the first and second electrodes may be a drain electrode.

[0135] Transistors DT, T1, T2, T3, T4, T5, T6, and T7 can each be either a P-type thin-film transistor or an N-type thin-film transistor. In the exemplary embodiment shown in FIG3, the first transistor T1 and the seventh transistor T7 are each configured as N-type thin-film transistors, while the remaining transistors DT, T2, T3, T4, T5, and T6 are each configured as P-type thin-film transistors. However, the present invention is not limited thereto. According to the exemplary embodiment, each or more of transistors DT, T1, T2, T3, T4, T5, T6, and T7 can be either a P-type thin-film transistor or an N-type thin-film transistor. Furthermore, the N-type thin-film transistor can be an oxide thin-film transistor, and the P-type thin-film transistor can be a polycrystalline silicon thin-film transistor.

[0136] The following describes an example where the first transistor T1 and the seventh transistor T7 are each N-type thin-film transistors, while the remaining transistors DT, T2, T3, T4, T5, and T6 are each P-type thin-film transistors. Therefore, the first transistor T1 and the seventh transistor T7 are turned on by receiving a high voltage, while the remaining transistors DT, T2, T3, T4, T5, and T6 are turned on by receiving a low voltage.

[0137] For example, the first transistor T1 constituting the pixel circuit can be used as a compensation transistor, the second transistor T2 can be used as a data supply transistor, the third transistor T3 and the fourth transistor T4 can be used as light emission control transistors, the fifth transistor T5 can be used as a bias transistor, and the sixth transistor T6 and the seventh transistor T7 can be used as initialization transistors.

[0138] The light-emitting element ED (120) may include an anode electrode and a cathode electrode. The anode electrode of the light-emitting element ED (120) may be connected to the fifth node N5, and the cathode electrode may be connected to the low potential driving voltage EVSS.

[0139] The driving transistor DT may include a first electrode connected to a second node N2, a second electrode connected to a third node N3, and a gate electrode connected to a first node N1. The driving transistor DT may provide a driving current to the light-emitting element ED (120) based on the voltage of the first node N1 (or the data voltage stored in the capacitor Cst as described below).

[0140] The first transistor T1 may include a first electrode connected to a first node N1, a second electrode connected to a third node N3, and a gate electrode for receiving a first scan signal SC1(n). The first transistor T1 may be turned on in response to the first scan signal SC1(n) and connected as a diode between the first node N1 (data voltage Vdata) and the third node N3, so that the first transistor T1 can sample the threshold voltage (Vth) of the driving transistor DT. The first transistor T1 may be a compensation transistor.

[0141] A capacitor Cst may be connected or formed between the first node N1 and the fourth node N4. The capacitor Cst may store or maintain the provided high-potential drive voltage EVDD. Furthermore, in some cases, the capacitor Cst may further comprise one or more capacitors.

[0142] The second transistor T2 may include a first electrode connected to the data line DL (or for receiving the data voltage Vdata), a second electrode connected to the second node N2, and a gate electrode for receiving the second scan signal SC2(n). The second transistor T2 may be turned on in response to the second scan signal SC2(n) and transmit the data voltage Vdata to the second node N2. The second transistor T2 may be a data supply transistor.

[0143] The third transistor T3 and the fourth transistor T4 (or the first and second light-emitting control transistors) can be connected between the high-potential driving voltage EVDD and the light-emitting element ED (120), and define the current flow path of the driving current generated by the driving transistor DT.

[0144] The third transistor T3 may include a first electrode connected to the fourth node N4 for receiving a high-potential driving voltage EVDD, a second electrode connected to the second node N2, and a gate electrode for receiving a light emission control signal EM(n).

[0145] The fourth transistor T4 may include a first electrode connected to the third node N3, a second electrode connected to the fifth node N5 (or the anode electrode of the light-emitting element ED(120)) and a gate electrode for receiving the light-emitting control signal EM(n).

[0146] The third transistor T3 and the fourth transistor T4 can be turned on in response to the light emission control signal EM(n). In this case, a driving current is provided to the light-emitting element ED(120), and the light-emitting element ED(120) can emit light with a brightness corresponding to the driving current.

[0147] The fifth transistor T5 may include a first electrode for receiving the bias voltage Vobs, a second electrode connected to the second node N2, and a gate electrode for receiving the third scan signal SC3(n). The fifth transistor T5 may be a bias transistor.

[0148] The sixth transistor T6 may include a first electrode for receiving the first initialization voltage Var, a second electrode connected to the fifth node N5, and a gate electrode for receiving the third scan signal SC3(n).

[0149] Before (or after) the light-emitting element ED (120) emits light, the sixth transistor T6 can be turned on in response to the third scan signal SC3(n), and the anode electrode (or pixel electrode) of the light-emitting element ED (120) can be initialized by using the first initialization voltage Var. The light-emitting element ED (120) may have a parasitic capacitor formed between the anode electrode and the cathode electrode. Furthermore, the parasitic capacitor is charged while the light-emitting element ED (120) emits light, so that the anode electrode of the light-emitting element ED (120) can have a certain voltage. Therefore, the amount of charge accumulated in the light-emitting element ED (120) can be initialized by applying the first initialization voltage Var to the anode electrode of the light-emitting element ED (120) via the sixth transistor T6.

[0150] In this invention, the gate electrodes of the fifth transistor T5 and the sixth transistor T6 are configured to jointly receive the third scan signal SC3(n). However, this invention is not limited thereto. The gate electrodes of the fifth transistor T5 and the sixth transistor T6 can be configured to be independently controlled by receiving multiple independent scan signals.

[0151] The seventh transistor T7 may include a first electrode for receiving the second initialization voltage Vini, a second electrode connected to the first node N1, and a gate electrode for receiving the fourth scan signal SC4(n).

[0152] The seventh transistor T7 can be turned on in response to the fourth scan signal SC4(n), and the gate electrode of the driving transistor DT is initialized by using the second initialization voltage Vini. Due to the high-potential driving voltage EVDD stored in the capacitor Cst, unwanted charge may remain on the gate electrode of the driving transistor DT. Therefore, the remaining charge can be initialized by applying the second initialization voltage Vini to the gate electrode of the driving transistor DT via the seventh transistor T7.

[0153] Meanwhile, as described above, the differential pixel density design method can be applied as a method to increase the transmittance of at least one of the first optical region DA1 and the second optical region DA2. According to the differential pixel density design method, the display panel DP can be designed such that the number of sub-pixels per unit area in at least one of the first optical region DA1 and the second optical region DA2 is less than the number of sub-pixels per unit area in the general region NA.

[0154] However, in some cases, differential pixel size design can be applied as another method to increase the transmittance of at least one of the first optical region DA1 and the second optical region DA2. According to differential pixel size design, the display panel DP can be designed such that the number of sub-pixels per unit area in at least one of the first optical region DA1 and the second optical region DA2 is equal to or similar to the number of sub-pixels per unit area in the general region NA, and the size (i.e., the light-emitting area size) of each of the plurality of sub-pixels SP disposed in at least one of the first optical region DA1 and the second optical region DA2 is smaller than the size (i.e., the light-emitting area size) of each of the plurality of sub-pixels SP disposed in the general region NA.

[0155] For ease of description, the following description will be based on the following assumptions: the differential pixel density design method is applied between two methods (differential pixel density design method and differential pixel size design method) to increase the transmittance of at least one of the first optical region DA1 and the second optical region DA2.

[0156] Figure 4 illustrates the arrangement of sub-pixels in the display area of ​​a display panel according to an exemplary embodiment of the present invention.

[0157] That is, FIG4 illustrates the arrangement of sub-pixels SP in three regions (NA, DA1, DA2) of the display area of ​​a display panel according to an exemplary embodiment of the present invention.

[0158] Please refer to Figure 4. These sub-pixels SP can be set in each of the general area NA, the first optical area DA1, and the second optical area DA2 contained in the display area.

[0159] For example, these sub-pixels SP may include a red sub-pixel Red SP for emitting red light, a green sub-pixel Green SP for emitting green light, and a blue sub-pixel Blue SP for emitting blue light.

[0160] Therefore, the general area NA, the first optical area DA1, and the second optical area DA2 may each include a light-emitting area EA for the red sub-pixel Red SP, a light-emitting area EA for the green sub-pixel Green SP, and a light-emitting area EA for the blue sub-pixel Blue SP.

[0161] Please refer to Figure 4. The general region NA may include the light-emitting region EA, which may or may not contain a light-transmitting structure.

[0162] However, the first optical region DA1 and the second optical region DA2 need to include a light transmission structure while containing the light-emitting region EA.

[0163] Therefore, the first optical region DA1 may include the light-emitting region EA and the first transmission region TA1, and the second optical region DA2 may include the light-emitting region EA and the second transmission region TA2.

[0164] The luminescent area EA and the transmissive areas TA1 and TA2 can be distinguished based on whether light is transmitted. That is, the luminescent area EA can be a region that cannot transmit light, while the transmissive areas TA1 and TA2 can be regions that can transmit light.

[0165] Furthermore, the light-emitting region EA and the transmission regions TA1 and TA2 can be distinguished based on whether a specific metal layer is formed. For example, a cathode electrode can be formed in the light-emitting region EA, but no cathode electrode will be formed in the transmission regions TA1 and TA2. Additionally, a light-blocking layer can be formed in the light-emitting region EA, but no light-blocking layer will be formed in the transmission regions TA1 and TA2.

[0166] In this case, the first optical region DA1 includes the first transmission region TA1, and the second optical region DA2 includes the second transmission region TA2, such that both the first optical region DA1 and the second optical region DA2 are regions that can transmit light.

[0167] In this case, the transmittance (degree of light transmission) of the first optical region DA1 and the transmittance (degree of light transmission) of the second optical region DA2 can be equal to each other.

[0168] In this case, the first transmission area TA1 of the first optical region DA1 and the second transmission area TA2 of the second optical region DA2 may have the same shape or size. Alternatively, even if the first transmission area TA1 of the first optical region DA1 and the second transmission area TA2 of the second optical region DA2 have different shapes or sizes, a portion of the first transmission area TA1 in the first optical region DA1 and a portion of the second transmission area TA2 in the second optical region DA2 may still be equal to each other.

[0169] Alternatively, the transmittance (degree of light transmission) of the first optical region DA1 and the transmittance (degree of light transmission) of the second optical region DA2 may be different from each other.

[0170] In this case, the first transmission area TA1 of the first optical region DA1 and the second transmission area TA2 of the second optical region DA2 may have different shapes or sizes. Alternatively, even if the first transmission area TA1 of the first optical region DA1 and the second transmission area TA2 of the second optical region DA2 have the same shape or size, a portion of the first transmission area TA1 in the first optical region DA1 and a portion of the second transmission area TA2 in the second optical region DA2 may still be different from each other.

[0171] For example, if the first optical electronic device overlapping the first optical region DA1 is a camera and the second optical electronic device overlapping the second optical region DA2 is a detection sensor, the camera may require a larger amount of light than the detection sensor.

[0172] Therefore, the transmittance (degree of light transmission) of the first optical region DA1 can be greater than that of the second optical region DA2.

[0173] In this case, the size of the first transmission area TA1 of the first optical region DA1 can be larger than the size of the second transmission area TA2 of the second optical region DA2. Alternatively, even if the first transmission area TA1 of the first optical region DA1 and the second transmission area TA2 of the second optical region DA2 have the same size, a portion of the first transmission area TA1 in the first optical region DA1 can still be larger than a portion of the second transmission area TA2 in the second optical region DA2.

[0174] For ease of description, the following example will illustrate that the transmittance (degree of light transmission) of the first optical region DA1 is greater than that of the second optical region DA2.

[0175] Furthermore, as illustrated in FIG4, in an exemplary embodiment of the present invention, the transmissive regions TA1 and TA2 may each be referred to as transparent regions, and the transmittance is referred to as transparency.

[0176] Furthermore, as shown in FIG4, in an exemplary embodiment of the present invention, it is assumed that the first optical area DA1 and the second optical area DA2 are disposed at the upper end of the display area of ​​the display panel and are arranged side by side along the left / right direction.

[0177] Please refer to Figure 4. The horizontal display area with the first optical area DA1 and the second optical area DA2 is called the first horizontal display area HA1, and the horizontal display area without the first optical area DA1 and the second optical area DA2 is called the second horizontal display area HA2.

[0178] Please refer to Figure 4. The first horizontal display area HA1 may include the general area NA, the first optical area DA1, and the second optical area DA2. Conversely, the second horizontal display area HA2 may only include the general area NA.

[0179] Figure 5A is a diagram illustrating an example of the arrangement of signal lines in the first optical area and the general area of ​​a display panel according to an exemplary embodiment of the present invention.

[0180] Figure 5B is a diagram illustrating an example of the arrangement of signal lines in the second optical area and the general area of ​​a display panel according to an exemplary embodiment of the present invention.

[0181] That is, FIG5A is a diagram illustrating the arrangement of signal lines in the first optical area DA1 and the general area NA of a display panel according to an exemplary embodiment of the present invention. FIG5B is a diagram illustrating the arrangement of signal lines in the second optical area DA2 and the general area NA of a display panel according to an exemplary embodiment of the present invention.

[0182] The first horizontal display area HA1 shown in Figures 5A and 5B is a part of the first horizontal display area HA1 of the display panel DP, and the second horizontal display area HA2 is a part of the second horizontal display area HA2 of the display panel.

[0183] The first optical area DA1 shown in Figure 5A is a part of the first optical area DA1 of the display panel, and the second optical area DA2 shown in Figure 5B is a part of the second optical area DA2 of the display panel.

[0184] Please refer to Figures 5A and 5B. The first horizontal display area HA1 may include a general area, a first optical area DA1, and a second optical area DA2. The second horizontal display area HA2 may include a general area.

[0185] Various types of horizontal lines HL1, HL2 and various types of vertical lines VLn, VL1, VL2 can be installed on the display panel.

[0186] In an exemplary embodiment of the present invention, the horizontal direction and the vertical direction may represent two directions that intersect each other. The viewing directions of the horizontal direction and the vertical direction may be different from each other. For example, in an exemplary embodiment of the present invention, the horizontal direction may represent the direction in which a gate line is extended, and the vertical direction may represent the direction in which a data line is extended. For example, as described above, the horizontal and vertical directions will be described.

[0187] Please refer to Figures 5A and 5B. The multiple horizontal lines set on the display panel may include the first horizontal line HL1 set in the first horizontal display area HA1 and the second horizontal line HL2 set in the second horizontal display area HA2.

[0188] The horizontal lines on the display panel can be gate lines. That is, the first horizontal line HL1 and the second horizontal line HL2 can each be gate lines. Gate lines can include various types of gate lines depending on the structure of the sub-pixels.

[0189] Please refer to Figures 5A and 5B. The vertical lines set on the display panel may include a general vertical line VLn set only in the general area, a first vertical line VL1 that passes through both the first optical area DA1 and the general area, and a second vertical line VL2 that passes through both the second optical area DA2 and the general area.

[0190] The vertical lines on the display panel can include data lines, drive voltage lines, etc. Furthermore, the vertical lines can also include reference voltage lines, initialization voltage lines, etc. That is, generally, the vertical line VLn, the first vertical line VL1, and the second vertical line VL2 can each include data lines, drive voltage lines, etc., and further include reference voltage lines, initialization voltage lines, etc.

[0191] In an exemplary embodiment of the present invention, the term "horizontal" in the second horizontal line HL2 only indicates that the signal is transmitted from the left (or right) to the right (or left), but does not mean that the second horizontal line HL2 extends in a straight line only along a precise horizontal direction. That is, Figures 5A and 5B illustrate the second horizontal line HL2 as having a straight line shape. However, the second horizontal line HL2 may also include curved or arcuate portions. Similarly, the first horizontal line HL1 may also include curved or arcuate portions.

[0192] In an exemplary embodiment of the present invention, the term "vertical" in a general vertical line VLn only indicates that the signal is transmitted from the upper side (or lower side) to the lower side (or upper side), but does not mean that the general vertical line VLn extends in a straight line only along a precise vertical direction. That is, Figures 5A and 5B illustrate that the general vertical line VLn has a straight line shape. However, the general vertical line VLn may also include curved or arcuate portions. Similarly, the first vertical line VL1 and the second vertical line VL2 may each include curved or arcuate portions.

[0193] Referring to Figure 5A, the first optical region DA1 contained in the first horizontal display region HA1 may include a light-emitting region and a first transmissive region. The outer region of the first transmissive region in the first optical region DA1 may include the light-emitting region.

[0194] Please refer to Figure 5A. In order to improve the transmittance of the first optical region DA1, the first horizontal line HL1 passing through the first optical region DA1 can extend while bypassing the first transmission region in the first optical region DA1.

[0195] Therefore, the first horizontal line HL1 passing through the first optical zone DA1 may include an arc-shaped portion, a curved portion, etc., that bypasses a portion disposed outside the outer periphery of the first transmission zone.

[0196] Therefore, the first horizontal line HL1 disposed in the first horizontal display area HA1 and the second horizontal line HL2 disposed in the second horizontal display area HA2 can have different shapes or lengths. That is, the first horizontal line HL1 that passes through the first optical area DA1 and the second horizontal line HL2 that does not bypass the first optical area DA1 can have different shapes or lengths.

[0197] In addition, in order to improve the transmittance of the first optical region DA1, the first vertical line VL1 passing through the first optical region DA1 can extend while bypassing the first transmission region in the first optical region DA1.

[0198] Therefore, the first vertical line VL1 passing through the first optical zone DA1 may include an arc-shaped portion, a curved portion, etc., that bypasses a portion disposed outside the outer periphery of the first transmission zone.

[0199] Therefore, the first vertical line VL1 passing through the first optical zone DA1 and the general vertical line VLn located in the general zone but not passing through the first optical zone DA1 can have different shapes or lengths.

[0200] Please refer to Figure 5A. The first transmission area in the first optical area DA1 contained in the first horizontal display area HA1 can be arranged in an inclined direction.

[0201] Referring to Figure 5A, the light-emitting area can be disposed in the first optical area DA1 of the first horizontal display area HA1 between two first transmissive areas that are adjacent to each other in the left / right direction. The light-emitting area can be disposed in the first optical area DA1 of the first horizontal display area HA1 between two first transmissive areas that are adjacent to each other in the upward / downward direction.

[0202] Please refer to Figure 5A. All first horizontal lines HL1 disposed in the first horizontal display area HA1, that is, all first horizontal lines HL1 passing through the first optical area DA1, may each include at least one of an arcuate portion and a curved portion that bypasses a portion disposed outside the outer periphery of the first transmission area.

[0203] Referring to Figure 5B, the second optical region DA2 contained in the first horizontal display region HA1 may include a light-emitting region and a second transmissive region TA2. Within the second optical region DA2, the outer region of the second transmissive region TA2 may include the light-emitting region.

[0204] The positions and arrangement of the light-emitting area and the second transmission area TA2 in the second optical area DA2 can be the same as those of the light-emitting area and the second transmission area in the first optical area DA1 in Figure 5A.

[0205] Alternatively, as shown in Figure 5B, the position and arrangement of the light-emitting area and the second transmission area TA2 in the second optical area DA2 may differ from the position and arrangement of the light-emitting area and the second transmission area in the first optical area DA1 in Figure 5A.

[0206] For example, referring to Figure 5B, the second transmission area TA2 can be arranged horizontally (left / right) within the second optical area DA2. No light-emitting area can be positioned between two adjacent second transmission areas TA2 arranged horizontally (left / right). Furthermore, the light-emitting area in the second optical area DA2 can be positioned between multiple adjacent second transmission areas TA2 arranged vertically (upward / downward). That is, the light-emitting area can be positioned between two rows of second transmission areas TA2.

[0207] The first horizontal line HL1 can have the same shape as shown in Figure 5A, passing through the second optical zone DA2 in the first horizontal display area HA1 and the general area surrounding the second optical zone DA2.

[0208] Alternatively, as shown in Figure 5B, the first horizontal line HL1 may have a different shape than that shown in Figure 5A, passing through the second optical area DA2 in the first horizontal display area HA1 and the general area surrounding the second optical area DA2.

[0209] That is, this is because the position and arrangement of the light-emitting area and the second transmission area TA2 in the second optical area DA2 in Figure 5B are different from the position and arrangement of the light-emitting area and the second transmission area in the first optical area DA1 in Figure 5A.

[0210] Please refer to Figure 5B. When the first horizontal line HL1 passes through the second optical zone DA2 in the first horizontal display area HA1 and the general area surrounding the second optical zone DA2, the first horizontal line HL1 can pass in a straight line between a plurality of second transmission zones TA2 arranged adjacent to each other in the upward / downward direction, without having an arc or bend.

[0211] In other words, a first horizontal line HL1 that has an arcuate or curved portion in the first optical zone DA1 may not have an arcuate or curved portion in the second optical zone DA2.

[0212] To improve the transmittance of the second optical zone DA2, the second vertical line VL2 passing through the second optical zone DA2 can be extended while bypassing the second transmission zone TA2 in the second optical zone DA2.

[0213] Therefore, the second vertical line VL2 passing through the second optical zone DA2 may include an arc-shaped portion, a curved portion, etc., that bypasses a portion disposed outside the outer periphery of the second transmission zone TA2.

[0214] Therefore, the second vertical line VL2 passing through the second optical zone DA2 and the general vertical line VLn located in the general zone but not passing through the second optical zone DA2 can have different shapes or lengths.

[0215] As shown in Figure 5A, the first horizontal line HL1 passing through the first optical zone DA1 may include an arc-shaped portion, a curved portion, etc., that bypasses a portion disposed outside the outer periphery of the first transmission zone.

[0216] Therefore, the length of the first horizontal line HL1 that passes through the first optical zone DA1 and the second optical zone DA2 can be slightly greater than the length of the second horizontal line HL2 that is only set in the general area and does not pass through the first optical zone DA1 and the second optical zone DA2.

[0217] Therefore, the resistance of the first horizontal line HL1 (hereinafter referred to as the first resistance) passing through the first optical zone DA1 and the second optical zone DA2 can be slightly greater than the resistance of the second horizontal line HL2 (hereinafter referred to as the second resistance) which is only set in the general area and does not pass through the first optical zone DA1 and the second optical zone DA2.

[0218] Referring to Figures 5A and 5B, according to the light transmission structure, the first optical region DA1, which at least partially overlaps with the first optical electronic device 170a, includes these first transmission regions TA1, and the second optical region DA2, which at least partially overlaps with the second optical electronic device 170b, includes these second transmission regions TA2. Therefore, the number of sub-pixels per unit area in each of the first optical region DA1 and the second optical region DA2 can be less than the number of sub-pixels per unit area in the general region NA.

[0219] The number of sub-pixels connected by the first horizontal line HL1 that passes through the first optical area DA1 and the second optical area DA2 may be different from the number of sub-pixels connected by the second horizontal line HL2 that is only set in the general area and does not pass through the first optical area DA1 and the second optical area DA2.

[0220] The number of sub-pixels connected by the first horizontal line HL1 that passes through the first optical area DA1 and the second optical area DA2 (first quantity) may be different from the number of sub-pixels connected by the second horizontal line HL2 that is only set in the general area and does not pass through the first optical area DA1 and the second optical area DA2 (second quantity).

[0221] The difference between the first quantity and the second quantity can vary depending on the difference between the resolution of the first optical region DA1 and the second optical region DA2 and the resolution of the general region. For example, the difference between the first quantity and the second quantity can increase as the difference between the resolution of the first optical region DA1 and the second optical region DA2 and the resolution of the general region increases.

[0222] As described above, because the number of sub-pixels connected to the first horizontal line HL1 that passes through the first optical area DA1 and the second optical area DA2 (first number) is less than the number of sub-pixels connected to the second horizontal line HL2 that is only set in the general area and does not pass through the first optical area DA1 and the second optical area DA2 (second number), the area of ​​the first horizontal line HL1 overlapping other surrounding electrodes or lines can be smaller than the area of ​​the second horizontal line HL2 overlapping other surrounding electrodes or lines.

[0223] Therefore, the parasitic capacitance formed between the first horizontal line HL1 and other surrounding electrodes or lines (hereinafter referred to as the first capacitance) can be significantly lower than the parasitic capacitance formed between the second horizontal line HL2 and other surrounding electrodes or lines (hereinafter referred to as the second capacitance).

[0224] Considering the high-low relationship between the first resistor and the second resistor (first resistor ≥ second resistor) and the high-low relationship between the first capacitor and the second capacitor (first capacitor ≪ second capacitor), the resistance-capacitance (RC) value of the first horizontal line HL1 passing through the first optical area DA1 and the second optical area DA2 (hereinafter referred to as the first RC value) can be significantly smaller than the RC value of the second horizontal line HL2 that is only set in the general area and does not pass through the first optical area DA1 and the second optical area DA2 (hereinafter referred to as the second RC value) (first RC value ≪ second RC value).

[0225] The signal transmission characteristics via the first horizontal line HL1 and the signal transmission characteristics via the second horizontal line HL2 can be changed by the difference between the first RC value of the first horizontal line HL1 and the second RC value of the second horizontal line HL2 (hereinafter referred to as RC load deviation).

[0226] The cross-sectional structure of the general area NA of the display device 100 will be described in more detail below with reference to FIG6.

[0227] Figure 6 is a cross-sectional view illustrating the cross-sectional structure of a pixel region disposed in a general area according to an exemplary embodiment of the present invention.

[0228] In the general region NA, the transistor layer TRL can be disposed on the upper portion of the substrate SUB, and the planarization layer PLN can be disposed on the upper portion of the transistor layer TRL. Furthermore, the light-emitting element layer EDL can be disposed on the upper portion of the planarization layer PLN, the sealing layer ENCAP can be disposed on the upper portion of the light-emitting element layer EDL, the touch sensing layer TSL can be disposed on the upper portion of the sealing layer ENCAP, and the protective layer PAC can be disposed on the upper portion of the touch sensing layer TSL. Additionally, the organic material layer PCL can be disposed on the upper portion of the protective layer PAC, and the polarizing layer POL can be disposed on the upper portion of the organic material layer PCL.

[0229] The substrate SUB is a component used to support various constituent elements included in the display device 100, and may be made of an insulating material. The substrate SUB may include a first substrate 110a, a second substrate 110b, and an interlayer insulating film 110c. The interlayer insulating film 110c may be disposed between the first substrate 110a and the second substrate 110b. As described above, the substrate SUB is composed of the interlayer insulating film 110c, the first substrate 110a, and the second substrate 110b, which inhibit moisture penetration. For example, the first substrate 110a and the second substrate 110b may each be a substrate made of polyimide (PI).

[0230] Various types of patterns (e.g., 131, 132, 133, 134, 231, 232, 233, 234), various types of insulating films (e.g., 111a, 111b, 112, 113a, 113b, 114), and various types of metal patterns (e.g., TM, GM, 135) can be disposed on the transistor layer TRL in the general area NA to form, for example, a driving transistor DT and at least one switching transistor Ts, and a capacitor, for example, at least one capacitor.

[0231] The stacking structure of the transistor layer TRL will be described in more detail below.

[0232] Multiple buffer layers 111a can be disposed on the second substrate 110b, and active buffer layers 111b can be disposed on the multiple buffer layers 111a.

[0233] The metal layer 135 can be disposed on the multiple buffer layer 111a.

[0234] In this case, the metal layer 135 can be used as a light shield, and is also called a light blocking layer.

[0235] The active buffer layer 111b can be disposed on the metal layer 135.

[0236] The first active layer 134 of the driving transistor DT can be disposed on the active buffer layer 111b. For example, the first active layer 134 can be made of polycrystalline silicon (p-Si), amorphous silicon (a-Si), or oxide semiconductor. However, the present invention is not limited thereto. Meanwhile, the driving transistor DT is formed on the active buffer layer 111b and includes the first active layer 134, a first gate insulating film 112 for covering the first active layer 134, a first gate electrode 131 disposed on the first gate insulating film 112, a first interlayer insulating film 113a for covering the first gate electrode 131, a second gate insulating film 113b disposed on the first interlayer insulating film 113a, a third interlayer insulating film 113c disposed on the second gate insulating film 113b, and a first source electrode 132 and a first drain electrode 133 disposed on the third interlayer insulating film 113c.

[0237] The first gate insulating film 112 may be disposed on the first active layer 134. The first gate insulating film 112 may be made of silicon oxide (SiO x), silicon nitride (SiN x), or a multilayer structure thereof.

[0238] Furthermore, the first gate electrode 131 driving the transistor DT can be disposed on the first gate insulating film 112. The first gate electrode 131 is disposed on the first gate insulating film 112 and overlaps the first active layer 134. The first gate electrode 131 can be made of various conductive materials, such as magnesium (Mg), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), tungsten (W), gold (Au), or alloys of the above metals. However, the present invention is not limited thereto.

[0239] The gate material layer GM can be disposed on the first gate insulating film 112 and provided at a position different from the position where the driving transistor DT is formed.

[0240] The first interlayer insulating film 113a can be disposed on the first gate electrode 131 and the gate material layer GM. The metal pattern TM can be disposed on the first interlayer insulating film 113a. The second gate insulating film 113b can be disposed simultaneously with covering the metal pattern TM on the first interlayer insulating film 113a.

[0241] The second gate insulating film 113b provides a base for forming the second active layer 234 and separates the second active layer 234 from the first active layer 134.

[0242] The second active layer 234 of the switching transistor Ts can be disposed on the second gate insulating film 113b. For example, the second active layer 234 can be made of polycrystalline silicon, amorphous silicon, or oxide semiconductor. However, the present invention is not limited thereto.

[0243] The third interlayer insulating film 113c can be disposed on the second active layer 234. Furthermore, the second gate electrode 231 of the switching transistor Ts is disposed on the third interlayer insulating film 113c. The second gate electrode 231 is disposed on the third interlayer insulating film 113c and overlaps the second active layer 234.

[0244] The third interlayer insulating film 113c covers the second active layer 234 of the switching transistor Ts. Because the third interlayer insulating film 113c is formed on the second active layer 234, it is implemented as an inorganic film. For example, the third interlayer insulating film 113c may be made of silicon oxide (SiO2), silicon nitride (SiNx), or a multilayer structure thereof.

[0245] The second gate electrode 231 may be made of a metallic material. For example, the second gate electrode 231 may be configured as a single-layer or multi-layer structure made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy of the above metals. However, the present invention is not limited thereto.

[0246] Meanwhile, the switching transistor Ts is formed on the second gate insulating film 113b and includes a second active layer 234, a third interlayer insulating film 113c for covering the second active layer 234, a second gate electrode 231 disposed on the third interlayer insulating film 113c, a third interlayer insulating film 113c for covering the second gate electrode 231, and a second source electrode 232 and a second drain electrode 233 disposed on the third interlayer insulating film 113c.

[0247] The switching transistor Ts may further include a gate material layer GM disposed on the lower portion of the first interlayer insulating film 113a and used to overlap the second active layer 234. The gate material layer GM can block light entering the second active layer 234, thereby ensuring the reliability of the switching transistor Ts. The gate material layer GM and the first gate electrode 131 may be made of the same material, and the gate material layer GM may be formed on the top surface of the first gate insulating film 112. The gate material layer GM may be electrically connected to the second active layer 234 and constitute a dual gate. The first source electrode 132 and the first drain electrode 133 of the driving transistor DT and the second source electrode 232 and the second drain electrode 233 of the switching transistor Ts may be disposed on the third interlayer insulating film 113d.

[0248] The second source electrode 232 and the second drain electrode 233 can be formed on the third interlayer insulating film 113d and are made of the same material as the first source electrode 132 and the first drain electrode 133, thereby reducing the number of masking processes.

[0249] The first source electrode 132 and the first drain electrode 133 can be connected to one side and the other side of the first active layer 134 respectively via contact holes provided in the third interlayer insulating film 113d, the third interlayer insulating film 113c, the second gate insulating film 113b, the first interlayer insulating film 113a and the first gate insulating film 112.

[0250] The second source electrode 232 and the second drain electrode 233 can be connected to one side and the other side of the second active layer 234 respectively via contact holes provided in the third interlayer insulating film 113d and the third interlayer insulating film 113c.

[0251] The first source electrode 132, the first drain electrode 133, the second source electrode 232, and the second drain electrode 233 may each be configured as a single-layer or multi-layer structure made of various conductive materials such as magnesium (Mg), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), tungsten (W), gold (Au), or alloys of the above metals. However, the present invention is not limited thereto.

[0252] A portion of the first active layer 134, which overlaps the first gate electrode 131, forms a channel region. One of the first source electrode 132 and the first drain electrode 133 is connected to one side of the channel region of the first active layer 134, and the other of the first source electrode 132 and the first drain electrode 133 is connected to the other side of the channel region of the first active layer 134. The second active layer 234 can be configured with the same shape as the first active layer 134. When the second active layer 234 is implemented using an oxide semiconductor material, the second active layer 234 includes a true second channel region without doping impurities, and a second source region and a second drain region that are doped with impurities and thus have conductivity.

[0253] The passivation layer 114 can be disposed on the first source electrode 132, the first drain electrode 133, the second source electrode 232, and the second drain electrode 233. The passivation layer 114 can be used to protect the driving transistor DT and is made of, for example, silicon oxide (SiO x), silicon nitride (SiN x), or an inorganic film with a multilayer bulk structure thereof.

[0254] Simultaneously, the gate material layer GM and the metal pattern TM can be disposed on the first gate insulating film 112 while overlapping each other, thereby realizing the capacitor Cst. For example, the metal pattern TM can be configured as a single-layer or multi-layer structure made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu), or an alloy of the above metals.

[0255] The capacitor Cst stores the data voltage applied via the data line DL for a preset period of time and provides the data voltage to the light-emitting element ED (120). The capacitor Cst includes two corresponding electrodes and a dielectric material located between the two electrodes. A first interlayer insulating film 113a is disposed between the gate material layer GM and the metal pattern TM.

[0256] The metal pattern TM or gate material layer GM of capacitor Cst can be electrically connected to the second drain electrode 233 or the second source electrode 232 of switching transistor Ts. However, the present invention is not limited thereto. The connection relationship of capacitor Cst can vary depending on the pixel driving circuit.

[0257] In addition, the metal layer 135 can be additionally disposed on the multiple buffer layer 111a to overlap the gate material layer GM and the metal pattern TM, thereby forming a dual capacitor Cst.

[0258] In an exemplary embodiment of the present invention, at least one switching transistor Ts has an active layer made of oxide semiconductor. Transistors with an active layer made of oxide semiconductor offer excellent leakage current blocking capabilities and require relatively low manufacturing costs compared to transistors with an active layer made of polysilicon. Therefore, to reduce power consumption and manufacturing costs, a pixel circuit according to an exemplary embodiment of the present invention includes at least one switching transistor or driving transistor made of oxide semiconductor material.

[0259] All transistors that include driving transistors and constitute pixel circuitry may each have an active layer made of oxide semiconductor. Alternatively, only some transistors may be implemented using oxide semiconductor.

[0260] However, transistors implemented using oxide semiconductors are difficult to guarantee in terms of reliability. Transistors implemented using polysilicon can provide high operating speed and excellent reliability. Therefore, an exemplary embodiment of the present invention includes both transistors implemented using oxide semiconductors and transistors implemented using polysilicon. However, the present invention is not limited thereto. Depending on the design, pixel circuits may be constructed using only transistors implemented using oxide semiconductors or only transistors implemented using polysilicon.

[0261] The planarization layer PLN can be disposed on the upper part of the transistor layer TRL.

[0262] The planarization layer PLN may include a first planarization layer 115a and a second planarization layer 115b. The planarization layer PLN protects the driving transistor DT and planarizes the upper portion of the driving transistor DT.

[0263] The first planarization layer 115a may be disposed on the passivation layer 114.

[0264] The connecting electrode 125 can be disposed on the first planarization layer 115a.

[0265] The connecting electrode 125 can be connected to one of the first source electrode 132 and the first drain electrode 133 via a contact hole provided in the first planarization layer 115a.

[0266] The second planarization layer 115b may be disposed on the connecting electrode 125.

[0267] The light-emitting element layer (EDL) can be disposed on the upper portion of the second planarization layer 115b.

[0268] The following will describe in detail the stacking structure of the light-emitting element layer (EDL).

[0269] The anode 121 may be disposed on the second planarization layer 115b. In this case, the anode 121 may be electrically connected to the connecting electrode 125 via a contact hole provided in the second planarization layer 115b. The anode 121 may be made of a metallic material.

[0270] In the case where the display device 100 is a top-emitting display device, the anode 121 may further include a transparent conductive layer and a reflective layer disposed on the transparent conductive layer. In the top-emitting display device, light emitted from the light-emitting element ED (120) is transmitted toward the upper side of the substrate SUB on which the light-emitting element ED (120) is disposed. For example, the transparent conductive layer may be made of a transparent conductive oxide such as ITO or IZO. For example, the reflective layer may be made of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or an alloy of the above metals.

[0271] The dam 116 can be provided while covering the anode 121. A portion of the dam 116 corresponding to the light-emitting area of ​​the sub-pixel can be opened. A portion of the anode 121 can be exposed through the opened portion of the dam 116 (hereinafter referred to as the opening area). In this case, the dam 116 can be made of an inorganic insulating material such as silicon nitride (SiN x) or silicon oxide (SiO x), or an organic insulating material such as benzocyclobutene resin, acrylic resin, or amide resin. However, the present invention is not limited thereto.

[0272] Although not shown, spacers may be further provided on the embankment 116. The spacers and the embankment 116 may be made of the same material.

[0273] The light-emitting layer 122 can be disposed in the opening area of ​​the embankment 116 and in the area surrounding the opening area. Therefore, the light-emitting layer 122 can be disposed on the anode 121 exposed through the opening area of ​​the embankment 116.

[0274] The cathode 123 can be disposed on the light-emitting layer 122.

[0275] The light-emitting element ED (120) can be formed from an anode 121, a light-emitting layer 122, and a cathode 123. The light-emitting layer 122 can contain multiple organic films.

[0276] The sealing layer ENCAP can be placed on the upper part of the light-emitting element layer EDL.

[0277] The ENCAP sealing layer can have a single-layer structure or a multi-layer structure. For example, the ENCAP sealing layer may include a first sealing layer 117a, a second sealing layer 117b, and a third sealing layer 117c.

[0278] In this case, the first sealing layer 117a and the third sealing layer 117c can each be made of an inorganic film, and the second sealing layer 117b can be made of an organic film. Among the first sealing layer 117a, the second sealing layer 117b and the third sealing layer 117c, the second sealing layer 117b can be the thickest and serves as a planarization layer.

[0279] The first sealing layer 117a may be disposed on the cathode 123 and is closest to the light-emitting element ED (120). The first sealing layer 117a may be made of an inorganic insulating material that can be deposited at low temperatures. For example, the first sealing layer 117a may be made of silicon nitride (SiN x), silicon oxide (SiO x), silicon oxynitride (SiON), aluminum oxide (Al 2O 3), etc. Because the first sealing layer 117a is deposited in a low-temperature environment, damage to the light-emitting layer 122 made of organic materials susceptible to high-temperature environments can be suppressed during the deposition process.

[0280] The area of ​​the second sealing layer 117b may be smaller than the area of ​​the first sealing layer 117a. In this case, the second sealing layer 117b may be formed to expose the two opposite ends of the first sealing layer 117a. The second sealing layer 117b can serve as a buffer to alleviate stress between multiple layers caused when the flexible display device is bent. The second sealing layer 117b can be used to improve planarization performance.

[0281] For example, the second sealing layer 117b may be made of an organic insulating material such as acrylic resin, epoxy resin, polyimide, polyethylene, or silicon oxycarbon (SiOC). For example, the second sealing layer 117b may also be formed by inkjet printing. However, the invention is not limited thereto.

[0282] A third sealing layer 117c may be formed on the upper portion of the substrate SUB having the second sealing layer 117b, to cover the top and side surfaces of both the second sealing layer 117b and the first sealing layer 117a. In this case, the third sealing layer 117c can prevent or minimize the penetration of external moisture or oxygen into the first sealing layer 117a and the second sealing layer 117b. For example, the third sealing layer 117c may be made of an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al₂O₃).

[0283] Although not shown, a color filter can still be provided on the ENCAP sealing layer. However, the invention is not limited thereto.

[0284] The touch sensing layer TSL can be placed on the upper part of the sealing layer ENCAP.

[0285] The touch buffer film 118a can be disposed on the upper part of the sealing layer ENCAP, and the touch circuit 140 can be disposed on the touch buffer film 118a.

[0286] The touch circuit 140 may include a touch sensor metal 141 and a bridging metal 142 disposed on different layers. An interlayer insulating film 118b may be disposed between the touch sensor metal 141 and the bridging metal 142.

[0287] For example, touch sensor metal 141 may include a first touch sensor metal, a second touch sensor metal, and a third touch sensor metal disposed adjacent to each other. The first touch sensor metal and the second touch sensor metal may be electrically connected to each other. However, when the third touch sensor metal exists between the first touch sensor metal and the second touch sensor metal, the first touch sensor metal and the second touch sensor metal may be electrically connected to each other via a bridging metal 142 existing in a layer different from the layer in which the first touch sensor metal and the second touch sensor metal are disposed. The bridging metal 142 may be insulated from the third touch sensor metal by a touch interlayer insulating film 118b.

[0288] During the fabrication process of the touch sensing layer TSL, liquid chemicals (developers, etchants, etc.) used in the process may be generated, or moisture or similar substances may be generated from the outside. A touch buffer film 118 may be provided, and the touch sensing layer TSL may be disposed on the touch buffer film 118a. The touch buffer film 118a can prevent liquid chemicals or moisture generated during the fabrication process of the touch sensing layer TSL from penetrating into the light-emitting layer 122 containing organic materials. Therefore, the touch buffer film 118a can prevent damage to the light-emitting layer 122, which is susceptible to liquid chemicals or moisture.

[0289] To suppress damage to the light-emitting layer 122, which contains organic materials susceptible to high temperatures, the touch buffer film 118a may be made of an organic insulating material that can be formed at a preset low temperature (e.g., 100°C or lower) and has a low permittivity of 1 to 3. For example, the touch buffer film 118a may be made of acrylic, epoxy, or silicone materials. When the flexible display device is bent, the sealing layer ENCAP may be damaged, and the touch sensor metal 141 disposed on the upper portion of the touch buffer film 118a may crack. Even when the flexible display device is bent, the touch buffer film 118a, made of an organic insulating material and having planarization performance, can still suppress damage to the sealing layer ENCAP and suppress cracking of the metals 141, 142 constituting the touch circuit 140.

[0290] The protective layer PAC (119) can be configured to cover the touch circuit 140. The protective layer 119 can be made of an organic insulating film.

[0291] An organic material layer PCL (150) is configured as a protective layer 119.

[0292] When a protective layer 119 made of only an organic insulating film is disposed on the uppermost layer of the display device 100, the protective layer 119 alone cannot fully compensate for the level difference caused by the touch sensing layer TSL disposed on the lower part of the protective layer 119, which may cause the user to visually identify the spots caused by the touch circuit 140.

[0293] An organic material layer 150 made of an organic insulating film is additionally disposed on the upper portion of the protective layer 119, which can improve the visibility of the display device 100 by suppressing the step difference on the uppermost layer of the display device 100.

[0294] The organic material layer 150 and the second sealing layer 117b of the sealing layer ENCAP can be made of the same material. For example, the organic material layer 150 can be made of organic insulating materials such as acrylic resin, epoxy resin, polyimide, polyethylene, or silicon carbide (SiOC). The organic material layer 150 can also be formed by inkjet printing. However, the present invention is not limited thereto.

[0295] A polarizing layer POL (160) is disposed on an organic material layer 150.

[0296] The polarization layer 160 suppresses the reflection of external light in the display area DA of the substrate SUB. When the display device 100 is used outdoors, external natural light can be introduced and reflected by a reflective layer contained in the anode 121 of the light-emitting element or by an electrode made of metal disposed on the lower portion of the light-emitting element 120. The light beam reflected as described above may suppress the visual recognition of the image on the display device 100. The polarization layer 160 can polarize the light introduced from the outside in a specific direction, thereby suppressing the reflected light from being released back outside the display device 100.

[0297] Although not shown, the cover glass can be bonded to the polarizing layer 160 via a bonding layer. The bonding layer can be used to bond constituent elements of the display device 100. For example, the bonding layer can be formed using an adhesive for optically clear displays, such as a pressure-sensitive adhesive, an optically clear adhesive (OCR), or an optically clear resin (OCR). However, the invention is not limited thereto.

[0298] The cover glass can protect the components of the display device 100 from external impacts and suppress damage such as scratches.

[0299] The first optical zone DA1 of the display device 100 will be described in more detail below with reference to Figures 7 and 8.

[0300] Figure 7 is a cross-sectional view illustrating the cross-sectional structure of the light-emitting region and the transmission region in the optical region according to an exemplary embodiment of the present invention. Figure 8A is a diagram illustrating the positional relationship between the deposition suppression layer and the transmission region according to an exemplary embodiment of the present invention. Figure 8B is an enlarged view of the transmission region according to an exemplary embodiment of the present invention.

[0301] For ease of description, the following description of the display area DA of the display panel DP will include an example of a general area NA and a first optical area DA1 (Figures 1A and 1B). However, the description of the first optical area DA1 can also be applied to the second optical area DA2.

[0302] Please refer to Figure 7. The first optical zone DA1 includes the light-emitting zone EA and the transmission zone TA.

[0303] The first optical region DA1, including the light-emitting region EA and the transmission region TA, can basically include the substrate SUB, the transistor layer TRL, the planarization layer PLN, the light-emitting element layer EDL, the sealing layer ENCAP, the touch sensing layer TSL, the protective layer PAC, the organic material layer PCL, and the polarization layer POL.

[0304] The substrate SUB, transistor layer TRL, planarization layer PLN, light-emitting element layer EDL, sealing layer ENCAP, touch sensing layer TSL, protective layer PAC, organic material layer PCL, and polarization layer POL contained in the first optical region DA1 are substantially the same as the constituent elements disposed in the general region NA of the display panel DP, and are represented by the same symbols. Therefore, repeated descriptions will be omitted.

[0305] Since the light-emitting area EA of the first optical area DA1 is essentially the same as the general area NA of the display panel DP, repeated descriptions of it will be omitted.

[0306] The following describes the transmission zone TA located in the first optical zone DA1.

[0307] Various types of insulating films (e.g., 111a, 111b, 112, 113a, 113b, 114, 115a, 115b, 117a, 117b, 117c, PAC) and substrate SUB disposed in the light-emitting area EA of the first optical area DA1 can also be disposed in the transmission area TA of the first optical area DA1 in the same manner.

[0308] However, apart from the insulating material disposed in the light-emitting region EA of the first optical region DA1, a material layer with electrical or opaque properties may not be disposed in the transmission region TA of the first optical region DA1.

[0309] According to an exemplary embodiment of the present invention, in order to ensure the transmittance of the transmission region TA, the cathode 123 is not disposed in the transmission region TA.

[0310] To implement this configuration, a deposition inhibition layer 150 is disposed on the luminescent layer 122 in the transmission region TA.

[0311] For example, the deposition inhibition layer 150 can be deposited simultaneously by using a fine metal mask (FMM) to correspond to the transmission region TA. Specifically, the FMM can be set to expose the transmission region TA, and then the deposition inhibition layer 150 can be formed.

[0312] When a cathode 123 is deposited after a deposition inhibition layer 150 is disposed on a light-emitting layer 122 in the transmission region TA, the bonding force between the deposition inhibition layer 150 and the layer disposed on the upper part of the deposition inhibition layer 150 is low, so the cathode 123 may not be deposited in the region where the deposition inhibition layer 150 is disposed.

[0313] Therefore, according to an exemplary embodiment of the present invention, the cathode 123 may not be disposed in the transmission region TA.

[0314] Furthermore, the metal material layer (e.g., 135, 131, GM, TM, 132, 133, 125) and semiconductor layer (e.g., 134) associated with the transistor are not disposed in the transmissive region TA. Additionally, the anode 121 included in the light-emitting element 120 may not be disposed in the transmissive region TA. Furthermore, the touch circuitry may not be disposed in the transmissive region TA.

[0315] That is, since the transmission region TA of the first optical region overlaps with the optical electronic device 170, in order for the optical electronic device 170 to operate normally, for example, multiple opaque constituent elements of the metal electrode are not disposed in the transmission region TA, which can improve the transmittance of the transmission region TA.

[0316] Furthermore, since, for example, the constituent elements of the metal electrode are not disposed in the transmission region TA of the first optical region DA1, the transmission region TA of the first optical region DA1 can be composed only of a flat layer.

[0317] Meanwhile, when the cathode is removed to ensure the transmittance of the transmission region TA in the UDC or UDIR model, UV reliability may deteriorate. That is, pixel shrinkage defects may occur in the light-emitting part due to outgassing of organic materials caused by UV light transmission.

[0318] Therefore, according to an exemplary embodiment of the present invention, degassing of organic materials caused by UV light transmission can be suppressed by reducing the volume of organic materials by removing a portion of the organic material in the transmission region TA.

[0319] According to an exemplary embodiment of the present invention, the bottom surface of the light-emitting layer 122 in the transmission region TA of the first optical region DA1 may be adjacent to the planarization layer PLN. That is, the embankment 116 may not be provided in the transmission region TA. Therefore, the volume of organic material provided in the transmission region TA can be reduced.

[0320] For example, when reducing the volume of organic material, such as that of the embankment, in the transmission zone, the deposition inhibition layer subsequently disposed in the transmission zone can be disposed not only on the upper part of the light-emitting layer, but also on the side of the embankment. Because the bonding force between the deposition inhibition layer and the layers disposed on the upper or lower part of the deposition inhibition layer is low, film separation may occur due to the step difference if the step difference exists on the lower part of the deposition inhibition layer.

[0321] Therefore, according to an exemplary embodiment of the present invention, the deposition suppression layer 150 may be disposed on a flat surface in the optical region DA1. That is, according to an exemplary embodiment of the present invention, the lower portion of the deposition suppression layer 150 in the optical region DA1 may be flat, and the deposition suppression layer 150 may not overlap the embankment 116.

[0322] According to an exemplary embodiment of the present invention, there is no step difference on the lower portion of the deposition inhibition layer 150, which can suppress film separation caused by the arrangement of the deposition inhibition layer 150.

[0323] Meanwhile, because the deposition suppression layer 150 is provided, the cathode 123 is not disposed on the upper portion of the deposition suppression layer 150 during the subsequent deposition of the cathode 123. That is, the cathode 123 may be disposed only in the light-emitting region EA of the optical region DA1. The side of the cathode 123 disposed in the light-emitting region EA may be adjacent to the side of the deposition suppression layer 150 disposed in the transmission region TA of the optical region DA1. However, the present invention is not limited thereto.

[0324] Referring also to Figures 8A and 8B, the area of ​​the transmission region TA and the area of ​​the deposition suppression layer 150 can be equal. In this case, the deposition suppression layer 150 can have a uniform thickness.

[0325] That is, because the deposition inhibition layer 150 is disposed in the entire transmission region TA, the opaque electrode of, for example, the cathode 123 is not disposed in the transmission region TA, which can improve the transmittance.

[0326] Figure 8A illustrates a triangular structure for the transmission region TA. However, the shape of the transmission region TA according to an exemplary embodiment of the present invention is not limited thereto. For example, the transmission region TA may have various shapes, such as circular, elliptical, quadrilateral, hexagonal, or octagonal.

[0327] A display device according to another exemplary embodiment of the present invention will now be described with reference to FIG9 and FIG10.

[0328] Figure 9 is a cross-sectional view illustrating the cross-sectional structure of the light-emitting region EA and the transmissive region TA in the optical region DA1 of the display device 200 according to another exemplary embodiment of the present invention. Figure 10A is a diagram illustrating the positional relationship between the deposition suppression layer 250 and the transmissive region TA according to another exemplary embodiment of the present invention. Figure 10B is an enlarged view of the transmissive region TA according to another exemplary embodiment of the present invention.

[0329] Except for the deposition suppression layer 250, the configuration of the display device in Figure 9 is essentially the same as that of the display devices in Figures 1 to 8. Therefore, for the sake of convenience, repeated descriptions will be omitted.

[0330] Please refer to Figures 9 and 10. According to an exemplary embodiment of the present invention, the deposition inhibition layer 250 may include a first portion 253 having a uniform thickness and a second portion 255 configured to surround the first portion and having a thickness less than that of the first portion.

[0331] In this case, the first part 253 can be integrated with the second part 255 and the first part 253 and the second part 255 can be made of the same material.

[0332] For example, the thickness of the second part 255 may decrease as the distance from the first part 253 increases.

[0333] Specifically, according to another exemplary embodiment of the present invention, the deposition inhibition layer 250 is deposited using an open-circuit mirror (FMM) during the process of forming the deposition inhibition layer 250. In this case, when the deposition inhibition layer 250 is formed with the FMM set to overlap a portion of the flat surface of the transmission region TA, taking into account process margin, the area exposed from the FMM is formed as a first portion 253 with a uniform thickness, and the area overlapping the FMM is formed as a second portion 255 with a thickness decreasing as the distance from the first portion 253 increases, by means of the process margin.

[0334] Referring to Figures 10A and 10B, the area of ​​the transmission region TA can be equal to the area of ​​the deposition inhibition layer 250 formed by the first portion 253 and the second portion 255. In this case, the width w in Figure 10A corresponds to the width w in Figure 10B of the second portion 255, which has a thickness that decreases with increasing distance from the first portion 253.

[0335] Therefore, the thickness of the second portion 255 decreases as the second portion 255 approaches the light-emitting region EA. Thus, according to another exemplary embodiment of the present invention, the deposition suppression layer 250 composed of the first portion 253 and the second portion 255 can be more easily disposed only on the flat surface of the optical region DA1 and not on the portion with a step difference (i.e., the embankment 116 disposed in the light-emitting region EA).

[0336] According to another exemplary embodiment of the present invention, the effectiveness of suppressing thin film separation defects caused by the arrangement of the deposition suppression layer 250 can be further improved.

[0337] Figure 11 is a top plan view illustrating the first optical region of a flexible display device according to another exemplary embodiment of the present invention. Figure 12 is an enlarged view illustrating region X in Figure 11.

[0338] First, referring to Figure 11, the first optical region DA1 may include a central region 310 and a border region 320 disposed around the central region 310.

[0339] The first optical region DA1 may include multiple horizontal lines HL. These horizontal lines HL can be used to connect transistors disposed in the frame region 320 and light-emitting elements disposed in the center region 310.

[0340] The flexible display device 300 according to an exemplary embodiment may include a wiring structure 340. Because the flexible display device includes the wiring structure 340, the central region 310 can be extended to a preset region a. This is because pixels disposed in the preset region a can be connected to transistors disposed in the border region 320 via the wiring structure 340.

[0341] The structure of the first optical zone DA1, which includes wiring structure 340, will be described in detail below.

[0342] Referring to Figure 12, the first optical area may include a plurality of light-emitting elements (EDs) disposed in the central area 310 and the border area 320. The first optical area may include these light-emitting elements (EDs) so that the first optical area can display a screen.

[0343] The first optical region may include a plurality of transistors 350 disposed in the frame region 320. The transistors 350 may not be disposed in the central region 310. Because the transistors are not disposed in the central region 310, the central region 310 may have higher transmittance.

[0344] The first optical region may include multiple columns containing a first column R1 and a second column R2. Each of these columns contained in the first optical region may be any area that traverses the first optical region in a horizontal direction. These columns may be defined by a pattern of transistor 350.

[0345] The flexible display device may include a plurality of light-emitting elements ED disposed in the central region 310 and in the first column R1, and a plurality of transistors 350 disposed in the border region 320 and in the second column R2.

[0346] The flexible display device may include a wiring structure 340 for connecting the light-emitting elements ED disposed in the first column R1 and the transistors 350 disposed in the second column R2.

[0347] Transistors 350 and light-emitting elements ED arranged in different columns can be connected by wiring structure 340. Therefore, transistors 350 can be connected to light-emitting elements ED, wherein the number of transistors 350 is greater than the number of light-emitting elements ED, and the number of light-emitting elements ED is greater than the number of transistors 350.

[0348] The number of light-emitting elements (EDs) in the first column R1 of the central area 310 can be greater than the number of light-emitting elements (EDs) in the second column R2 of the border area 320. Therefore, a larger number of transistors 350 are needed to operate the EDs in the first column R1, and a smaller number of transistors 350 are needed to operate the EDs in the second column R2. Therefore, among the transistors 350 in the second column R2 of the border area 320, the remaining (surplus) transistors 350 that are not electrically connected to the EDs in the second column R2 can be electrically connected to the EDs in the first column R1 via the wiring structure 340.

[0349] Throughout the central region 310, the number of pixels per unit area can be substantially constant. For example, a configuration where the number of pixels per unit area is substantially constant can represent a pixel pattern that is substantially uniform throughout the central region 310. Therefore, a large number of light-emitting elements ED can be arranged in the first column R1, the area of ​​the first column R1 overlapping the central region 310 being larger than the area of ​​the second column R2 overlapping the central region 310.

[0350] For example, the number of transistors 350 in the first column R1 of the border area 320 may be substantially equal to the number of transistors 350 in the second column R2 of the border area 320. In one example, when the number of light-emitting elements ED in the first column R1 of the center area 310 is greater than the number of light-emitting elements ED in the second column R2 of the center area 310, some transistors 350 in the second column R2 may be electrically connected to the light-emitting elements ED in the first column R1 but not electrically connected to the light-emitting elements ED in the second column R2.

[0351] Furthermore, the number of transistors 350 per unit area can be substantially constant throughout the entire border area 320. This substantially constant number of transistors 350 per unit area indicates that a transistor pattern is substantially uniform within the border area 320.

[0352] The area of ​​the border region 320 overlapping the first column R1 can be substantially equal to the area of ​​the border region 320 overlapping the second column R2. In one example, the number of transistors 350 disposed in the first column R1 of the border region 320 can be substantially equal to the number of transistors 350 disposed in the second column R2 of the border region.

[0353] When the bezel area 320 is configured as described above, the number of transistors 350 in the plurality of columns disposed in the bezel area 320 can be maintained constant, and the remaining transistors in a particular column can be electrically connected to the remaining light-emitting elements in another column via the wiring structure 340. Therefore, the flexible display device according to an exemplary embodiment can have a larger central area 310 than the flexible display device of the comparative example.

[0354] Several exemplary embodiments of the present invention may also be described below:

[0355] According to one aspect of the present invention, a display device includes: a substrate comprising a non-display area and a display area, the display area comprising an optical area containing a light-emitting area and a transmissive area and a general area surrounding the optical area; a planarization layer disposed on the substrate in the display area; a plurality of light-emitting elements disposed on the planarization layer and comprising an anode, a light-emitting layer and a cathode; a dam disposed on the planarization layer and used to cover one end of the anode; and a deposition suppression layer disposed on the light-emitting layer in the transmissive area of ​​the optical area and the light-emitting area, wherein the dam is disposed in the light-emitting area of ​​the transmissive area of ​​the optical area and the light-emitting area.

[0356] The display device may further include: an optical electronic device disposed on the lower portion of the substrate in the optical region.

[0357] The deposition inhibition layer can be set on a flat surface in the transmission area of ​​the optical zone.

[0358] The bottom surface of the light-emitting layer can be adjacent to the planarization layer in the transmission region of the optical zone.

[0359] The deposition inhibition layer and the embankment can be made to not overlap each other in the optical zone.

[0360] The side of the cathode in the light-emitting area of ​​the optical region may be adjacent to the side of the deposition inhibition layer in the transmission area of ​​the optical region.

[0361] The deposition inhibition layer can have a uniform thickness.

[0362] The deposition inhibition layer may include: a first portion having a uniform thickness; and a second portion configured to surround the first portion, wherein the thickness of the second portion is less than the thickness of the first portion.

[0363] The thickness of the second part can decrease as the distance from the first part increases.

[0364] The first part can be integrated with the second part, and the first part and the second part can be made of the same material.

[0365] According to another embodiment of the present invention, a display device includes: a substrate comprising a non-display area and a display area, the display area comprising an optical area containing a light-emitting area and a transmissive area and a general area surrounding the optical area; a planarization layer disposed on the substrate in the display area; a plurality of light-emitting elements disposed on the planarization layer and comprising an anode, a light-emitting layer and a cathode; a deposition suppression layer disposed on the light-emitting layer in the transmissive area, wherein the deposition suppression layer does not overlap the cathode; and an optical electronic device disposed on a lower portion of the substrate in the optical area, wherein the optical electronic device overlaps the deposition suppression layer.

[0366] The display device may further include a dam disposed on the planarization layer and used to cover one end of the anode, wherein the dam is disposed in the light-emitting area.

[0367] The deposition inhibition layer can be set on a flat surface in the transmission zone.

[0368] Although exemplary embodiments of the invention have been described in detail with reference to the accompanying drawings, the invention is not limited thereto and may be practiced in many different forms without departing from the technical concept of the invention. Therefore, exemplary embodiments of the invention are provided for illustrative purposes only and are not intended to limit the technical concept of the invention. The scope of the technical concept of the invention is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are illustrative in all respects and do not limit the invention. The scope of protection of the invention should be interpreted based on the claims, and all technical concepts within their equivalent scope should be interpreted as falling within the scope of the invention.

[0369] 100, 200, 300: Display devices 110a: First substrate 110b: Second substrate 110c: Interlayer insulating film 111a: Multiple buffer layers 111b: Active buffer layer 112: First gate insulating film 113a: First interlayer insulating film 113b: Second gate insulating film 113c: Third interlayer insulating film 113d: Third interlayer insulating film 114: Passivation layer 115a: First planarization layer 115b: Second planarization layer 116: Embankment 117a: First sealing layer 117b: Second sealing layer 117c: Third sealing layer 118a: Touch buffer film 118b: Touch interlayer insulating film 119: Protective layer 120: Light-emitting element 121: Anode 122: Emissive Layer 123: Cathode 125: Connecting electrodes 131: First gate electrode 132: First source electrode 133: First Drain Electrode 134: First Active Layer 135: Metal layer 140: Touch circuit 141: Touch sensor metal 142: Bridging metal 150: Organic material layer, deposition inhibition layer 160: Polarizing layer 170, 170a, 170b: Optical and electronic devices 231: Second gate electrode 232: Second source electrode 233: Second Drain Electrode 234: Second Active Layer 250: Deposition inhibition layer 253: Part One 255: Part Two 310: Central Area 320: Border Area 340: Wiring Structure 350: Transistor a: Area Blue SP: Blue subpixel Cst: Capacitor DA: Display area DA1, DA2: optical area Data: Image data DCS: Data-driven control signal DCTR: Display Controller DDC: Data Drive Circuit DL: Data Line DP: Display Panel DT: Driver Transistor EA: Emitting area ED: Light-emitting element EDC: Light-emitting control signal driver unit EDL: Light-emitting element layer EM(n): Light emission control signal ENCAP: Sealing layer EVDD: High-potential drive voltage EVSS: Low-potential drive voltage GCS: Gate Drive Control Signal GDC: Gate drive circuit GL: Gate circuit GM: Gate material layer Green SP: Green subpixel HA1: First horizontal display area HA2: Second level display area HL: Horizontal Line HL1, HL2: Horizontal lines HSYS: Host System N1: First node N2: Second node N3: Third node N4: Fourth Node N5: Fifth Node NA: General Area NDA: Non-display area PAC: Protective Layer PCL: Organic Material Layer PLN: Planarization layer POL: Polarizing layer R1: First column R2: Second column Red SP: Red subpixel SC1(n): First scan signal SC2(n): Second scan signal SC3(n): Third scan signal SC4(n): Fourth scan signal SDC: Scan Driver Unit SP: Subpixel SUB:Substrate T1, T2, T3, T4, T5, T6, T7: Transistors TA: Transmission zone TA1, TA2: Transmission zones TM: Metal Pattern TRL: Transistor Layer Ts: Switching transistor TSL: Touch Sensing Layer VLn, VL1, VL2: Vertical lines Vini: Second initialization voltage Var: First initial voltage Vdata: Data voltage Vobs: bias voltage w: width X: Area

Claims

1. A display device comprising: a substrate including a non-display area and a display area, the display area including an optical area containing a light-emitting area and a transmissive area and a general area surrounding the optical area; a planarization layer disposed on the substrate in the display area; a plurality of light-emitting elements disposed on the planarization layer and including an anode, a light-emitting layer and a cathode; a dam disposed on the planarization layer and used to cover one end of the anode; a deposition suppression layer disposed on the light-emitting layer in the transmissive area of ​​the optical area and the light-emitting area, but not on the light-emitting layer of the light-emitting area; and a sealing layer located on the light-emitting layer and made of silicon nitride, silicon oxide, silicon oxynitride or aluminum oxide, wherein the dam is disposed in the light-emitting area of ​​the optical area and the light-emitting area, but not in the transmissive area; wherein the cathode and the anode are not disposed in the transmissive area.

2. The display device as claimed in claim 1 further includes: an optical electronic device disposed on a lower portion of the substrate in the optical region.

3. The display device as claimed in claim 1, wherein the deposition inhibition layer is disposed on a flat surface in the transmission region of the optical region.

4. The display device as claimed in claim 1, wherein a bottom surface of the light-emitting layer is adjacent to the planarization layer in the transmissive region of the optical region.

5. The display device as claimed in claim 1, wherein the deposition suppression layer and the embankment do not overlap each other in the optical zone.

6. The display device as claimed in claim 1, wherein one side of the cathode disposed in the light-emitting region of the optical region is adjacent to one side of the deposition inhibition layer disposed in the transmission region of the optical region.

7. The display device as claimed in claim 1, wherein the deposition inhibition layer has a uniform thickness.

8. The display device as claimed in claim 7, wherein the deposition inhibition layer comprises: a first portion having a uniform thickness; and a second portion configured to surround the first portion, wherein a thickness of the second portion is less than the thickness of the first portion.

9. The display device as claimed in claim 8, wherein the thickness of the second portion decreases as the distance from the first portion increases.

10. The display device as claimed in claim 8, wherein the first portion is integrated with the second portion, and the first portion and the second portion are made of the same material.

11. A display device comprising: a substrate including a non-display area and a display area, the display area including an optical area having a light-emitting area and a transmissive area and a general area surrounding the optical area; a planarization layer disposed on the substrate in the display area; a plurality of light-emitting elements disposed on the planarization layer and including an anode, a light-emitting layer and a cathode; a deposition suppression layer disposed on the light-emitting layer in the transmissive area but not on the light-emitting layer in the light-emitting area, wherein the deposition suppression layer does not overlap the cathode; a sealing layer located on the light-emitting layer and made of silicon nitride, silicon oxide, silicon oxynitride or aluminum oxide; and an optoelectronic device disposed on a lower portion of the substrate in the optical area, wherein the optoelectronic device overlaps the deposition suppression layer, and wherein the cathode and the anode are not disposed in the transmissive area.

12. The display device as claimed in claim 11 further comprises: a dam portion disposed on the planarization layer and used to cover one end of the anode, wherein the dam portion is disposed in the light-emitting area.

13. The display device as claimed in claim 11, wherein the deposition inhibition layer is disposed on a flat surface in the transmission area.

Images