Semiconductor processing method

Abstract

A semiconductor processing method includes the following steps: dicing a semiconductor ingot to obtain a semiconductor wafer, wherein the semiconductor wafer includes a first side and a second side opposite to the first side; performing a double-sided polishing process to simultaneously polish the first and second sides of the semiconductor wafer using a diamond polishing slurry. The diamond polishing slurry contains diamond particles with a median particle size of 0.1 micrometers to 3 micrometers.

Description

Technical Field

[0001] This invention relates to a semiconductor processing method, and more particularly to a method for grinding semiconductor wafers. Prior Technology

[0002] Semiconductor wafers have a wide range of applications and are the core material for manufacturing various chips. During chip fabrication, the surface of semiconductor wafers typically requires grinding and polishing to ensure a smooth surface for subsequent semiconductor processing. Generally, the grinding process is divided into three stages: coarse grinding, medium grinding, and fine grinding, to ensure uniform wafer thickness. After grinding, coarse polishing and fine polishing are required to further reduce the surface roughness of the wafer. However, this series of grinding and polishing processes is not only time-consuming but also costly. Summary of the Invention

[0003] This invention provides a semiconductor processing method that can reduce the time and cost required for grinding and polishing processes.

[0004] At least one embodiment of the present invention provides a semiconductor processing method, comprising the following steps: cutting a semiconductor ingot to obtain a semiconductor wafer, wherein the semiconductor wafer includes a first side and a second side opposite to the first side; performing a double-sided polishing process to simultaneously polish the first side and the second side of the semiconductor wafer using a diamond polishing slurry. The diamond polishing slurry contains diamond particles with a median particle size of 0.1 micrometers to 3 micrometers. Simple Explanation of the Diagram

[0005] Figures 1A to 1D are various schematic diagrams of a semiconductor processing method according to an embodiment of the present invention. Figure 2 is a flowchart of a semiconductor processing method according to an embodiment of the present invention. Implementation

[0006] Figures 1A to 1D are various schematic diagrams of a semiconductor processing method according to an embodiment of the present invention. Figure 2 is a flowchart of a semiconductor processing method according to an embodiment of the present invention. Referring to step S1 of Figures 1A and 2, the semiconductor ingot 100 is cut to obtain a semiconductor wafer 110. In some embodiments, the semiconductor ingot 100 includes, for example, elemental semiconductors (e.g., silicon, germanium, or other suitable materials), compound semiconductors (e.g., silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, indium antimonide, or other suitable materials), alloy semiconductors (e.g., SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, GaInAsP, or other suitable materials), or other types of semiconductor materials.

[0007] In some embodiments, each semiconductor wafer 110 includes a first surface 110a and a second surface 110b opposite to the first surface 110a. At this stage, both the first surface 110a and the second surface 110b of the semiconductor wafer 110 are pre-polished surfaces and still possess some roughness. For example, the surface roughness Ra of the first surface 110a and the second surface 110b is 1000 nanometers to 5000 nanometers. Furthermore, at this stage, the bending radius (BOW) of the semiconductor wafer 110 is +80 micrometers to -80 micrometers, and the warpage (WARP) is 0 micrometers to 80 micrometers. In some embodiments, the semiconductor wafer 110 comprises silicon carbide, and one of the first surface 110a and the second surface 110b is a silicon surface, while the other is a carbon surface. In some embodiments, the semiconductor wafer 110 is a 6-inch to 8-inch wafer.

[0008] In some embodiments, the thickness of the semiconductor wafer 110 is 200 micrometers to 1600 micrometers.

[0009] Next, referring to step S2 in Figures 1B and 2, a double-sided polishing process is performed on the semiconductor wafer 110. In this embodiment, the semiconductor wafer 110 is placed in a double-sided polishing apparatus, and the first side 110a and the second side 110b are polished simultaneously. The double-sided polishing apparatus includes a first polishing disc 210, a second polishing disc 220, a first polishing pad 230, a second polishing pad 240, a sun gear 250, a first carrier 260a, a second carrier 260b, an internal gear 270, and an adjustment structure 280.

[0010] The first grinding disc 210 and the second grinding disc 220 are arranged opposite to each other. The first grinding pad 230 and the second grinding pad 240 are respectively disposed on the first grinding disc 210 and the second grinding disc 220, and sandwiched between the first grinding disc 210 and the second grinding disc 220. The sun gear 250, the first carrier 260a, the second carrier 260b, and the internal gear 270 are located between the first grinding pad 230 and the second grinding pad 240. During the double-sided grinding process, the first grinding disc 210 and the second grinding disc 220 rotate in opposite directions.

[0011] The first carrier 260a and the second carrier 260b have gears on their periphery, which mesh between the inner gear 270 and the sun gear 250, so that the first carrier 260a and the second carrier 260b can not only revolve around the sun gear 250, but also rotate on their own axis.

[0012] The first carrier 260a has through-holes for accommodating a plurality of semiconductor wafers 110, which are fixed within the through-holes of the first carrier 260. In other words, a double-sided grinding process can be performed on multiple semiconductor wafers 110 simultaneously. In some embodiments, these semiconductor wafers 110 may be obtained by cutting one or more semiconductor ingots. Optionally, the second carrier 260b has a plurality of through-holes for accommodating an adjustment structure 280, which is fixed within the through-holes of the second carrier 260b to adjust the process. In some embodiments, the combination of the second carrier 260b and the adjustment structure 280 may be replaced by an adjustment ring, which directly meshes between the internal gear 270 and the sun gear 250. During the double-sided grinding process, the internal gear 270 and the sun gear 250 drive the first carrier 260a and the second carrier 260b to rotate.

[0013] In this embodiment, during the double-sided polishing process, a diamond polishing slurry is applied to both the first and second surfaces of the semiconductor wafer 110 to simultaneously polish both surfaces. The diamond polishing slurry contains abrasive particles and a carrier solution, wherein the abrasive particles contain diamond particles with a median particle size (D50) of 0.1 micrometers to 3 micrometers, and the carrier solution contains water, alcohol, or a combination thereof or other solutions.

[0014] In some embodiments, during the double-sided polishing process, each first carrier 260a contains one to ten (five in the figure) semiconductor wafers 110, and weight is applied to the semiconductor wafers 110 in the first carrier 260a. In some embodiments, the thickness of the semiconductor wafers 110 is reduced by 20 micrometers to 28 micrometers during the double-sided polishing process. In some embodiments, weight is applied to the semiconductor wafers 110 in multiple first carriers 260a simultaneously. For example, a load of 100 kg to 200 kg is applied to the semiconductor wafers 110 in one to five first carriers 260a. Each first carrier 260a includes, for example, one 8-inch semiconductor wafer 110 or five 6-inch semiconductor wafers 110.

[0015] In some embodiments, the semiconductor wafer 110 is formed by a double-sided polishing process, comprising a first side 110a' and a second side 110b' (refer to Figures 1B and 1C), wherein the surface roughness Ra of 110a' and the second side 110b' is 1.0 nanometers to 5.0 nanometers. Furthermore, after performing the double-sided polishing process, the curvature of the semiconductor wafer 110 is +50 micrometers to -50 micrometers, and the warpage is 0 micrometers to 50 micrometers.

[0016] In embodiments of the present invention, a single double-sided grinding process replaces the complex process of coarse to fine grinding, thereby significantly saving processing time and costs. By simultaneously grinding both sides of the semiconductor wafer 110 using a double-sided grinding process, when both sides achieve balanced roughness, curvature and warpage can be improved. Conversely, if the two sides of the semiconductor wafer 110 are ground separately using two single-sided grinding processes, the surface roughness of the two sides of the semiconductor wafer 110 is easily inconsistent after processing, causing processing abnormalities and resulting in poorer curvature and warpage.

[0017] Next, referring to step S3 in Figures 1C and 2, after the double-sided grinding process, a first single-sided polishing process is performed on the first side. In this embodiment, the semiconductor wafer 110' is placed in a single-sided polishing apparatus, and the first side 110a' is polished. The single-sided polishing apparatus includes a polishing carrier 310, an actuator 312, a polishing pad 320, a turntable 330, an actuator 332, and a polishing slurry supply unit 340.

[0018] The polishing carrier 310 is suitable for holding one or more semiconductor wafers 110'. The turntable 330 is disposed at a corresponding position on the polishing carrier 310 for supporting the polishing pad 320. When polishing the semiconductor wafer 110', the surface 320a of the polishing pad 320 is adapted to face the semiconductor wafer 110' and the surface 310a of the polishing carrier 310.

[0019] The actuator 312 drives the polishing carrier 310 to move or rotate entirely or partially along a corresponding direction. In some embodiments, the actuator 312 may include a power supply, a motor, a belt, gears, and other related components, but the invention is not limited thereto. In addition, related components such as communication components, power components, shock absorption components, positioning components, or sensing components may also be included in the actuator 312, but the invention is not limited thereto.

[0020] Actuator 332 drives turntable 330 and / or polishing pad 320 on it to rotate in a corresponding direction. In some embodiments, the rotation direction of actuator 312 (e.g., fourth direction D4) and the rotation direction of actuator 332 (e.g., fifth direction D5) may be the same or different.

[0021] The polishing slurry supply unit 340 can provide polishing slurry 390 to the semiconductor wafer 110' in a single-sided polishing process to polish the semiconductor wafer 110'. In some embodiments, the polishing slurry 390 includes abrasives, dispersants, water, and lubricants.

[0022] In some embodiments, the thickness of the semiconductor wafer 110' is reduced by 1 micrometer to 2 micrometers in the first single-sided polishing process. In some embodiments, the first side 110a' of the semiconductor wafer 110' is formed into a semiconductor wafer 110'' containing the first side 110a'' after the first single-sided polishing process (see Figures 1C and 1D), and the surface roughness Ra of the first side 110a'' is less than 0.5 nanometers.

[0023] Finally, referring to step S4 in Figure 1D and Figure 2, flip the semiconductor wafer 110'' so that the unpolished second side 110b' faces the polishing pad 320, and perform a second single-sided polishing process on the second side 110b'.

[0024] In some embodiments, the thickness of the semiconductor wafer 110'' is reduced by 1 to 2 micrometers in the second single-sided polishing process. In some embodiments, the surface roughness Ra of the second side 110b' of the semiconductor wafer 110'' after the second single-sided polishing process is less than 0.5 nanometers. In some embodiments, the total thickness loss of the semiconductor wafer in the first and second single-sided polishing processes is approximately 2 to 5 micrometers.

[0025] In some embodiments, the total thickness variation (TTV) of the semiconductor wafer 110'' after the second single-sided polishing process is less than 2 micrometers, the curvature is +25 micrometers to -25 micrometers, and the warpage is +50 micrometers to -50 micrometers.

[0026] In some embodiments, the semiconductor wafer 110'', after undergoing a second single-sided polishing process, can be used as a seed crystal and as a raw material for manufacturing other semiconductor ingots. In some embodiments, the semiconductor wafer 110'', after undergoing a second single-sided polishing process, can be used as a raw material for manufacturing various wafers.

[0027] The following embodiments and comparative examples are provided to better describe the invention. In the embodiments and comparative examples, the grinding wheel used may have a shape in which abrasive grains are embedded in a surface, and the size of the abrasive grains is expressed by a mesh size. A mesh size is a measure of how many openings per inch on a screen. [Comparative Example] [1]

[0028] In Comparative Example 1, a semiconductor wafer was obtained after dicing a semiconductor ingot. Next, a double-sided polishing process was performed on the first and second sides of the semiconductor wafer. The double-sided polishing process consisted of 30 minutes of coarse polishing and 30 minutes of fine polishing. Coarse polishing was performed using a coarse grinding wheel with a mesh size of 300 to 800 grit, while fine polishing was performed using a fine grinding wheel with a mesh size of 1000 to 10000 grit. The thickness of the semiconductor wafer was reduced by 20 micrometers in the coarse polishing process and by 10 micrometers in the fine polishing process. After the polishing process, a single-sided polishing process was performed on the semiconductor wafer. The single-sided polishing process consisted of 120 minutes of coarse polishing and 60 minutes of fine polishing. Coarse polishing used Al₂O₃ particles (or SiO₂ particles) with a particle size of 0.1 to 0.3 micrometers as abrasives, while fine polishing was performed using chemical polishing without abrasives. The thickness of the semiconductor wafer is reduced by 1 to 2 micrometers in the coarse polishing process and by 0.1 to 0.5 micrometers in the fine polishing process. In Comparative Example 1, the time taken for the grinding process plus the polishing process is at least 240 minutes. [Comparative Example] [2]

[0029] In Comparative Example 2, semiconductor wafers were obtained after dicing semiconductor ingots. Next, a double-sided polishing process was performed on the first and second sides of the semiconductor wafers. The double-sided polishing process included polishing the semiconductor wafers for 10 minutes using a diamond polishing slurry containing diamond particles with a median particle size (D50) of 4 micrometers. During the polishing process, a load of 170 kg was applied to five eight-inch semiconductor wafers. The thickness of the semiconductor wafers was reduced by 30 micrometers during the polishing process. After the polishing process, a single-sided polishing process was performed on the semiconductor wafers. The single-sided polishing process consisted of 100 minutes of polishing. The thickness of the semiconductor wafers was reduced by 1 to 2 micrometers during polishing. In Comparative Example 2, the total time spent on the polishing and grinding processes was at least 110 minutes. [Comparative Example] [3]

[0030] In Comparative Example 3, semiconductor wafers were obtained after dicing semiconductor ingots. Next, a double-sided polishing process was performed on the first and second sides of the semiconductor wafers. The double-sided polishing process included polishing the semiconductor wafers for 15 minutes using a diamond polishing slurry containing diamond particles with a median particle size of 6 micrometers. During the polishing process, a load of 170 kg was applied to five 8-inch semiconductor wafers. The thickness of the semiconductor wafers was reduced by 50 micrometers during the polishing process. After the polishing process, a single-sided polishing process was performed on the semiconductor wafers. The single-sided polishing process consisted of 100 minutes of polishing. The thickness of the semiconductor wafers was reduced by 1 to 2 micrometers during polishing. In Comparative Example 3, the total time spent on the polishing and grinding processes was at least 115 minutes. [Example] [1]

[0031] In Example 1, semiconductor wafers are obtained after dicing semiconductor ingots. Next, a double-sided polishing process is performed on the first and second sides of the semiconductor wafers. The double-sided polishing process involves polishing the semiconductor wafers for 20 minutes using a diamond polishing slurry containing diamond particles with a median particle size of 3 micrometers. During the polishing process, a load of 170 kg is applied to five 8-inch semiconductor wafers. The thickness of the semiconductor wafers is reduced by 28 micrometers during the polishing process. After the polishing process, a single-sided polishing process is performed on the semiconductor wafers. The single-sided polishing process includes 100 minutes of polishing. The thickness of the semiconductor wafers is reduced by 1 to 2 micrometers during polishing. In Example 1, the total time spent on the polishing and grinding processes is at least 120 minutes. [Example] [2]

[0032] In Example 2, semiconductor wafers are obtained after dicing semiconductor ingots. Next, a double-sided polishing process is performed on the first and second sides of the semiconductor wafers. The double-sided polishing process involves polishing the semiconductor wafers for 30 minutes using a diamond polishing slurry containing diamond particles with a median particle size of 2 micrometers. During the polishing process, a load of 170 kg is applied to five 8-inch semiconductor wafers. The thickness of the semiconductor wafers is reduced by 26 micrometers during the polishing process. After the polishing process, a single-sided polishing process is performed on the semiconductor wafers. The single-sided polishing process consists of 100 minutes of polishing. The thickness of the semiconductor wafers is reduced by 1 to 2 micrometers during polishing. In Example 2, the total time spent on the polishing and grinding processes is at least 115 minutes. [Example] [3]

[0033] In Example 3, semiconductor wafers are obtained after dicing semiconductor ingots. Next, a double-sided polishing process is performed on the first and second sides of the semiconductor wafers. The double-sided polishing process involves polishing the semiconductor wafers for 30 minutes using a diamond polishing slurry containing diamond particles with a median particle size of 1 micrometer. During the polishing process, a load of 170 kg is applied to five 8-inch semiconductor wafers. The thickness of the semiconductor wafers is reduced by 24 micrometers during the polishing process. After the polishing process, a single-sided polishing process is performed on the semiconductor wafers. The single-sided polishing process includes 100 minutes of polishing. The thickness of the semiconductor wafers is reduced by 1 to 2 micrometers during polishing. In Example 3, the total time spent on the polishing and grinding processes is at least 115 minutes. [Example] [4]

[0034] In Example 4, semiconductor wafers are obtained after dicing semiconductor ingots. Next, a double-sided polishing process is performed on the first and second sides of the semiconductor wafers. The double-sided polishing process involves polishing the semiconductor wafers for 30 minutes using a diamond polishing slurry containing diamond particles with a median particle size of 0.1 micrometers. During the polishing process, a load of 170 kg is applied to five eight-inch semiconductor wafers. The thickness of the semiconductor wafers is reduced by 20 micrometers during the polishing process. After the polishing process, a single-sided polishing process is performed on the semiconductor wafers. The single-sided polishing process includes 100 minutes of polishing. The thickness of the semiconductor wafers is reduced by 1 to 2 micrometers during polishing. In Example 4, the total time spent on the polishing and grinding processes is at least 115 minutes.

[0035] Table 1 shows the geometric properties of the semiconductor wafers obtained by the processing of Comparative Examples 1 to 3 and Examples 1 to 4. Table 1 [Grinding Process] [Thickness Removal During Grinding Process] [Polishing process] [Polishing process removes thickness] [Processing Time] [Geometric Representation] [Comparative Example] [1] coarse grinding + fine grinding Coarse grinding 20μm Fine grinding to 10μm coarse polishing + fine polishing Coarse polishing 1~2μm Fine polishing to 0.1~0.5μm 240 min TTV: 2.5μm Curvature: 30μm Warpage rate: ±60μm Ra: 0.8nm [Comparative Example] [2] Diamond particles with a D50 of 4μm 30μm polishing 1~2μm 110 min TTV: 3μm Curvature: 35μm Warpage rate: ±60μm Ra: 0.8nm [Comparative Example] [3] Diamond particles with a D50 of 6μm 50μm polishing 1~2μm 115 min TTV: 5μm Curvature: 40μm Warpage rate: ±70μm Ra:1nm [Example] [1] Diamond particles with a D50 of 3μm 28μm polishing 1~2μm 120 min TTV:2μm Curvature: 25μm Warp rate: ±55μm Ra: 0.5nm [Example] [2] Diamond particles with D50 = 2μm 26μm polishing 1~2μm 115 min TTV:2μm Curvature: 20μm Warpage rate: ±50μm Ra: 0.4nm [Example] [3] Diamond particles with a D50 of 1μm 24μm polishing 1~2μm 115 min TTV:2μm Curvature: 25μm Warp rate: ±55μm Ra: 0.3nm [Example] [4] Diamond particles with D50 = 0.1 μm 20μm polishing 1~2μm 115 min TTV:2μm Curvature: 25μm Warp rate: ±55μm Ra: 0.1nm

[0036] Table 1 shows that using diamond polishing slurry containing diamond particles for the polishing process can significantly shorten the processing time. Furthermore, when the median particle size of the diamond etchants in the diamond polishing slurry is less than or equal to 3 micrometers, the geometric performance of the semiconductor wafer after the processing can be significantly improved.

[0037] 100: Semiconductor ingot 110,110',110'': Semiconductor wafer 110a,110a',110a'': First page 110b, 110b': Second side 210: First Millstone 220: Second Grinding Disc 230: First grinding pad 240: Second grinding pad 250: Sun Gear 260a: First carrier 260b: Second carrier 270: Internal gear 280: Adjustment Structure 310: Polished carrier disc 310a, 320a: Surface 312: Actuator 320: Polishing Pad 330: Turntable 332: Actuator 340: Polishing fluid supply unit 390: Polishing fluid D1: First Direction D2: Second Direction D3: Third direction D4: Fourth Direction D5: Fifth Direction S1, S2, S3, S4: Steps

Claims

1. A semiconductor processing method, comprising: Cut one or more semiconductor ingots to obtain a plurality of semiconductor wafers, wherein each of the plurality of semiconductor wafers includes a first side and a second side opposite to the first side; A double-sided polishing process is performed using a double-sided polishing apparatus to simultaneously polish the first and second sides of a plurality of semiconductor wafers using a diamond polishing slurry, wherein the diamond polishing slurry contains diamond particles with a median particle size of 0.1 micrometers to 3 micrometers. The double-sided polishing apparatus includes: a first polishing disc and a second polishing disc disposed opposite to each other; a first polishing pad and a second polishing pad respectively disposed on the first polishing disc and the second polishing disc; a sun gear and an internal gear located between the first polishing pad and the second polishing pad; a first carrier located between the first polishing pad and the second polishing pad and meshing with the internal gear and the sun gear, wherein the plurality of semiconductor wafers are respectively fixed in a plurality of through holes in the first carrier; a second carrier located between the first polishing pad and the second polishing pad and meshing with the internal gear and the sun gear; and a plurality of adjustment structures respectively fixed in a plurality of through holes in the second carrier, wherein during the double-sided polishing process, while the first carrier rotates with the plurality of semiconductor wafers, the second carrier rotates with the plurality of adjustment structures.

2. The processing method as claimed in claim 1, wherein a load is applied to the plurality of semiconductor wafers in the first carrier during the double-sided polishing process.

3. The processing method as claimed in claim 1, wherein the thickness of the plurality of semiconductor wafers is reduced by 20 micrometers to 28 micrometers in the double-sided polishing process.

4. The processing method as described in claim 1 further includes: After the double-sided grinding process, the first side is subjected to a first single-sided polishing process.

5. The processing method as claimed in claim 4, wherein the thickness of the plurality of semiconductor wafers is reduced by 1 micrometer to 2 micrometers in the first single-sided polishing process.

6. The processing method as described in claim 4 further includes: After the first single-sided polishing process, the second side is subjected to a second single-sided polishing process.

7. The processing method as described in claim 6, wherein the thickness of the plurality of semiconductor wafers is reduced by 1 micrometer to 2 micrometers in the second single-sided polishing process.

8. The processing method as described in claim 6, wherein the total thickness deviation of the plurality of semiconductor wafers after the second single-sided polishing process is less than 2 micrometers.

9. The processing method as claimed in claim 6, wherein the plurality of semiconductor wafers have a curvature of +25 micrometers to -25 micrometers and a warpage of +50 micrometers to -50 micrometers after the second single-sided polishing process.

10. The processing method as described in claim 4, wherein after the first single-sided polishing process, the surface roughness Ra of the first surface is less than 0.5 nanometers.

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