Power converter having voltage difference control mechanism

Abstract

This invention discloses a power converter with a voltage difference control mechanism. The power converter includes an upper bridge switch, a lower bridge switch, a lower bridge drive circuit, an upper bridge turn-on drive circuit, an upper bridge turn-off drive circuit, and an upper bridge voltage difference modulation circuit. The upper bridge turn-on drive circuit switches the upper bridge switch from a closed state to an open state. The upper bridge voltage difference modulation circuit outputs a floating voltage to the first power input terminal of the upper bridge turn-off drive circuit based on the output voltage of the output node. Then, the upper bridge turn-off drive circuit uses the floating voltage to switch the upper bridge switch from an open state to a closed state, so that the voltage difference between the floating voltage and the output voltage falls within a target voltage range.

Description

Technical Field

[0001] This invention relates to power converters, and more particularly to a power converter with a voltage difference control mechanism. Prior Technology

[0002] For electronic devices, power converters are indispensable devices used to regulate power and supply the regulated power to the electronic devices. The upper and lower bridge switches of the power converter need to switch according to data such as voltage or current of the circuit components of the power converter in order for the power converter to provide power to the load. However, the circuit components configured to control the upper bridge switch in traditional power converters not only occupy a large area, but also cannot accurately control the operating state of the upper bridge switch. Summary of the Invention

[0003] To address the shortcomings of existing technologies, this invention provides a power converter with a voltage difference control mechanism. The power converter of this invention includes an upper bridge switch, a lower bridge switch, a lower bridge drive circuit, an upper bridge open drive circuit, an upper bridge close drive circuit, and an upper bridge voltage difference modulation circuit. A first terminal of the upper bridge switch is coupled to an input voltage. A first terminal of the lower bridge switch is connected to a second terminal of the upper bridge switch. The second terminal of the lower bridge switch is grounded. The lower bridge drive circuit is connected to a control terminal of the lower bridge switch. The lower bridge drive circuit is configured to drive the lower bridge switch. The upper bridge open drive circuit is configured to switch the upper bridge switch from a closed state to an open state. A signal output terminal of the upper bridge close drive circuit is connected to the control terminal of the upper bridge switch. The upper bridge voltage difference modulation circuit is connected to a first power input terminal of the upper bridge close drive circuit and connected to an output node between the first terminal of the lower bridge switch and the second terminal of the upper bridge switch. The upper bridge voltage difference modulation circuit is configured to output a floating voltage to the first power input terminal of the upper bridge shutdown drive circuit based on the output voltage of the output node. The upper bridge shutdown drive circuit is configured to use the floating voltage to switch the upper bridge switch from the on state to the off state, so that the voltage difference between the floating voltage and the output voltage falls within a target voltage range.

[0004] As described above, this invention provides a power converter with a voltage difference control mechanism. Compared to conventional power converters, the power converter of this invention further includes an upper bridge voltage difference modulation circuit, configured to modulate the floating voltage at the power input terminal of the upper bridge shutdown drive circuit according to the output voltage of the power converter, thereby precisely controlling the state of the upper bridge switch. Therefore, compared to conventional power converters, the power converter of this invention only requires a smaller amount or omits the large-area potential adjustment circuit, thus achieving more precise control of the upper bridge switch's operating state while reducing the size and power consumption of the power converter.

[0005] To further understand the features and technical content of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are for reference and illustration only and are not intended to limit the present invention. Simple Explanation of the Diagram

[0006] Figure 1 is a circuit diagram of a power converter with a voltage difference control mechanism according to the first embodiment of the present invention.

[0007] Figure 2 is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the second embodiment of the present invention.

[0008] Figure 3 is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the third embodiment of the present invention.

[0009] Figure 4 is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the fourth embodiment of the present invention.

[0010] Figure 5 is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the fifth embodiment of the present invention.

[0011] Figure 6 is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the sixth embodiment of the present invention.

[0012] Figure 7 is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the seventh embodiment of the present invention.

[0013] Figure 8 is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the eighth embodiment of the present invention.

[0014] Figure 9 is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the ninth embodiment of the present invention.

[0015] Figure 10 is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the tenth embodiment of the present invention.

[0016] Figure 11 is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the eleventh embodiment of the present invention.

[0017] Figure 12 is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the twelfth embodiment of the present invention.

[0018] Figure 13 is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the thirteenth embodiment of the present invention.

[0019] Figure 14 is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the fourteenth embodiment of the present invention.

[0020] Figure 15 is a circuit diagram of a power converter with a voltage difference control mechanism according to the fifteenth embodiment of the present invention. Implementation

[0021] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can understand the advantages and effects of the present invention from the content disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the concept of the present invention. Furthermore, the accompanying drawings of the present invention are for simple illustrative purposes only and are not depictions of actual dimensions, as stated in advance. The following embodiments will further describe the relevant technical content of the present invention in detail, but the disclosed content is not intended to limit the scope of protection of the present invention. In addition, the term "or" used herein should be interpreted to include, depending on the actual situation, any combination of any one or more of the associated listed items.

[0022] Please refer to Figure 1, which is a circuit diagram of a power converter with a voltage difference control mechanism according to the first embodiment of the present invention.

[0023] The power converter of the present invention includes an upper bridge switch HS, a lower bridge switch LS, an upper bridge open drive circuit HON, an upper bridge close drive circuit HOFF, a lower bridge drive circuit LDR, and an upper bridge voltage difference modulation circuit HVM.

[0024] The first terminal of the upper bridge switch HS is coupled to an input voltage VM. The second terminal of the upper bridge switch HS is connected to the first terminal of the lower bridge switch LS. The second terminal of the lower bridge switch LS is grounded. The lower bridge drive circuit LDR is connected to the control terminal of the lower bridge switch LS.

[0025] A node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS serves as an output node. This output node serves as an output terminal of the power converter of the present invention, used to supply an output voltage VOUT.

[0026] The upper bridge open drive circuit HON is the circuit that turns the upper bridge switch HS on / off. That is, the upper bridge open drive circuit HON is configured to switch the upper bridge switch HS from a closed state to an open state.

[0027] The upper bridge shutdown drive circuit HOFF is the circuit that shuts down the upper bridge switch HS. That is, the upper bridge shutdown drive circuit HOFF is configured to switch the upper bridge switch HS from an on state to an off state.

[0028] The lower bridge drive circuit LDR is configured to drive the lower bridge switch LS.

[0029] It is worth noting that the power converter of the present invention includes an upper bridge voltage differential modulation circuit HVM. An input terminal of the upper bridge voltage differential modulation circuit HVM is connected to an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS, to receive an output voltage VOUT from this output node. An output terminal of the upper bridge voltage differential modulation circuit HVM is connected to the first power input terminal (e.g., the positive power input terminal) of the upper bridge shutdown drive circuit HOFF. A signal output terminal of the upper bridge shutdown drive circuit HOFF is connected to the control terminal of the upper bridge switch HS.

[0030] The upper bridge voltage difference modulation circuit HVM uses the voltage value of an output voltage VOUT obtained from an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS to set or modulate a voltage as the voltage value of a floating voltage VFLT, and outputs the floating voltage VFLT to the first power input terminal (e.g., the positive power input terminal) of the upper bridge shutdown drive circuit HOFF.

[0031] If necessary, the second power input terminal (e.g., the negative power input terminal) of the upper bridge shut-off drive circuit HOFF can be connected to an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS, so as to receive an output voltage VOUT from this output node.

[0032] The upper bridge shutdown drive circuit HOFF can use a floating voltage VFLT received at the first power input terminal of the upper bridge shutdown drive circuit HOFF (e.g., the positive power input terminal) and (an output voltage VOUT received at the second power input terminal of the upper bridge shutdown drive circuit HOFF (e.g., the negative power input terminal)) to switch the upper bridge switch HS from an on state to an off state.

[0033] Since the voltage at the first power input terminal (e.g., the positive power input terminal) of the upper bridge shutdown drive circuit HOFF changes with the output voltage VOUT of the aforementioned output node, the voltage at the first power input terminal (e.g., the positive power input terminal) of the upper bridge shutdown drive circuit HOFF is described in this paper as a floating voltage VFLT.

[0034] It is worth noting that the upper bridge voltage difference modulation circuit HVM can precisely control the voltage difference between a floating voltage VFLT received at the first power input terminal (e.g., the positive power input terminal) of the upper bridge shutdown drive circuit HOFF and the output voltage VOUT between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS, ensuring that the difference falls within a target voltage range, including a small low voltage range. Furthermore, the upper bridge voltage difference modulation circuit HVM can maintain the voltage difference between the floating voltage VFLT and the output voltage VOUT at a value equal to a target voltage difference, or at a value less than a voltage threshold.

[0035] In contrast, the voltage received at the positive power input terminal of the upper bridge shutdown drive circuit of a conventional power converter is a power supply voltage with a constant value. Conventional power converters cannot accurately control the voltage difference between the voltage received at the first power input terminal (e.g., the positive power input terminal) of the upper bridge shutdown drive circuit and the output voltage of the conventional power converter within a target voltage range, particularly within a small, low voltage range.

[0036] In other words, compared to conventional power converters, the power converter of the present invention further includes an upper bridge voltage differential modulation circuit HVM, configured to modulate and control the voltage received at the first power input terminal of the upper bridge shutdown drive circuit HOFF according to the output voltage VOUT of the power converter of the present invention, thereby modulating and controlling the state of the upper bridge switch HS driven by the upper bridge shutdown drive circuit HOFF. In this way, the power converter of the present invention can accurately supply a more appropriate amount of power to the load connected to the output terminal of the power converter of the present invention.

[0037] Please refer to Figure 2, which is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the second embodiment of the present invention.

[0038] The upper bridge voltage differential modulation circuit HVM shown in Figure 1 can be further divided into a floating voltage supply transistor TFL and a floating bias control generation circuit FLC, as shown in Figure 2. The floating voltage supply transistor TFL can be any type of transistor.

[0039] A voltage input terminal of the floating bias control generation circuit FLC is connected to an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS.

[0040] The first terminal (e.g., drain) of the floating voltage supply transistor TFL is coupled to a charging voltage VCP. The second terminal (e.g., source) of the floating voltage supply transistor TFL is connected to the first power input terminal (e.g., positive power input terminal) of the upper bridge shutdown drive circuit HOFF. The control terminal (e.g., gate) of the floating voltage supply transistor TFL is connected to a signal output terminal of the floating bias control generation circuit FLC.

[0041] The floating bias control generation circuit FLC can be coupled to a charging voltage VCP, which is used as the power required for operation.

[0042] It is worth noting that the floating bias control generation circuit FLC outputs a floating control voltage signal to the control terminal of the floating voltage supply transistor TFL based on the output voltage VOUT of an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS, so as to control the operating state of the floating voltage supply transistor TFL, and thereby control the voltage value of the floating voltage VFLT supplied by the second terminal of the floating voltage supply transistor TFL to the first power input terminal (e.g., the positive power input terminal) of the upper bridge shutdown drive circuit HOFF.

[0043] Please refer to Figure 3, which is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the third embodiment of the present invention.

[0044] The upper bridge voltage differential modulation circuit HVM shown in Figure 1 can, as shown in Figure 3, include a floating bias control generation circuit FLC and a floating voltage supply transistor TFL. As shown in Figure 3, the floating bias control generation circuit FLC can include a current source CUS and a control-side diode circuit. The control-side diode circuit can, as shown in Figure 3, include one diode as a control-side diode D11, or in practice, it can include multiple diodes. For example, the control-side diode D11 can be a Zener diode as shown in Figure 3, or in practice, it can be replaced with other types of diodes.

[0045] The control-side diode circuit is connected between the current source CUS and the output node, where the output node is a node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS.

[0046] The input terminal of the current source CUS is coupled to a charging voltage VCP. The first terminal of the control-side diode D11, for example, the anode, is connected to an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS. The second terminal of the control-side diode D11, for example, the cathode, is connected to the output terminal of the current source CUS and the control terminal of a floating voltage supply transistor TFL.

[0047] Please refer to Figure 4, which is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the fourth embodiment of the present invention.

[0048] As shown in Figure 1, the upper bridge voltage differential modulation circuit HVM can, as shown in Figure 4, include a floating voltage supply transistor TFL and a floating bias control generation circuit FLC, and can also include an output-side diode circuit. This output-side diode circuit includes one diode as an output-side diode D21 or, in practice, includes multiple diodes.

[0049] As shown in Figure 4, the floating bias control generation circuit FLC includes not only the current source CUS and the control-side diode D11, but also a voltage regulator capacitor CF1.

[0050] As shown in Figure 4, the first terminal of the voltage regulator capacitor CF1 is connected to the output terminal of the current source CUS and the control terminal of the floating voltage supply transistor TFL. The second terminal of the voltage regulator capacitor CF1, as shown in Figure 4, is connected to an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS, as shown in Figure 1.

[0051] A current path is formed on the line connecting the output-side diode D21, the second terminal of the floating voltage supply transistor TFL, and the upper bridge shutdown drive circuit HOFF, allowing current to flow along this path. Through the output-side diode D21, a floating voltage VFLT at the first power input terminal (e.g., the positive power input terminal) of the upper bridge shutdown drive circuit HOFF is clamped to a target voltage value, particularly when the output voltage VOUT at the output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS decreases.

[0052] The voltage regulator capacitor CF1 is configured to stabilize the voltage at the control terminal of the floating voltage supply transistor TFL, especially when the output voltage VOUT of an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS changes transiently.

[0053] Please refer to Figure 5, which is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the fifth embodiment of the present invention.

[0054] The fifth embodiment of the present invention is the same as the fourth embodiment, and will not be repeated below. The difference between the fifth embodiment and the fourth embodiment is that, as shown in FIG4, the power converter of the fourth embodiment includes an output-side diode D21, while as shown in FIG5, the power converter of the fifth embodiment includes an output-side transistor circuit, which includes a transistor as an output-side transistor TFM.

[0055] The first terminal (e.g., drain) of the output-side transistor TFM is connected to the second power supply input (e.g., negative power supply input) of the upper bridge shutdown drive circuit HOFF. The second terminal (e.g., source) of the output-side transistor TFM is connected to the second terminal of a floating voltage supply transistor TFL. The control terminal (e.g., gate) of the output-side transistor TFM is coupled to a control voltage VB.

[0056] A current path is formed on the line connecting the second terminal of the output transistor TFM, the floating voltage supply transistor TFL, and the upper bridge shutdown drive circuit HOFF. Current flows along this current path, thereby modulating (e.g., reducing) a floating voltage VFLT at the first power input terminal (e.g., the positive power input terminal) of the upper bridge shutdown drive circuit HOFF. Thus, through the output transistor TFM, the floating voltage VFLT at the first power input terminal (e.g., the positive power input terminal) of the upper bridge shutdown drive circuit HOFF is controlled to a target voltage value.

[0057] Please refer to Figure 6, which is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the sixth embodiment of the present invention.

[0058] The sixth embodiment of the present invention is the same as the fifth embodiment, and will not be repeated below. The difference between the sixth embodiment and the fifth embodiment lies in the configuration of the control terminal of the output-side transistor TFM, which is described in detail below.

[0059] As shown in Figure 5, the control terminal of an output-side transistor TFM is coupled to a control voltage VB. As shown in Figure 6, the control terminal of an output-side transistor TFM and the control terminal of a floating voltage supply transistor TFL are both connected to the cathode of the control-side diode D11 and the first terminal of the voltage regulator capacitor CF1.

[0060] Please refer to Figure 7, which is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the seventh embodiment of the present invention.

[0061] As shown in Figure 3, in the third embodiment, the control-side diode circuit of the bias control generation circuit FLC includes only one transistor as a control-side diode D11. In contrast, as shown in Figure 7, in the seventh embodiment, the control-side diode circuit of the bias control generation circuit FLC includes multiple transistors as multiple control-side diodes D12.

[0062] As shown in Figure 7, multiple control-side diodes D12 are arranged in series and connected sequentially. The second terminal, for example, the cathode, of the last of the multiple control-side diodes D12 shown in Figure 7 is connected to an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS shown in Figure 1 to receive an output voltage VOUT from this output node.

[0063] As shown in Figure 7, the first end (e.g., anode) of each of the multiple control-side diodes D12, except for the first one, is connected to the second end (e.g., cathode) of the previous one. The first end (e.g., anode) of the first one of the multiple control-side diodes D12 is connected to a control node N1. This control node N1 is connected to the output of the current source CUS and the control terminal of a floating voltage supply transistor TFL.

[0064] Please refer to Figure 8, which is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the eighth embodiment of the present invention.

[0065] As shown in Figure 1, the upper bridge voltage differential modulation circuit HVM can include a floating bias control generation circuit FLC and a floating voltage supply transistor TFL, as shown in Figure 8.

[0066] As shown in Figure 8, the upper bridge voltage differential modulation circuit HVM includes not only the floating bias control generation circuit FLC, but also an output-side diode circuit. This output-side diode circuit can include multiple output-side diodes D22 arranged in series and connected sequentially, as shown in Figure 8.

[0067] In a plurality of control-side diodes D12, the first terminal (e.g., anode) of the first diode is connected to the second terminal (e.g., positive power input) of a floating voltage supply transistor TFL and the first power input terminal (e.g., positive power input) of the upper bridge shutdown drive circuit HOFF. The first terminal (e.g., anode) of each of the plurality of control-side diodes D12 other than the first diode is connected to the second terminal (e.g., cathode) of the previous diode. The second terminal (e.g., cathode) of the last diode in the plurality of control-side diodes D12 is connected to the second power input terminal (e.g., negative power input) of the upper bridge shutdown drive circuit HOFF.

[0068] The floating bias control generation circuit FLC, as shown in Figure 8, includes a current source CUS, a control-side diode circuit (containing multiple control-side diodes D12), and a voltage regulator capacitor CF1.

[0069] As shown in Figure 8, the first terminal of the voltage regulator capacitor CF1 is connected to a control node N1. The second terminal of the voltage regulator capacitor CF1, as shown in Figure 8, is connected to an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS, as shown in Figure 1, to receive an output voltage VOUT from this output node.

[0070] The configuration of the multiple control-side diodes D12 shown in Figure 8 is the same as that shown in Figure 7, and will not be described again below.

[0071] Please refer to Figure 9, which is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the ninth embodiment of the present invention.

[0072] The upper bridge voltage differential modulation circuit HVM shown in Figure 1 can include a floating bias control generation circuit FLC and a floating voltage supply transistor TFL, as shown in Figure 9. As shown in Figure 9, the floating bias control generation circuit FLC can include a current source CUS and a control-side transistor circuit, wherein the control-side transistor circuit can include multiple transistors as multiple control-side transistors TS11.

[0073] The input of the current source CUS is coupled to a charging voltage VCP. The control terminal (e.g., gate) and first terminal (e.g., drain) of the first of a plurality of control-side transistors TS11 are connected to the output of the current source CUS. The plurality of control-side transistors TS11 are arranged in a tandem manner. The control terminal and first terminal of each of the other plurality of control-side transistors TS11 are connected to the second terminal of the previous control-side transistor TS11. The second terminal (e.g., source) of the last of the plurality of control-side transistors TS11 is connected to an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS, as shown in Figure 1, to receive an output voltage VOUT from this output node.

[0074] Please refer to Figure 10, which is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the tenth embodiment of the present invention.

[0075] As shown in Figure 1, the upper bridge voltage differential modulation circuit HVM can be shown in Figure 10. In addition to a floating bias control generation circuit FLC and a floating voltage supply transistor TFL, it also includes an output-side transistor circuit. This output-side transistor circuit includes multiple transistors as multiple output-side transistors TS21, or in practice, it only includes one output-side transistor TS21.

[0076] As shown in Figure 10, multiple output-side transistors TS21 are arranged in a series. The first terminal (e.g., drain) and control terminal (e.g., gate) of the first of the multiple output-side transistors TS21 are connected to the second terminal (e.g., source) of a floating voltage supply transistor TFL. The first terminal (e.g., drain) and control terminal (e.g., gate) of each of the other output-side transistors TS21 are connected to the second terminal (e.g., source) of the previous transistor. The second terminal (e.g., source) of the last of the multiple output-side transistors TS21 is connected to the second power input terminal (e.g., negative power input terminal) of the upper bridge shutdown drive circuit HOFF.

[0077] A current path is formed on the line connecting the second terminal of the multiple output-side transistors TS21 and the floating voltage supply transistor TFL to the upper bridge shutdown drive circuit HOFF, so that the current flows along this current path, thereby modulating (e.g., reducing) and controlling a floating voltage VFLT at the first power input terminal (e.g., the positive power input terminal) of the upper bridge shutdown drive circuit HOFF to a target voltage value.

[0078] The floating bias control generation circuit FLC, as shown in Figure 9, includes a current source CUS, a control-side transistor circuit, and a voltage regulator capacitor CF1. The control-side transistor circuit may include multiple transistors as multiple control-side transistors TS11. The configuration of the multiple control-side transistors TS11 shown in Figure 10 is the same as that shown in Figure 9, and therefore will not be described in detail here.

[0079] As shown in Figure 10, the first terminal of the voltage regulator capacitor CF1 is connected to a control node N1. The second terminal of the voltage regulator capacitor CF1, as shown in Figure 10, is connected to an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS, as shown in Figure 1, to receive an output voltage VOUT from this output node.

[0080] Please refer to Figure 11, which is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the eleventh embodiment of the present invention.

[0081] As shown in Figure 1, the upper bridge voltage differential modulation circuit HVM can include a floating bias control generation circuit FLC and a floating voltage supply transistor TFL, as shown in Figure 11. As shown in Figure 11, the floating bias control generation circuit FLC can include a current source CUS and a control-side transistor circuit, wherein the control-side transistor circuit can include multiple transistors as multiple control-side transistors TS12.

[0082] Multiple control-side transistors TS12 are arranged in a series. As shown in Figure 11, the first terminal (e.g., drain) of the last of the multiple control-side transistors TS12 is connected to an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS, as shown in Figure 1, to receive an output voltage VOUT from this output node. The second terminal (e.g., source) and control terminal (e.g., gate) of the first of the multiple control-side transistors TS12 are connected to the output terminal of the current source CUS and the control terminal of a floating voltage supply transistor TFL. The second terminal (e.g., source) and control terminal (e.g., gate) of each of the other multiple control-side transistors TS12 (excluding the first one) are connected to the first terminal (e.g., drain) of the previous control-side transistor TS12.

[0083] Please refer to Figure 12, which is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the twelfth embodiment of the present invention.

[0084] As shown in Figure 1, the upper bridge voltage differential modulation circuit HVM can be illustrated in Figure 12. In addition to a floating bias control generation circuit FLC and a floating voltage supply transistor TFL, it also includes multiple output-side transistors TS22.

[0085] Multiple output-side transistors TS22 are arranged in a series. As shown in Figure 12, the first terminal (e.g., drain) of the last of the multiple output-side transistors TS22 is connected to the second power input terminal (e.g., negative power input terminal) of the upper bridge shutdown drive circuit HOFF. The second terminal (e.g., source) and control terminal (e.g., gate) of the first of the multiple output-side transistors TS22 are connected to the second terminal of transistor TFL and the first power input terminal (e.g., positive power input terminal) of the upper bridge shutdown drive circuit HOFF. The second terminal (e.g., source) and control terminal (e.g., gate) of each of the other output-side transistors TS22 (excluding the first one) are connected to the first terminal (e.g., drain) of the previous output-side transistor TS22.

[0086] As shown in Figure 12, the floating bias control generation circuit FLC includes a current source CUS and multiple control-side transistors TS12, as well as a voltage regulator capacitor CF1.

[0087] As shown in Figure 12, the first terminal of the voltage regulator capacitor CF1 is connected to a control node N1. The second terminal of the voltage regulator capacitor CF1, as shown in Figure 12, is connected to an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS, as shown in Figure 1.

[0088] Please refer to Figure 13, which is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the thirteenth embodiment of the present invention.

[0089] The upper bridge voltage differential modulation circuit HVM shown in Figure 1 can include a floating bias control generation circuit FLC and a floating voltage supply transistor TFL, as shown in Figure 13. As shown in Figure 13, the floating bias control generation circuit FLC includes an operational amplifier AMP and a voltage divider circuit DIV. The voltage divider circuit DIV can include a first voltage divider resistor R1 and a second voltage divider resistor R2.

[0090] As shown in Figure 13, the first terminal of the first voltage divider resistor R1 is connected to the second terminal of a floating voltage supply transistor TFL. The second terminal of the first voltage divider resistor R1 is connected to the first terminal of the second voltage divider resistor R2. As shown in Figure 13, the second terminal of the second voltage divider resistor R2 is connected to an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS, as shown in Figure 1. Thus, the voltage at the second terminal of the second voltage divider resistor R2 is equal to the output voltage VOUT of this output node.

[0091] The first input terminal of the operational amplifier AMP, such as the non-inverting input terminal, is coupled to a reference voltage VREF. The second input terminal of the operational amplifier AMP, such as the inverting input terminal, is connected to a feedback node between the second terminal of the first voltage divider resistor R1 and the first terminal of the second voltage divider resistor R2, and receives a feedback voltage from this feedback node. The output terminal of the operational amplifier AMP is connected to the control terminal of a floating voltage supply transistor TFL.

[0092] The operational amplifier AMP multiplies a preset gain by the difference between a feedback voltage at a feedback node between the second end of the first voltage divider resistor R1 and the first end of the second voltage divider resistor R2 and a reference voltage VREF to output an operational amplification signal to the control terminal of a floating voltage supply transistor TFL. In this way, it controls the second terminal of the floating voltage supply transistor TFL to output a floating voltage VFLT to the first power input terminal (e.g., the positive power input terminal) of the upper bridge shutdown drive circuit HOFF.

[0093] Please refer to Figure 14, which is a circuit diagram of the upper bridge voltage difference modulation circuit of the power converter with voltage difference control mechanism according to the fourteenth embodiment of the present invention.

[0094] As shown in Figure 1, the upper bridge voltage differential modulation circuit HVM can be configured as shown in Figure 14. Besides including a floating bias control generation circuit FLC and a floating voltage supply transistor TFL, it also includes an output-side diode circuit. This output-side diode circuit includes one diode as an output-side diode D21, or, in practice, as in other embodiments, it includes multiple diodes or one or more transistors. As shown in Figure 14, the floating bias control generation circuit FLC includes an operational amplifier AMP and a voltage divider circuit DIV, and also includes a voltage regulator capacitor CF1.

[0095] As shown in Figure 14, the first terminal of the voltage regulator capacitor CF1 is connected to the output terminal of the operational amplifier AMP. The second terminal of the voltage regulator capacitor CF1, as shown in Figure 14, is connected to an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS, as shown in Figure 1.

[0096] The operational amplifier AMP and voltage divider circuit DIV shown in Figures 14 and 13 have the same configuration, and the output diode D21 shown in Figures 14 and 4 has the same configuration. The same content will not be repeated in this article.

[0097] Please refer to Figure 15, which is a circuit diagram of a power converter with a voltage difference control mechanism according to the fifteenth embodiment of the present invention.

[0098] The fifteenth embodiment of the present invention and the first embodiment are not described in detail herein.

[0099] As shown in Figure 15, in the fifteenth embodiment, the power converter of the present invention, in addition to including the upper bridge switch HS, the lower bridge switch LS, the upper bridge turn-off drive circuit HOFF, the lower bridge drive circuit LDR, and the upper bridge voltage difference modulation circuit HVM, further includes a control circuit CTR, a charging circuit PUM, an upper bridge control potential adjustment circuit HVSH, a charging control potential adjustment circuit CVSH, an upper bridge turn-on drive circuit HON, a first transistor T1, and multiple second transistors T21 and T22, wherein one or more of them may be omitted in practice.

[0100] The control circuit CTR outputs an upper bridge control signal and a charging control signal based on an upper bridge control enable signal HSEN received from an external circuit, and outputs a lower bridge control signal based on a lower bridge control enable signal LSEN received from an external circuit.

[0101] The upper bridge control potential adjustment circuit HVSH is connected between the control circuit CTR and the upper bridge shutdown drive circuit HOFF. Based on the floating voltage VFLT, the output voltage VOUT (and a power supply voltage VDD), the upper bridge control potential adjustment circuit HVSH maintains or modulates an upper bridge control signal output by the control circuit CTR, and outputs the maintained or modulated upper bridge control signal to a signal input terminal of the upper bridge shutdown drive circuit HOFF. For example, the upper bridge control potential adjustment circuit HVSH includes a potential conversion circuit as an upper bridge control potential conversion circuit to convert the potential of the upper bridge control signal.

[0102] The upper bridge shutdown drive circuit HOFF may contain one or more inverters (not shown). If the upper bridge shutdown drive circuit HOFF contains only one inverter (not shown), one input of this inverter is connected to the output of the upper bridge voltage differential modulation circuit HVM to receive an upper bridge drive signal from the upper bridge voltage differential modulation circuit HVM. One output of this inverter is connected to the control terminals of each of the second transistors T21 and T22. A first power supply input (e.g., a positive power supply input) of this inverter serves as the first power supply input (e.g., a positive power supply input) of the upper bridge voltage differential modulation circuit.

[0103] If the upper bridge shutdown drive circuit HOFF contains multiple inverters (not shown in the figure), these inverters are arranged sequentially. One signal input terminal of one of these inverters is connected to the output terminal of the upper bridge voltage differential modulation circuit HVM, and the output terminal of another inverter is connected to the control terminals of the second transistors T21 and T22. One signal input terminal of each of the other inverters is connected to the output terminal of the inverter preceding it. A first power supply input terminal (e.g., a positive power supply input terminal) of each inverter serves as the first power supply input terminal (e.g., a positive power supply input terminal) of the upper bridge voltage differential modulation circuit.

[0104] It is worth noting that a first power input terminal (e.g., a positive power input terminal) of one or more inverters (not shown) included in the upper bridge shutdown drive circuit HOFF is connected to the second terminal of a floating voltage supply transistor TFL included in the upper bridge voltage differential modulation circuit HVM so as to receive a floating voltage VFLT from the second terminal of the floating voltage supply transistor TFL.

[0105] The charging control potential adjustment circuit CVSH is connected between the upper bridge turn-on drive circuit HON and the control circuit CTR. When the charging control potential adjustment circuit CVSH receives an upper bridge control signal from the control circuit CTR, the charging control potential adjustment circuit CVSH maintains or modulates a charging control signal output by the control circuit CTR according to a charging voltage VCP, an input voltage VM (and a power supply voltage VDD), and outputs the maintained or modulated charging control signal to the upper bridge turn-on drive circuit HON. For example, the upper bridge control potential adjustment circuit HVSH includes a potential conversion circuit as an upper bridge control potential conversion circuit to convert the potential of an upper bridge control signal.

[0106] One signal output terminal of the upper bridge open drive circuit HON is connected to the control terminal of the first transistor T1. The first power input terminal (e.g., positive power input terminal) of the upper bridge open drive circuit HON and the first terminal of the first transistor T1 can be connected to the charging circuit PUM to receive a charging voltage VCP from the charging circuit PUM. The second power input terminal (e.g., negative power input terminal) of the upper bridge open drive circuit HON is coupled to an input voltage VM.

[0107] The upper bridge open drive circuit HON outputs a charging drive signal to the control terminal of the first transistor T1 based on a charging control signal received from the charging control potential adjustment circuit CVSH, so as to drive the first transistor T1.

[0108] The charging circuit PUM may include a first charging capacitor C1, a second charging capacitor C2, a first charging switch element SW1, a second charging switch element SW2, a third charging switch element SW3, and a fourth charging switch element SW4.

[0109] The upper bridge open drive circuit HON can connect the first terminal of the first charging switch element SW1 and the first terminal of the second charging capacitor C2. The second terminal of the second charging capacitor C2 is grounded. The second terminal of the first charging switch element SW1 is connected to the first terminal of the first charging capacitor C1. The second terminal of the first charging capacitor C1 is connected to the first terminal of the second charging switch element SW2. The second terminal of the second charging switch element SW2 is connected to an adjustable voltage VG. This adjustable voltage VG can be equal to an input voltage VM minus a preset voltage (e.g., 5V), but the invention is not limited thereto.

[0110] The first terminal of the third charging switch element SW3 is connected to the second terminal of the first charging switch element SW1 and the first terminal of the first charging capacitor C1. The first terminal of the fourth charging switch element SW4 is connected to the second terminal of the first charging capacitor C1 and the first terminal of the second charging switch element SW2. The second terminals of the third charging switch element SW3 and the second terminals of the fourth charging switch element SW4 are coupled to an input voltage VM.

[0111] The charging circuit PUM is configured to provide a charging voltage VCP to the first power input terminal (e.g., positive power input terminal) of the connected upper bridge turn-on drive circuit HON, the first terminal of the first transistor T1, the charging control potential adjustment circuit CVSH, the first terminal of the floating voltage supply transistor TFL, and the first terminal of the floating bias control generation circuit FLC, so as to pull up the voltage of the control terminal of the upper bridge switch HS.

[0112] When the upper bridge switch HS is to be switched from the closed state to the open state, the upper bridge open drive circuit HON turns on the first transistor T1, so that a charging voltage is provided to the first terminal of the first transistor T1 through the charging circuit PUM, thereby pulling up the voltage at the control terminal of the upper bridge switch HS to be equal to or close to this charging voltage VCP. At the same time, the upper bridge close drive circuit HOFF turns off the second transistors T21 and T22. For example, this charging voltage VCP is equal to an input voltage VM plus a preset voltage (e.g., 5V), but the present invention is not limited thereto.

[0113] It is worth noting that when switching the upper bridge switch HS from the on state to the off state, the upper bridge open drive circuit HON shuts down the first transistor T1 to stop the charging circuit PUM from supplying power to the control terminal of the upper bridge switch HS. Simultaneously, the upper bridge voltage difference modulation circuit HVM receives an output voltage VOUT from an output node between the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS, as shown in Figure 1, and modulates a floating voltage VFLT at the first power input terminal (e.g., the positive power input terminal) of the upper bridge voltage difference modulation circuit HVM. The upper bridge close drive circuit HOFF uses the floating voltage VFLT provided by the upper bridge voltage difference modulation circuit HVM to control the operation of multiple second transistors T21 and T22.

[0114] For example, the upper bridge shutdown drive circuit HOFF can turn on all or at least one of the multiple second transistors T21 and T22 to pull the voltage at the control terminal of the upper bridge switch HS to an output node equal to the voltage at the second terminal of the upper bridge switch HS and the first terminal of the lower bridge switch LS, as shown in Figure 1, to receive the output voltage VOUT of this output node. Thus, the voltage difference between the control terminal (e.g., the gate) and the second terminal (e.g., the source) of the upper bridge switch HS is 0V, denoted as VGS=0, where VGS represents this voltage difference.

[0115] In summary, this invention provides a power converter with a voltage difference control mechanism. Compared to conventional power converters, the power converter of this invention further includes an upper bridge voltage difference modulation circuit, configured to modulate the floating voltage at the power input terminal of the upper bridge shutdown drive circuit according to the output voltage of the power converter, thereby precisely controlling the state of the upper bridge switch. Therefore, compared to conventional power converters, the power converter of this invention only requires a smaller amount or omits the large-area potential adjustment circuit, thus achieving more precise control of the upper bridge switch's operating state while reducing the size and power consumption of the power converter.

[0116] The content disclosed above is only a preferred and feasible embodiment of the present invention, and is not intended to limit the scope of the patent application of the present invention. Therefore, all equivalent technical changes made using the contents of the present invention specification and drawings are included in the scope of the patent application of the present invention.

[0117] HON: Upper bridge opens drive circuit HVM: Upper Bridge Voltage Difference Modulation Circuit HOFF: Upper bridge shuts off drive circuit VFLT: Floating Voltage LDR: Lower Bridge Driver Circuit VM: Input Voltage HS: Upper Bridge Switch LS: Lower bridge switch VOUT: Output voltage VCP: Charging voltage FLC: Floating bias control circuit TFL: Floating Voltage Supply Transistor CUS: Current Source D11, D12: Control-side diodes CF1: Voltage stabilizing capacitor D21, D22: Output-side diodes TFM: Output-side transistor VB: Control Voltage TS11, TS12: Control-side transistors TS21, TS22: Output-side transistors N1: Control Node AMP: Operational Amplifier VREF: Reference Voltage DIV: Voltage divider circuit R1: First voltage divider resistor R2: Second voltage divider resistor CTR: Control Circuit HSEN: Overhead bridge control enable signal LSEN: Downbridge control enable signal HVSH: Upper Bridge Control Potential Adjustment Circuit CVSH: Charging control potential adjustment circuit T1: First transistor T21, T22: Second transistors VDD: Power supply voltage PUM: Charging circuit C1: First charging capacitor C2: Second charging capacitor SW1: First charging switch element SW2: Second charging switch element SW3: Third charging switch element SW4: Fourth charging switch element VG: Adjust voltage

Claims

1. A power converter with a voltage difference control mechanism, comprising: an upper bridge switch, a first terminal of which is coupled to an input voltage; a lower bridge switch, the first terminal of which is connected to a second terminal of the upper bridge switch, the second terminal of which is grounded; a lower bridge drive circuit, connected to a control terminal of the lower bridge switch and configured to drive the lower bridge switch; an upper bridge turn-on drive circuit, configured to switch the upper bridge switch from a closed state to an open state; an upper bridge turn-off drive circuit, a signal output terminal of which is connected to the control terminal of the upper bridge switch; and an upper bridge voltage difference modulation circuit, connected to a first power input terminal of the upper bridge turn-off drive circuit and connected to an output node between the first terminal of the lower bridge switch and the second terminal of the upper bridge switch; The upper bridge voltage difference modulation circuit is configured to output a floating voltage to the first power input terminal of the upper bridge shutdown drive circuit based on an output voltage of the output node. The upper bridge shutdown drive circuit is configured to use the floating voltage to switch the upper bridge switch from the on state to the off state, such that a voltage difference between the floating voltage and the output voltage falls within a target voltage range. The upper bridge voltage difference modulation circuit includes: a floating voltage supply transistor, a first terminal of which is coupled to a charging voltage, and a second terminal of which is connected to the first power input terminal of the upper bridge shutdown drive circuit; and a floating bias control generation circuit connected to the control terminal of the floating voltage supply transistor and the output node, configured to output a floating control voltage signal to the control terminal of the floating voltage supply transistor based on the output voltage.

2. A power converter with a voltage difference control mechanism as claimed in claim 1, wherein the upper bridge voltage difference modulation circuit is configured to modulate the floating voltage such that the voltage difference between the floating voltage and the output voltage is maintained equal to a target voltage difference value.

3. The power converter with a voltage difference control mechanism as claimed in claim 1, wherein the floating bias control generation circuit further comprises: a current source; and a control-side diode circuit comprising a control-side diode or a plurality of said control-side diodes connected in series, connected to the current source, and connected between the control terminal of the floating voltage supply transistor and the output node.

4. The power converter with a voltage difference control mechanism as described in claim 3, wherein the floating bias control generation circuit further comprises: a voltage regulator capacitor, a first terminal of which is connected to a first terminal of the current source and a control terminal of the floating voltage supply transistor, and a second terminal of which is connected to the output node.

5. A power converter with a voltage difference control mechanism as claimed in claim 1, wherein the floating bias control generation circuit further comprises: a current source; and a plurality of control-side transistors arranged in a manner thereof, wherein the control terminal and first terminal of a first of the plurality of control-side transistors are connected to the current source and the control terminal of the floating voltage supply transistor, the control terminal and first terminal of each of the other plurality of control-side transistors are connected to the second terminal of the former, and the second terminal of the last of the plurality of control-side transistors is connected to the output node.

6. The power converter with a voltage difference control mechanism as described in claim 5, wherein the floating bias control generation circuit further comprises: a voltage regulator capacitor, a first terminal of which is connected to a first terminal of the current source and a control terminal of the floating voltage supply transistor, and a second terminal of which is connected to the output node.

7. A power converter with a voltage difference control mechanism as claimed in claim 1, wherein the floating bias control generation circuit further comprises: a current source; and a plurality of control-side transistors arranged in a manner thereof, wherein a first terminal of the last of the plurality of control-side transistors is connected to the output node, a second terminal and a control terminal of the first of the plurality of control-side transistors are connected to the current source and the control terminal of the floating voltage supply transistor, and the second terminals and control terminals of each of the plurality of control-side transistors other than the first are connected to the first terminal of the previous one.

8. The power converter with a voltage difference control mechanism as claimed in claim 7, wherein the floating bias control generation circuit further comprises: a voltage regulator capacitor, a first terminal of which is connected to a first terminal of the current source and a control terminal of the floating voltage supply transistor, and a second terminal of which is connected to the output node.

9. The power converter with a voltage difference control mechanism as claimed in claim 1, wherein the floating bias control generation circuit further comprises: an operational amplifier, a first input terminal of the operational amplifier coupled to a reference voltage, and an output terminal of the operational amplifier connected to a control terminal of the floating voltage supply transistor; and a voltage divider circuit comprising a first voltage divider resistor and a second voltage divider resistor, a first terminal of the first voltage divider resistor connected to a second terminal of the floating voltage supply transistor, a second terminal of the first voltage divider resistor connected to a first terminal of the second voltage divider resistor, a second terminal of the second voltage divider resistor connected to the output node, and a feedback node between the second terminal of the first voltage divider resistor and the first terminal of the second voltage divider resistor connected to a second input terminal of the operational amplifier.

10. The power converter with a voltage difference control mechanism as claimed in claim 9, wherein the floating bias control generation circuit further comprises: a voltage regulator capacitor, a first terminal of which is connected to the output terminal of the operational amplifier, and a second terminal of which is connected to the output node.

11. The power converter with a voltage difference control mechanism as claimed in claim 1, wherein the upper bridge voltage difference modulation circuit further comprises: an output-side diode circuit including an output-side diode or a plurality of said output-side diodes connected in series, connected between a second terminal of the floating voltage supply transistor and a second power input terminal of the upper bridge shutdown drive circuit.

12. The power converter with a voltage difference control mechanism as claimed in claim 1, wherein the upper bridge voltage difference modulation circuit further comprises: a plurality of output-side transistors, the plurality of output-side transistors being arranged in a manner thereof, a control terminal and a first terminal of a first of the plurality of output-side transistors being connected to a second terminal of the floating voltage supply transistor, a control terminal and a first terminal of each of the plurality of output-side transistors being connected to a second terminal of the previous one, and a second terminal of the last of the plurality of output-side transistors being connected to a second power input terminal of the upper bridge shutdown drive circuit.

13. The power converter with a voltage difference control mechanism as claimed in claim 1, wherein the upper bridge voltage difference modulation circuit further comprises: a plurality of output-side transistors arranged in a manner thereof, a first terminal of the last of the plurality of output-side transistors connected to a second power input terminal of the upper bridge shutdown drive circuit, a second terminal and a control terminal of the first of the plurality of output-side transistors connected to a second terminal of the floating voltage supply transistor, and a second terminal and a control terminal of each of the plurality of output-side transistors other than the first connected to a first terminal of the previous one.

14. The power converter with a voltage difference control mechanism as claimed in claim 1, wherein the upper bridge voltage difference modulation circuit further comprises: an output-side transistor, a first terminal of the output-side transistor being connected to a second terminal of the floating voltage supply transistor, the second terminal of the output-side transistor being connected to a second power input terminal of the upper bridge shutdown drive circuit, and a control terminal of the output-side transistor being coupled to a control voltage.

15. The power converter with a voltage difference control mechanism as claimed in claim 1, wherein the upper bridge voltage difference modulation circuit further comprises: an output-side transistor, a first terminal of the output-side transistor being connected to a second terminal of the floating voltage supply transistor, the second terminal of the output-side transistor being connected to a second power input terminal of the upper bridge shutdown drive circuit, and a control terminal of the output-side transistor being connected to a control terminal of the floating voltage supply transistor.

16. The power converter with voltage difference control mechanism as claimed in claim 1, further comprising: a first transistor, a first terminal of the first transistor being coupled to a charging voltage, a second terminal of the first transistor being connected to a control terminal of the upper bridge switch, and the control terminal of the first transistor being connected to a signal output terminal of the upper bridge turn-on drive circuit connected to the control terminal of the first transistor.

17. The power converter with a voltage difference control mechanism as claimed in claim 16 further comprises: a charging circuit connected to the upper bridge turn-on drive circuit and a first terminal of the first transistor, configured to supply the charging voltage to the upper bridge turn-on drive circuit and the first terminal of the first transistor.

18. The power converter with voltage difference control mechanism as claimed in claim 16 further comprises: a control circuit connected to a signal input terminal of the upper bridge shutdown drive circuit, a signal input terminal of the lower bridge drive circuit, and a signal input terminal of the upper bridge turn-on drive circuit, configured to control the upper bridge shutdown drive circuit, the lower bridge drive circuit, and the upper bridge turn-on drive circuit.

19. The power converter with a voltage difference control mechanism as described in claim 16, further comprising: one or more second transistors, the control terminals of the one or more second transistors being connected to the signal output terminal of the upper bridge shutdown drive circuit, the first terminals of the one or more second transistors being connected to the second terminals of the first transistors and the control terminal of the upper bridge switch, and the second terminals of the one or more second transistors being connected to the output node.

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