Semiconductor structure and method of manufacturing the same

Abstract

A semiconductor structure includes: a substrate, a plurality of pillar-shaped supports, and a plurality of capacitor structures. The plurality of pillar-shaped supports are disposed above the substrate. The outer sidewall of each pillar-shaped support includes a plurality of support portions and a plurality of connecting portions. The plurality of capacitor structures are disposed on the support portions of the outer sidewalls of each pillar-shaped support, and the connecting portions connect the capacitor structures together.

Description

Technical Field

[0001] This invention relates to a semiconductor structure with a storage capacitor and a method for manufacturing the same, and more particularly to a semiconductor structure that can stably support the storage capacitor and improve electrical performance, and a method for manufacturing the same. Prior Technology

[0002] To meet consumer demand for miniaturized electronic devices, manufacturing technologies are striving to reduce component sizes. However, this miniaturization brings with it numerous challenges. Take columnar capacitor structures as an example. These typically consist of a U-shaped bottom electrode, a top electrode, and a dielectric layer between them, with one or more supporting planes to support the top, and / or middle, and / or bottom of the capacitor structure. However, as dimensions shrink, the aspect ratio of the capacitor structure increases, making it prone to collapse and hindering yield improvement. Furthermore, the unit storage capacitance decreases with size reduction, necessitating higher refresh frequencies or lower reliability, thus degrading the quality of DRAMs using this columnar structure. Summary of the Invention

[0003] This disclosure provides a semiconductor structure, including: a substrate; a plurality of columnar supports disposed above the substrate, each columnar support having an outer wall comprising a plurality of support portions and a plurality of connecting portions; and a plurality of capacitor structures disposed on the support portions of the outer walls of each columnar support, wherein the connecting portions connect the capacitor structures together.

[0004] This disclosure provides a method for manufacturing a semiconductor structure, comprising: forming a plurality of columnar supports on a substrate, wherein the outer sidewall of each columnar support includes a plurality of support portions and a plurality of connecting portions; and forming a plurality of capacitor structures on the support portions of the outer sidewall of each columnar support, wherein the connecting portions connect the capacitor structures together.

[0005] According to the semiconductor structure and manufacturing method disclosed herein, the aspect ratio of the capacitor structure can be improved, the capacitance value can be increased, the stability of the capacitor structure can be improved, and the product yield can be increased, thereby improving the electrical performance of the application device. Simple Explanation of the Diagram

[0006] Figures 1A to 7A are perspective views of a semiconductor structure in several intermediate manufacturing stages according to some embodiments of this disclosure. Figures 1B to 7B respectively show schematic cross-sectional views taken along line B-B' shown in Figures 1A to 7A. Figures 8A-8D illustrate schematic diagrams of a support for a semiconductor structure according to some other embodiments of the present disclosure at various intermediate manufacturing stages. Figure 9A is a perspective view of a semiconductor structure at an intermediate manufacturing stage according to some embodiments of the present disclosure. Figure 9B shows a schematic cross-section taken along line 9B-9B' in Figure 9A. Figure 9C is a schematic cross-sectional view of a semiconductor structure support and capacitor structure, for example, taken along line 9B-9B' of Figure 9A, according to some other embodiments of this disclosure. Figures 10A and 10B show schematic cross-sectional views of a semiconductor structure in an intermediate manufacturing stage according to some embodiments of this disclosure. Figure 11 is a perspective view of a semiconductor structure applying the capacitor structure of some embodiments disclosed herein. Implementation

[0007] The following description provides various embodiments of semiconductor structures and their manufacturing methods, and is not intended to limit the invention. Furthermore, when the description refers to a first element being formed on or above a second element, unless specifically excluded, it can mean that the first and second elements are in direct contact or not. For the purpose of simplification and clarity, embodiments of the invention may use the same or similar element symbols for the same or similar elements in many examples, and may only show a portion of the semiconductor structure relating to the invention. Moreover, additional steps may exist before, during, and after the various steps of the manufacturing method to form other desired components / layers, and some steps may be replaced or omitted in other embodiments.

[0008] The capacitor structure disclosed in this embodiment can be used alone or applied in a semiconductor device. For example, it can be applied in a Dynamic Random Access Memory (DRAM) device, which includes related components such as bit lines, storage point contacts, word lines, and peripheral circuitry. However, other suitable types of memory or electronic devices may also apply the embodiments disclosed in this disclosure, and this disclosure does not impose any limitations on them.

[0009] As shown in Figure 9A, according to an embodiment of this disclosure, the semiconductor structure 2 includes a plurality of columnar solid support members 110 disposed above a substrate 100, and a plurality of capacitor structures 210 formed on the outer sidewalls 110S of each support member 110. In this example, three capacitor structures 210 are arranged adjacent to each other and substantially equidistantly on the outer sidewalls 110S of each support member 110, but the present invention is not limited thereto.

[0010] Referring to Figures 1A, 1B, 2A, 2B, 3A, and 3B, a sacrificial material layer 106 with multiple support columns 1102 embedded in it can be formed above the substrate 100, wherein these support columns 1102 are spaced apart from each other, as detailed below.

[0011] Referring to Figures 1A and 1B, an insulating layer 102 and a sacrificial material layer 106 may be sequentially formed on a substrate 100. The material of the substrate 100 may include semiconductor materials, such as silicon, gallium arsenide, gallium nitride, germanium silicon, other suitable substrate materials, or combinations thereof. In some embodiments, the substrate 100 is a silicon-on-insulator (SOI) structure. In some embodiments, storage point contacts 104 may be formed in the insulating layer 102 to electrically connect the substrate 100 to a subsequently formed capacitor structure.

[0012] The sacrificial material layer 106 has a plurality of support holes 1062. The support holes 1062 are located, for example, between subsequently formed capacitor structures. As shown in Figure 1B, the support holes 1062 may expose the top surface 102a of the insulating layer 102 located between adjacent storage point contacts 104. In this embodiment, the support holes 1062 may not expose adjacent storage point contacts 104. However, in other examples, the support holes 1062 expose not only the insulating layer 102 but also a portion of the adjacent storage point contacts 104.

[0013] Furthermore, the plane containing the top surface of the base 100 is, for example, the plane formed by the first direction D1 and the second direction D2, hereinafter referred to as the D1-D2 plane. According to the embodiment, these support holes 1062 are perpendicular to the plane containing the top surface of the base 100 (D1-D2 plane), for example, extending along a third direction D3, and these support holes 1062 are spaced apart from each other.

[0014] Then, referring to Figures 2A and 2B, according to some embodiments, an excess of support material 1100 is deposited over the sacrificial material layer 106 to fill the support holes 1062. Thus, the support material 1100 includes an excess portion 1101 over the sacrificial material layer 106 and support pillars 1102 in the support holes 1062.

[0015] According to some embodiments, the sacrificial material layer 106 comprises an insulating material with etch selectivity between itself and the support material 1100, such as, but not limited to, an oxide. The support material 1100 comprises an insulating material with sufficient support strength. In some embodiments, the support material 1100 comprises silicon nitride (SiN), silicon monoxide (SiO), silicon carbonitride (SiCN), or a combination thereof.

[0016] Next, referring to Figures 3A and 3B, the excess portion 1101 of the support material 1100 is removed. The excess portion 1101 of the support material 1100 can be removed through a planarization process, such as a chemical mechanical polishing (CMP) process, a mechanical polishing process, an etch-back process, or a combination of the aforementioned processes, until the top surface 106a of the sacrificial material layer 106 is exposed.

[0017] Subsequently, according to some embodiments, a plurality of capacitor structure receiving holes 112 are formed on the sidewall edges of each support column 1102. The longitudinal direction of each capacitor structure receiving hole 112 (e.g., along a third direction D3) may be perpendicular to the substrate 100 (e.g., the D1-D2 plane). Each capacitor structure receiving hole 112 exposes a corresponding storage point contact 104.

[0018] In some embodiments, when forming the capacitor structure receiving hole 112, the support column 1102 may be partially removed simultaneously to form a smaller columnar support member 110. For example, the size of the support member 110 (e.g., the width W2 in the first direction D1) may be smaller than the size of the support column 1102 (e.g., the width W1 in the first direction D1). According to this embodiment, the cross-section of the support member 110 may have a concave-convex profile.

[0019] Furthermore, in some embodiments, the outer wall 110S of the support member 110 includes a plurality of support portions 110S1 and a plurality of connecting portions 110S2. Each capacitor structure receiving hole 112 exposes the support portion 110S1 of the adjacent outer wall 110S of the support member 110. These connecting portions 110S2 connect these capacitor structure receiving holes 112. According to an example, the vertical height of the support portion 110S1 (i.e., the depth of the capacitor structure receiving hole 112) is equal to the vertical height H2 of the support member 110. Therefore, the depth of the capacitor structure receiving hole 112 can be controlled by the vertical height H2 of the support member 110 in this embodiment, which is beneficial to increasing the height of the subsequently manufactured capacitor structure (which is proportional to the unit storage capacitance). In this embodiment, in order to provide good support for the capacitor structure by the support member 110, the vertical height (e.g., H2) of the support portion 110S1 is greater than the width W2 of the support member 110.

[0020] Subsequently, referring to Figures 4A and 4B, according to some embodiments, a bottom electrode 212 is formed on the surface of the capacitor structure receiving hole 112. The bottom electrode 212 can be formed on the sacrificial material layer 106 by chemical vapor deposition, atomic layer deposition, physical vapor deposition, other suitable processes, or combinations thereof.

[0021] In some embodiments, the top surface 212a of the bottom electrode 212 is flush with the top surface 110a of the support member 110. The bottom electrode 212 has a U-shaped profile in the capacitor structure receiving hole 112. The outer wall of the bottom electrode 212 may have a supported portion 2121 (shown in Figure 5B) that is in direct contact with the supporting portion 110S1 of the support member 110, and the height of the supported portion 2121 (as shown in H3 in Figure 5B) is greater than the width W2 of the support member 110, thereby preventing the bottom electrode 212 from collapsing.

[0022] Then, referring to Figures 5A and 5B, according to some embodiments, the sacrificial material layer 106 is removed. For example, a wet etching process is performed to remove the sacrificial material layer 106, wherein the wet etching process may substantially not damage components other than the sacrificial material layer 106, such as the insulating layer 102, the support 110, and the bottom electrode 212.

[0023] According to the manufacturing method of the above embodiment, the bottom electrode 212 of the capacitor structure is formed after the columnar support member 110 is formed. Compared with the conventional method of using a horizontal support layer to support the capacitor structure, which is prone to capacitor structure collapse, short circuit and / or quality degradation, in the above embodiment, since each bottom electrode 212 is stably supported by the solid support member 110, the vertical height H3 of the bottom electrode 212 can increase with the vertical height H2 of the support member 110, which is beneficial to increase the unit storage capacity and miniaturization, and can solve the above-mentioned conventional problems. In one embodiment, the ratio of the vertical height H3 of the bottom electrode 212 to the vertical height H2 of the support member 110 is between 0.7 and 1.3.

[0024] Subsequently, referring to Figures 6A and 6B, according to some embodiments, a dielectric layer 214 is formed over the substrate 100 and on the bottom electrode 212. For example, a dielectric material with a dielectric constant of, for example, greater than or equal to 3.9 is compliantly deposited to cover the top surface 102a of the insulating layer 102, the surface of the bottom electrode 212, and the connection portion 110S2 between the top surface 110a of the support member 110 and the outer sidewall 110S. More specifically, the dielectric layer 214 covers the remaining portion 2122 of the outer sidewall 212S2 of the bottom electrode 212, except for the supported portion 2121.

[0025] In some embodiments, the dielectric layer 214 may be formed using a vapor deposition process. The dielectric layer 214 may include, for example, aluminum oxide (AlO), yttrium oxide (Y₂O₃), titanium oxide (TiO), niobium oxide (NbO), hafnium oxide (HfO), lanthanum oxide (LaO), lanthanum aluminate (LaAlO), zirconium oxide (ZrO), silicon monoxide (SiO), silicon nitride (SiN), hafnium silicate oxide (HfSiO), hafnium silicate nitride (HfSiON), zirconium silicate oxide (ZrSiO), hafnium zirconate (HfZrO), or other suitable dielectric materials for storing charge. The dielectric layer 214 is made of a different material than the support 110. In one embodiment, the dielectric constant of the dielectric layer 214 is greater than the dielectric constant of the support 110. The dielectric layer 214 can be a single layer or a multi-layer structure, for example, but not limited to a two-layer structure of silicon dioxide layer / silicon nitride layer.

[0026] Next, referring to Figures 7A and 7B, a top electrode 216 is formed on the dielectric layer 214. The top electrode 216 may include a first portion 2161 inside the bottom electrode 212 and a second portion 2162 outside the bottom electrode 212. In other words, the first portion 2161 of the top electrode 216 is located in the capacitor structure receiving hole 112. The top electrode 216, the dielectric layer 214, and the bottom electrode 212 form a capacitor structure 210, in which charge can be stored. The ratio of the maximum vertical height H4 of the top electrode 216 to the vertical height H2 of the support member 110 can be between 0.6 and 1.5 to reduce the resistance value. The second portion 2162 of the top electrode 216 may have a maximum vertical height H4. The top electrode 216 and the bottom electrode 212 may each comprise titanium nitride, titanium oxynitride, titanium silicon nitride, tantalum, tantalum nitride, tungsten nitride, germanium silicon, boron silicon, other suitable conductive materials, or combinations thereof. In some embodiments, the top electrode 216 and the bottom electrode 212 may comprise the same material (e.g., titanium nitride). However, in other embodiments, the top electrode 216 and the bottom electrode 212 may comprise different materials.

[0027] The above embodiments involve forming a support member by etching support holes in a sacrificial material layer and then filling the support holes with support material, but the present invention is not limited to this. Figures 8A-8D illustrate another method for manufacturing the support member of the present invention.

[0028] Referring to Figure 8A, a support material 3100 is formed on the insulating layer 102 and the storage point contact 104. The thickness of the support material 3100 depends on the height of the support to be formed. A shield 312 is formed on the support material 3100 to define the support. The material of the support material 3100, the arrangement, material, and manufacturing method of the substrate 100, the insulating layer 102, and the storage point contact 104 can be referred to the description of the foregoing embodiments, and will not be repeated here.

[0029] Referring to Figure 8B, the support material 3100 is patterned according to the mask 312 to form the support column 3102. After the support column 3102 is formed, the mask 312 can be removed by a known process such as an ashing process.

[0030] Subsequently, referring to Figure 8C, a sacrificial material layer 316 is formed covering the support pillar 3102, the insulating layer 102, and the storage point contact 104. The method for forming the sacrificial material layer 316 may include excessively depositing sacrificial material, followed by a planarization process on the sacrificial material, such as a CMP process, a mechanical polishing process, an etch-back process, or a combination of the aforementioned processes, until the top surface 3102a of the support pillar 3102 is exposed, thereby forming a sacrificial material layer 316 whose top surface 316a is substantially coplanar with the top surface 3102a of the support pillar 3102. At this stage of the process, a sacrificial material layer 316 in which multiple support pillars 3102 are embedded can be formed above the substrate 100, with these support pillars 3102 spaced apart from each other.

[0031] Subsequently, referring to Figure 8D, a plurality of capacitor structure receiving holes 112 are formed on the sidewall edges of each support pillar 3102. For example, by one or more etching processes, a portion of the sacrificial material layer 316 and a portion of the support pillar 3102 are removed to form the capacitor structure receiving holes 112. The remaining portions of the support pillar 3102 form the support member 310, wherein each capacitor structure receiving hole 112 exposes the support portion 110S1 of the outer sidewall 110S of the adjacent support member 310. Other details can be referred to the foregoing embodiments and will not be repeated here.

[0032] After forming the support member 310 and the capacitor structure receiving hole 112, the subsequent components can be fabricated with reference to the contents of Figures 4A, 4B, 5A, 5B, 6A, 6B, 7A, and 7B. For example, a bottom electrode 212 with a U-shaped cross-section is formed in the capacitor structure receiving hole 112, the sacrificial material layer 316 is removed, a dielectric layer 214 is conformally deposited on the bottom electrode 212, and a top electrode 216 is formed on the dielectric layer 214 to complete the capacitor structure 210 as shown in Figures 7A and 7B.

[0033] The semiconductor structure 2 of this embodiment may have the following characteristics. According to this embodiment, as shown in Figure 9A, a plurality of support members 110 are disposed above the substrate 100. Each support member 110 may be a solid insulating pillar. A plurality of (e.g., three) capacitor structures 210 are formed on the outer sidewall 110S of the support member 110, and the longitudinal direction of the capacitor structure 210 may be substantially parallel to the longitudinal direction of the support member 110. In order to clearly show the relationship between the support member 110 and the capacitor structure 210 in the embodiment, Figure 9A simplifies the representation of the capacitor structure 210 as a single-layer pillar, and omits the second part 2162 of the top electrode 216 outside the bottom electrode 212 and the dielectric layer 214.

[0034] Furthermore, as shown in Figure 9B, in some embodiments, the support portion 110S1 of the outer sidewall 110S of the support member 110 is covered by the adjacent bottom electrode 212, and the connecting portion 110S2 of the outer sidewall 110S is covered by the dielectric layer 214. In a cross-section, the dielectric layer 214 of these capacitor structures 210 can enclose the bottom electrode 212 and the support member 110 in a closed manner. More specifically, the dielectric layer 214 may include a first portion 2141, a second portion 2142, and a third portion 2143, wherein the first portion 2141 is located on the inner sidewall 212S1 of the bottom electrode 212, the second portion 2142 covers the remaining portion 2122 of the outer sidewall 212S2 of the bottom electrode 212 that protrudes beyond the support member 110, and the third portion 2143 covers the connecting portion 110S2 of the outer sidewall 110S of the support member 110.

[0035] Although the above embodiments use the example of each support member 110 supporting three capacitor structures 210, this disclosure is not limited thereto. Furthermore, different support members 110 may also be configured with different numbers of capacitor structures, depending on the design requirements such as the size and spacing of the capacitor structures in the actual application. According to other embodiments of the present invention, as shown in Figure 9C, four capacitor structures may be configured on the outer wall of one support member 110. For the sake of simplicity, the configuration, materials, and manufacturing processes of these components can be referred to the content of the above embodiments, and will not be repeated here.

[0036] Furthermore, the top view shape of the capacitor structure and support in the embodiments is not particularly limited; for example, it can have a generally circular, elliptical, rhomboid, or other regular or irregular top view shape. The shape of the bottom electrode 212 in the capacitor structure 210 is related to the shape of the capacitor structure receiving hole 112 (Figures 3A, 3B, 8B), which in turn affects the top view shape of other material layers, such as the top view shape of the first portion 2141 of the dielectric layer 214 and the first portion 2161 of the top electrode 216. Several possible variations are exemplified below, but the invention is not limited thereto.

[0037] According to some embodiments, as shown in Figure 9C, the bottom electrode 212 is circular in shape, and the supporting portion 110S1 of the outer wall 110S of the support member 110 is concave, such that the portion of the capacitor structure 210 that contacts the support member 110 is embedded in the support member 110. However, the present invention does not limit the shape of the supporting portion 110S1 of the outer wall 110S of the support member 110 or the bottom electrode 212.

[0038] As shown in Figures 10A and 10B, the bottom electrode 212 of each capacitor structure 210 includes a recess 212R and a protrusion 212C. The recess 212R is recessed in a direction away from the support member 110, wherein the outer sidewall 212R-S of the recess 212R directly contacts the support portion 110S1 of the outer sidewall 110S of the support member 110. The protrusion 212C is connected to the recess 212R, and a portion of the protrusion 212C and the recess 212R can be embedded in the support member 110, while the remaining portion of the protrusion 212C can protrude beyond the support member 110. Furthermore, the support member 110 may have a generally circular (Figure 10A) or elliptical (Figure 10B) cross-sectional profile, but the present invention is not limited to this.

[0039] In addition, the capacitor structure 210 proposed in the embodiment can be used in semiconductor devices in conjunction with other types of capacitor structures to construct hybrid capacitor components.

[0040] As shown in Figure 11, the semiconductor structure 5 with a hybrid capacitor assembly includes upper and lower capacitor layers. In this example, the lower capacitor SC-L may include the capacitor structure 210 of the embodiment, which includes a plurality of solid vertical supports 110 disposed on the insulating layer 102. The upper capacitor SC-U may include a conventional capacitor structure 610, which is supported by two horizontal supports. In this example, the horizontal support 511 is located above the capacitor structure 210 and the solid vertical supports 110. The capacitor structure 610 is located above the capacitor structure 210, and the bottom of the capacitor structure 610 is embedded in the horizontal support 511 and electrically connected to the corresponding capacitor structure 210 below it. The horizontal support 512 is located above the horizontal support 511, and the top of the capacitor structure 610 is embedded in the horizontal support 512. The horizontal supports 511 and 512 respectively constrain the bottom and top of the capacitor structure 610 to prevent the capacitor structure 610 from bending or collapsing. The insulating layer 102, support member 110, and horizontal supports 511 and 512 are, for example, but not limited to, silicon nitride layers or other suitable dielectric layers that can provide support functions. The capacitor structure 610 and the horizontal supports 511 and 512 can be fabricated using any known structures and processes, which will not be elaborated here. The semiconductor structure 5 with a hybrid capacitor assembly according to this embodiment can balance yield and miniaturization requirements in certain applications due to the reduced aspect ratio of the support aperture 1062.

[0041] The above embodiment forms a plurality of storage point contacts 104 in the insulating layer 102, and these storage point contacts 104 are electrically connected to different capacitor structures respectively, but the present invention is not limited thereto. For example, in other embodiments not shown, wires may also be formed in the insulating layer 102, and these wires may be electrically connected to multiple capacitor structures for application in semiconductor devices requiring high capacitance values.

[0042] Based on the above, the semiconductor structure and manufacturing method of the present disclosure have many advantages. In the semiconductor structure of the embodiments, whether used alone or in combination with other conventional capacitor structures, the bottom electrode of the capacitor structure can have a greater height by being supported by a solid support member. In addition to increasing the capacitance value, the resulting capacitor structure has high stability, which can prevent the capacitor structure from bending or collapsing, thereby improving product yield. Therefore, compared with conventional capacitor structures, the capacitor structure of the embodiments can have a larger aspect ratio and capacitance value at the same capacitor structure width, which is beneficial to the miniaturization of capacitor structures and the improvement of product quality. Furthermore, only part of the outer wall of the bottom electrode of each capacitor structure is formed on the support member. The bottom electrode, dielectric layer and top electrode in the capacitor structure can still form a double-sided capacitor structure, that is, from the inside to the outside, the five-layer structure is top electrode material, high dielectric constant dielectric material, bottom electrode material, high dielectric constant dielectric material and top electrode material. Therefore, in the miniaturization of capacitor structures, the support member located between multiple capacitor structures does not affect the layer configuration of the capacitor structure, and its function of storing charge is not sacrificed or reduced due to the setting of the support member in the embodiments.

[0043] Based on the above, the capacitor structure of the embodiment is stable, which can improve product yield, reduce waste in the manufacturing process, and can have a larger capacitance value to improve performance. For example, when applied to DRAM devices, it can reduce the memory data refresh frequency and reduce the overall power consumption of the memory. Therefore, the present invention provides a green semiconductor technology.

[0044] 2,5: Semiconductor Structure 100: Base 102: Insulation layer (insulation layer) 104: Storage point contact component 106,316: Sacrificial Material Layer 1062: Support hole 1100, 3100: Supporting materials 1101: Excess portion 1102, 3102: Supporting column (supporting column) 110, 310: Support components 110S, 212S2, 212R-S: Lateral wall 110S1: Support section 110S2: Connection part 212S1: Inner wall 112: Capacitor structure receiving hole 112S: Sidewall 210: Capacitor Structure (First Capacitor Structure) 212: Bottom electrode 2121: Supported section 2141, 2161: Part One 2122, 2142, 2162: Part Two 2143: Part Three 212R: concave part 212C:convex part 214: Dielectric layer 216: Top electrode 312: Mask SC-L: Lower layer capacitor SC-U: Top layer capacitor 511, 512: Horizontal support components 610: Second capacitor structure 102a, 106a, 110a, 212a, 3102a, 316a: Top surface 110b, 112b: Bottom surface W1, W2: Width H2, H3: Height B-B',9B-9B': Line D1: First Direction D2: Second Direction D3: Third direction

Claims

1. A semiconductor structure, comprising: One base; Multiple columnar support members are disposed above the base, and the outer side wall of each columnar support member includes multiple support portions and multiple connecting portions; and multiple capacitor structures are disposed on the support portions of the outer side wall of each columnar support member, and the connecting portions connect the capacitor structures together.

2. The semiconductor structure as claimed in claim 1, wherein each of the columnar supports is a solid insulating column, and the longitudinal direction of each columnar support is parallel to the longitudinal direction of each capacitor structure.

3. The semiconductor structure as claimed in claim 1, wherein each capacitor structure includes a bottom electrode, a dielectric layer and a top electrode, the outer sidewall of the bottom electrode having a supported portion in direct contact with the supporting portions, and the dielectric layer covering the remaining portion of the outer sidewall of the bottom electrode other than the supported portion.

4. The semiconductor structure as claimed in claim 1, wherein the supporting portion of the outer sidewall of each columnar support is recessed, such that the portion of each capacitor structure in contact with the columnar support is embedded in the columnar support.

5. The semiconductor structure as claimed in claim 1, wherein each capacitor structure includes a bottom electrode, a dielectric layer and a top electrode, a first portion of the dielectric layer is located on the inner sidewall of the bottom electrode, a second portion of the dielectric layer covers a remaining portion of the outer sidewall of the bottom electrode that protrudes beyond the columnar support, and a third portion of the dielectric layer covers the connecting portions of the outer sidewall of the columnar support.

6. The semiconductor structure as claimed in claim 1, wherein the cross-section of the columnar support has a concave-convex profile.

7. The semiconductor structure as claimed in claim 1, wherein the ratio of the vertical height of the bottom electrode of the capacitor structure to the vertical height of the columnar support is between 0.7 and 1.

3.

8. The semiconductor structure as claimed in claim 1, wherein the ratio of the maximum vertical height of the top electrode of the capacitor structure to the vertical height of the columnar support is between 0.6 and 1.

5.

9. The semiconductor structure as claimed in claim 1, wherein, in a cross-section, the dielectric layer of the capacitor structures encloses the bottom electrode of the capacitor structures and each of the columnar supports.

10. The semiconductor structure as claimed in claim 1, wherein the bottom electrode of each capacitor structure includes a recess recessed in a direction away from the columnar support, wherein an outer sidewall of the recess directly contacts the columnar support.

11. The semiconductor structure as claimed in claim 10, wherein the bottom electrode further includes a protrusion connected to the recess, a portion of the protrusion and the recess being embedded in the columnar support, and the remainder of the protrusion protruding beyond the columnar support.

12. The semiconductor structure as described in claim 1, further comprising: A first horizontal support is located above the capacitor structures and the columnar supports; a plurality of second capacitor structures are located above the capacitor structures and electrically connected to the corresponding capacitor structures, wherein the bottom of the second capacitor structures is embedded in the first horizontal support; a second horizontal support is located above the top of the second capacitor structures.

13. The semiconductor structure as described in claim 1, further comprising: An insulating layer is located between the substrate and the capacitor structures; And multiple storage point contacts, located in the insulating layer and electrically connected to the capacitor structures respectively.

14. A method for manufacturing a semiconductor structure, comprising: Multiple columnar support members are formed above a base, and the outer side wall of each columnar support member includes multiple support portions and multiple connecting portions; A plurality of capacitor structures are formed on the support portions of the outer side wall of each columnar support member, and the connecting portions connect the capacitor structures together.

15. The method for manufacturing the semiconductor structure as described in claim 14 further includes: A plurality of support pillars are embedded in a sacrificial material layer above the substrate, wherein the support pillars are spaced apart from each other; portions of the sacrificial material layer and portions of the support pillars are removed to form a plurality of capacitor structure receiving holes, the remaining portions of the support pillars forming columnar supports, wherein the capacitor structure receiving holes expose the support portions of the outer sidewalls of each columnar support; a bottom electrode is formed in each capacitor structure receiving hole; the sacrificial material layer is removed; a dielectric layer is conformally deposited on the bottom electrode; and a top electrode is formed on the dielectric layer.

16. A method of manufacturing a semiconductor structure as described in claim 15, wherein embedding the support pillars in the sacrificial material layer comprises: The sacrificial material layer is formed on top of the substrate; Multiple support holes are formed in the sacrificial material layer; The support holes are filled with a support material to form the support columns in the support holes.

17. A method for manufacturing a semiconductor structure as described in claim 15, wherein embedding the support pillars in the sacrificial material layer comprises: A supporting material is formed on top of the substrate; A mask is formed on the support material to define the columnar supports; the support material is patterned according to the mask to form the support columns; the mask is removed; a sacrificial material layer is formed to cover the support columns, wherein the top surface of the sacrificial material layer is coplanar with the top surfaces of the support columns.

18. A method of manufacturing a semiconductor structure as claimed in claim 15, wherein the bottom electrode of each capacitor structure includes a recess recessed in a direction away from the columnar support, wherein an outer sidewall of the recess directly contacts the columnar support.

19. A method of manufacturing a semiconductor structure as claimed in claim 18, wherein each capacitor structure includes a bottom electrode, a dielectric layer and a top electrode, the outer sidewall of the bottom electrode having a supported portion in direct contact with the supporting portions, and the dielectric layer covering the remaining portion of the outer sidewall of the bottom electrode other than the supported portion.

20. A method of manufacturing a semiconductor structure as claimed in claim 18, wherein the support portion of the outer sidewall of each columnar support is recessed, such that the portion of each capacitor structure in contact with the columnar support is embedded in the columnar support.

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