High-hardness substrate and method for manufacturing the same

Abstract

A method for fabricating a high-hardness substrate includes the following steps: providing a crystal ingot; dividing the crystal ingot into a plurality of wafers; performing double-sided grinding on the surface of each wafer; performing copper disk polishing on the wafers; performing dry etching on one surface of each wafer; performing chemical mechanical polishing on the surface of each wafer; and cleaning the wafers to obtain a plurality of high-hardness substrates. By performing a dry etching process before chemical mechanical polishing of the wafers, the damage depth on the surface of the wafers can be reduced, thereby reducing the thickness required for subsequent thinning by chemical mechanical polishing, and achieving a significant reduction in polishing time.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing; in particular, it refers to a substrate and its manufacturing method. Prior Technology

[0002] It is known that conventional substrates are manufactured through processes such as ingot slicing, mechanical grinding, copper disk polishing, chemical mechanical polishing (CMP), and cleaning.

[0003] Because the mechanical processing of ingots during slicing generates many defects such as line marks on the substrate surface, in order to maintain the flatness of the substrate surface, it is necessary to remove the defects through mechanical grinding and copper disk polishing processes. Then, chemical mechanical polishing is performed to remove surface defects such as surface damage caused by mechanical processing.

[0004] However, when the substrate is a high-hardness substrate, the removal rate of chemical mechanical polishing is not high. The removal rate refers to the amount of thickness change of the material before and after polishing, and the amount of thickness change is divided by the polishing time. In other words, when the substrate is a high-hardness substrate, it takes a lot of time to remove a certain thickness of material, resulting in poor efficiency. Therefore, how to maintain the flatness of the substrate surface and improve the removal rate is an urgent problem to be solved. Summary of the Invention

[0005] In view of this, the purpose of the present invention is to provide a method for manufacturing a high-hardness substrate that can maintain the flatness of the substrate surface and improve the removal rate.

[0006] To achieve the above objectives, the present invention provides a method for manufacturing a high-hardness substrate, comprising the following steps:

[0007] A crystal ingot is provided; the crystal ingot is divided into a plurality of wafers; the surface of each wafer is double-sided ground; the wafers are copper disk polished; one surface of each wafer is dry etched; the surface of each wafer is chemically and mechanically polished; the wafers are cleaned to obtain a plurality of high-hardness substrates.

[0008] The present invention also provides a high-hardness substrate manufactured by the above method.

[0009] The advantage of this invention is that by performing a dry etching process before chemical mechanical polishing (CMP) of the wafer, the damage depth on the wafer surface can be reduced, thereby reducing the thickness required for subsequent CMP thinning and significantly reducing polishing time. In addition, for high-hardness substrates, the removal rate of dry etching is higher than that of CMP. In other words, compared with conventional wafer thinning processes that rely entirely on CMP, this invention, through a process combining dry etching and CMP for wafer thinning, can significantly reduce the time required for wafer thinning and thus improve wafer thinning efficiency. Simple Explanation of the Diagram

[0010] Figure 1 is a flowchart of a method for manufacturing a high-hardness substrate according to a preferred embodiment of the present invention. Figure 2 is a photograph of the wafer surface before dry etching according to the present invention. Figure 3 is a photograph of the wafer surface after dry etching according to the present invention. Figure 4 shows the surface morphology measurement results of the wafer surface before dry etching according to the present invention. Figure 5 shows the surface morphology measurement results of the wafer surface after dry etching according to the present invention. Implementation

[0011] To more clearly illustrate the present invention, preferred embodiments are described in detail below with reference to the accompanying drawings. Please refer to Figure 1, which is a flowchart of a method for manufacturing a high-hardness substrate according to a preferred embodiment of the present invention. The method for manufacturing this high-hardness substrate includes the following steps:

[0012] Step S201, providing a crystal ingot; the crystal ingot may be a sapphire, ceramic or diamond crystal ingot grown by the CZ method.

[0013] Step S202: Divide the ingot into a plurality of wafers; in this embodiment, the ingot is divided into a plurality of wafers by a wire saw, and these wafers are sapphire, ceramic or diamond wafers with an a-axis or a r-axis.

[0014] Step S203: Perform double-sided grinding on the surface of each wafer; the double-sided grinding is a physical mechanical grinding. In this embodiment, the front and back sides of each wafer are mechanically ground simultaneously. In other embodiments, the front and back sides of each wafer may be mechanically ground separately.

[0015] Step S204: Polish the wafers with copper disks; in this embodiment, the front and back sides of each wafer are polished with copper disks respectively.

[0016] Step S205: Dry etching is performed on one surface of each wafer. The dry etching utilizes gas as the primary etching medium and is driven by plasma energy. The plasma has both physical and chemical effects on the etching process. First, the plasma decomposes the etching gas molecules, generating highly reactive molecules that can rapidly etch away the material. In addition, the plasma ionizes these chemical components, giving them a charge. When the wafer is placed on a negatively charged cathode, the positively charged ions are attracted to the cathode and accelerated towards it, thus impacting the wafer surface and etching is performed.

[0017] Furthermore, in this embodiment, the dry etching is inductively coupled plasma (ICP) etching. The etching gas used includes one of Ar, Cl2, BCl3, O2, H2, CF4, CHF3, C2F6, C3F6, C4F8, CHF3, SF6, NF3, or a combination of the aforementioned etching gases. The etching temperature is controlled between 100 and 200 °C, and the etching time is controlled between 15 and 50 minutes. As a result, the thickness removal rate of the dry etching is greater than 4.0 μm / hr. In this embodiment, the thickness removal rate of the dry etching is between 6.0 μm / hr and 10.0 μm / hr.

[0018] Please refer to Figures 2 and 3. Figure 2 shows a photograph of the wafer surface before dry etching, where the wafer surface is uneven and the surface roughness Ra is greater than 3.5 nm. Figure 3 shows a photograph of the same surface of the same wafer after dry etching, where the wafer surface is smooth and the surface roughness Ra is less than 2 nm. In addition, please refer to Figures 4 and 5. Figure 4 shows the surface morphology measurement results before dry etching of the wafer surface, where the surface morphology is irregularly distributed. Figure 5 shows the surface morphology measurement results after dry etching of the same surface of the same wafer, where the high and low morphologies are distributed in a concentric circle pattern. The high and low morphologies gradually change from the center of the wafer towards the radial direction, which has the technical effect of avoiding warping and facilitating subsequent processing.

[0019] Step S206 involves performing chemical mechanical polishing (CMP) on the surface of each wafer. In this embodiment, step S205 includes dry etching on the front and back sides of each wafer, and step S206 includes chemical mechanical polishing on the front and back sides of each wafer. The thickness removal rate of the chemical mechanical polishing of each wafer is between 0.3 μm / hr and 0.5 μm / hr at a unit pressure of 200~500 g / cm2 and a rotation speed of 20~40 rpm.

[0020] In other embodiments, steps S205 and S206 may also involve dry etching on at least one side of each wafer, followed by chemical mechanical polishing on the front and back sides of each wafer, or steps S205 and S206 may involve dry etching and chemical mechanical polishing on the same side of each wafer.

[0021] Step S207 involves cleaning the wafers to obtain a plurality of high-hardness substrates; step S207 includes cleaning the wafers using SC1 and SC2.

[0022] In summary, this invention, by performing a dry etching process before chemical mechanical polishing (CMP) of the wafer, reduces the damage depth on the wafer surface, thereby reducing the thickness required for subsequent CMP thinning and significantly shortening the polishing time. Furthermore, for high-hardness wafers, dry etching has a higher thickness removal rate than CMP. In other words, compared to conventional processes that rely entirely on CMP for wafer thinning, this invention, through a dry etching combined with CMP process, significantly reduces the time required for thinning high-hardness wafers, thus improving wafer thinning efficiency.

[0023] Furthermore, the high-hardness substrate produced by the high-hardness substrate manufacturing method provided by the present invention not only has a flat surface, but also the high and low morphologies of the wafer surface after dry etching are distributed in a concentric circle shape, which has the technical effect of avoiding warping and facilitating subsequent processing.

[0024] The above description is only a preferred embodiment of the present invention. Any equivalent changes made by applying the present invention specification and the claims should be included within the patent scope of the present invention.

[0025] [This invention] S201, S202, S203, S204, S205, S206, S207: Steps

Claims

1. A method for fabricating a high-hardness substrate, comprising the following steps: providing a crystal ingot; dividing the crystal ingot into a plurality of wafers; performing double-sided grinding on the surface of each wafer; performing copper disk polishing on the wafers; performing dry etching on one surface of each wafer; performing chemical mechanical polishing on the surface of each wafer; cleaning the wafers to obtain a plurality of high-hardness substrates; wherein the dry etching is inductively coupled plasma (ICP) etching; wherein the surface roughness Ra of the surface of each wafer before dry etching is greater than 3.5 nm; and the surface roughness Ra of the surface of each wafer after dry etching is less than 2 nm and the elevation morphology is distributed in a concentric circle pattern.

2. The method for manufacturing a high-hardness substrate as described in claim 1, wherein the etching gas used in the dry etching comprises one of Ar, Cl2, BCl3, O2, H2, CF4, CHF3, C2F6, C3F6, C4F8, CHF3, SF6, NF3 or a mixture of the aforementioned etching gases.

3. The method for manufacturing a high-hardness substrate as described in claim 1, wherein the dry etching temperature is controlled at 100 to 200 °C.

4. The method for manufacturing a high-hardness substrate as described in claim 1, wherein the dry etching time is controlled to be between 15 and 50 minutes.

5. The method for manufacturing a high-hardness substrate as described in claim 1, wherein the thickness removal rate of the dry etching is greater than 4.0 μm / hr.

6. The method for manufacturing a high-hardness substrate as described in claim 5, wherein the thickness removal rate of the dry etching is between 6.0 μm / hr and 10.0 μm / hr.

7. The method for fabricating a high-hardness substrate as described in claim 1, wherein the thickness removal rate of the chemical mechanical polishing of each wafer is between 0.3 μm / hr and 0.5 μm / hr.

8. The method for manufacturing a high-hardness substrate as described in claim 1, comprising dry etching on the front and back sides of each wafer, and chemical mechanical polishing on the front and back sides of each wafer.

9. A high-hardness substrate manufactured by the method of manufacturing a high-hardness substrate according to any one of claims 1 to 8.

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