Method for producing laminate substrate, and substrate processing device

Abstract

The method for manufacturing a multilayer substrate according to the present invention includes the following (A) to (D): (A) forming a bonding layer including an oxide layer on the surface of a first semiconductor substrate. (B) contacting the oxide layer of the bonding layer with a second semiconductor substrate, thereby bonding the first semiconductor substrate and the second semiconductor substrate through the bonding layer. (C) after bonding, forming a modified layer on a predetermined first slitting surface on which the first semiconductor substrate is to be slid in the thickness direction using laser light. (D) thinning the first semiconductor substrate by slitting the first semiconductor substrate starting from the modified layer formed on the predetermined first slitting surface, thereby bonding the first semiconductor substrate to the second semiconductor substrate through the bonding layer.

Description

[Technical Field]

[0001] This invention relates to a method for manufacturing a multilayer substrate and a substrate processing apparatus. [Previous Technology]

[0002] Patent documents 1 and 2 disclose a method for manufacturing an SOI substrate. The manufacturing method described in Patent Document 1 includes the following stages (a) to (f): (a) After forming a buried oxide layer at a predetermined depth of a first wafer, an oxide film is formed on the first wafer. (b) A hydrogen buried layer is formed on the first wafer at a depth deeper than the buried oxide layer. (c) A second wafer is bonded to the oxide film. (d) The portion of the first wafer below the hydrogen buried layer is removed, exposing the first wafer between the buried oxide layer and the hydrogen buried layer. (e) The first wafer exposed in (d) and the buried oxide layer are sequentially removed, exposing the first wafer between the buried oxide layer and the oxide film. (f) A predetermined thickness of the first wafer exposed in (e) is removed.

[0003] The manufacturing method described in Patent Document 2 involves preparing a silicon substrate for forming an active layer composed of monocrystalline silicon, and forming an embedded insulating layer on the surface of the silicon substrate. Next, hydrogen ions are implanted through the embedded insulating layer to form a release ion implantation layer, and Ar ions are implanted between the ion implantation layer and the embedded insulating layer to form an amorphous layer. Then, the silicon substrate is bonded to a support substrate by embedding the insulating layer. Afterwards, a portion of the silicon substrate is peeled off at the ion implantation layer using a smart cutting method by performing a heat treatment, thereby forming an active layer. Further heat treatment is then performed to polycrystallineize the amorphous layer, thus forming a polycrystalline silicon layer with gettering points. [Prior Art Documents] [Patent Documents]

[0004] Patent Document 1: Japanese Patent Publication No. 2006-173568; Patent Document 2: Japanese Patent Publication No. 2009-218381 [Summary of the Invention]

[0005] [The problem the invention aims to solve]

[0006] One aspect of the present invention provides a technique that improves the productivity of a multilayer substrate comprising a semiconductor substrate, an oxide layer, and a semiconductor layer in sequence, and improves the peelability of the oxide layer from the semiconductor substrate. [Means for solving the problem]

[0007] A method for manufacturing a multilayer substrate according to one aspect of the present invention includes the following (A) to (D): (A) forming a bonding layer including an oxide layer on the surface of a first semiconductor substrate. (B) contacting the oxide layer of the bonding layer with a second semiconductor substrate, thereby bonding the first semiconductor substrate and the second semiconductor substrate through the bonding layer. (C) after bonding, forming a modified layer on a predetermined first slitting surface on which the first semiconductor substrate is to be slid in the thickness direction using laser light. (D) thinning the first semiconductor substrate by slitting the first semiconductor substrate starting from the modified layer formed on the predetermined first slitting surface, thereby bonding the first semiconductor substrate to the second semiconductor substrate through the bonding layer. [Effects of the Invention]

[0008] According to one aspect of the present invention, the productivity of a stacked substrate comprising a semiconductor substrate, an oxide layer, and a semiconductor layer in sequence can be improved, and the peelability of the oxide layer from the semiconductor substrate can be improved.

Implementation Method

[0010] [Form used to implement the invention]

[0011] Hereinafter, embodiments of the present invention will be described with reference to the drawings. Furthermore, in the drawings, the same or corresponding structures are sometimes referred to by the same symbol, and descriptions are omitted. In this specification, the X-axis, Y-axis, and Z-axis are mutually perpendicular directions. The X-axis and Y-axis are horizontal directions, and the Z-axis is a vertical direction.

[0012] Referring to Figures 1 and 2, a method for manufacturing a multilayer substrate according to one embodiment will be described. The method for manufacturing a multilayer substrate, as shown in Figure 1, includes steps S101 to S107. Furthermore, the method for manufacturing a multilayer substrate need only include at least S101 to S103. Also, the order of S104 to S107 is not limited to the order shown in Figure 1; for example, S106 can be performed after S107.

[0013] Step S101 includes forming a bonding layer 11 on the surface of the first semiconductor substrate 10. The bonding layer 11 includes an oxide layer 11a. The oxide layer 11a is, for example, a thermal oxide layer formed by a thermal oxidation method. The thermal oxidation method involves exposing the heated surface of the first semiconductor substrate 10 to oxygen or water vapor, thereby causing the oxide layer 11a to grow from the surface of the first semiconductor substrate 10 inward. According to the thermal oxidation method, compared with the CVD method described later, a dense oxide layer 11a can be obtained, and an oxide layer 11a with excellent insulation properties can be obtained. The thickness of the oxide layer 11a is set to facilitate laser stripping as described later.

[0014] The first semiconductor substrate 10 is, for example, a silicon wafer, and the oxide layer 11a is, for example, a silicon oxide layer. Furthermore, the first semiconductor substrate 10 is not limited to a silicon wafer, and may also be a compound semiconductor wafer, etc. Also, the oxide layer 11a may be formed by CVD (Chemical Vapor Deposition) or ALD (Atomic Layer Deposition), etc.

[0015] Step S102, as shown in FIG2(A), includes a step of bonding the first semiconductor substrate 10 and the second semiconductor substrate 20 by means of the bonding layer 11. No oxide layer or the like is formed on the surface of the second semiconductor substrate 20, and the second semiconductor substrate 20 is in direct contact with the oxide layer 11a of the bonding layer 11. The second semiconductor substrate 20 is, for example, a silicon wafer. A stacked substrate T comprising the first semiconductor substrate 10, the bonding layer 11, and the second semiconductor substrate 20 can be obtained.

[0016] Before bonding the first semiconductor substrate 10 and the second semiconductor substrate 20, the surface of the second semiconductor substrate 20 and the surface of the oxide layer 11a of the bonding layer 11 can be activated by plasma or the like, and can also be hydrophilized by the supply of water or water vapor oxygen. During bonding, hydrogen bonds are generated between the OH groups. Also, covalent bonds can be generated by the dehydration condensation reaction of hydrogen bonds. Since no liquid adhesive is used, and the solids are directly bonded together, positional deviation caused by adhesive deformation can be prevented. Furthermore, skewing caused by uneven adhesive thickness can be prevented.

[0017] Step S103 includes the step of thinning the first semiconductor substrate 10. First, as shown in FIG2(B), a modified layer 15 is formed on a first predetermined dividing surface 12 that is intended to divide the first semiconductor substrate 10 in the thickness direction using laser light LB. At this time, the modified layer 15 can also be formed on an annular second predetermined dividing surface 13 set at the periphery of the first predetermined dividing surface 12 using laser light LB.

[0018] Laser light LB irradiates the interior of the first semiconductor substrate 10 from, for example, the surface of the first semiconductor substrate 10 opposite to the second semiconductor substrate 20. The modified layer 15 is formed in a dotted pattern, with a plurality of dots formed on the first predetermined dividing surface 12 and the second predetermined dividing surface 13. The formation position of the modified layer 15 is moved using a galvanometer-type scanner or an XYθ stage. During the formation of the modified layer 15, cracks connecting the modified layers 15 are also formed.

[0019] Next, as shown in FIG2(C), the first semiconductor substrate 10 is divided starting from the modified layer 15 formed on the first predetermined dividing surface 12, thereby thinning the first semiconductor substrate 10 which is bonded to the second semiconductor substrate 20 by the bonding layer 11. A stacked substrate T comprising the thinned first semiconductor substrate 10, the bonding layer 11, and the second semiconductor substrate 20 can be obtained. At this time, the first semiconductor substrate 10 can also be divided starting from the modified layer 15 formed on the second predetermined dividing surface 13, thereby removing the bevel of the first semiconductor substrate 10.

[0020] For example, the upper suction cup 131 holds the first semiconductor substrate 10, and the lower suction cup 132 holds the second semiconductor substrate 20. However, the arrangement of the first semiconductor substrate 10 and the second semiconductor substrate 20 can also be reversed, or the upper suction cup 131 can hold the second semiconductor substrate 20, and the lower suction cup 132 can hold the first semiconductor substrate 10. Then, when the upper suction cup 131 rises relative to the lower suction cup 132, starting from the modified layer 15, the crack expands into a planar shape, and the first semiconductor substrate 10 is divided at the first predetermined dividing surface 12 and the second predetermined dividing surface 13.

[0021] Alternatively, the upper suction cup 131 can be raised, or the lower suction cup 132 can be lowered in addition to the upper suction cup 131 rising. Also, the lower suction cup 132 can be rotated about the vertical axis.

[0022] In steps S103 to S107, the skewness remaining on the thinned first semiconductor substrate 10 is removed, thereby improving the quality of the first semiconductor substrate 10. As described later, the defects of the first element layer formed on the surface of the first semiconductor substrate 10 can be reduced.

[0023] In step S104, the surface of the thinned first semiconductor substrate 10 is ground. In step S105, the surface of the thinned first semiconductor substrate 10 is etched. In step S106, the thinned first semiconductor substrate 10 is annealed. In step S107, the thinned first semiconductor substrate 10 is polished.

[0024] In the past, when the first semiconductor substrate was thinned using the intelligent cutting method, a large amount of electricity was consumed when hydrogen ions were injected into the first semiconductor substrate. Furthermore, the maximum depth to which hydrogen ions could be injected into the first semiconductor substrate was approximately 1 μm, and the maximum thickness of the thinned first semiconductor substrate was also approximately 1 μm. Therefore, in order to add a semiconductor layer to the thinned first semiconductor substrate, epitaxial growth and other processes were required. Moreover, since radiation energy was generated when hydrogen ions were injected into the first semiconductor substrate, a special chamber was required to shield against the radiation energy.

[0025] According to this embodiment, as described above, the first semiconductor substrate 10 is thinned by forming a modified layer 15 with laser light LB and dividing the first semiconductor substrate 10 starting from the modified layer 15. Irradiation with laser light LB reduces power consumption compared to hydrogen ion implantation. Furthermore, the depth of the modified layer 15 can be controlled by adjusting the focusing position of the laser light LB, preventing the thinned first semiconductor substrate 10 from becoming too thin and eliminating the need for epitaxial growth processes. Moreover, since laser light LB irradiation, unlike hydrogen ion implantation, does not generate radiation, a special chamber to shield radiation is not required. Therefore, the productivity of the stacked substrate T, including the thinned first semiconductor substrate 10, the bonding layer 11, and the second semiconductor substrate 20, can be improved, and the production cost of the stacked substrate T can be reduced.

[0026] As described above, a stacked substrate T comprising a thinned first semiconductor substrate 10, a bonding layer 11, and a second semiconductor substrate 20 can be obtained. The thickness of the thinned first semiconductor substrate 10 is thinner than the thickness of the second semiconductor substrate 20. When the first semiconductor substrate 10 and the second semiconductor substrate 20 are silicon wafers, and the oxide layer 11a of the bonding layer 11 is a silicon oxide layer, the stacked substrate T obtained by the manufacturing method shown in FIG1 is a so-called SOI (Silicon on Insulator) substrate.

[0027] Details will be described later. According to this embodiment, as shown in Figures 3, 5, and 7, a first element layer 16 is formed on the surface of a thinned first semiconductor substrate 10. The first element layer 16 includes, for example, a semiconductor element. After the first element layer 16 is formed, a modifier layer 15 is formed using laser light LB transmitted through the second semiconductor substrate 20. The absorption rate of the laser light LB of the oxide layer 11a of the bonding layer 11 is high, and the modifier layer 15 is formed at the interface between the second semiconductor substrate 20 and the bonding layer 11. Alternatively, the modifier layer 15 may also be formed inside the bonding layer 11. Then, starting from the modifier layer 15, the second semiconductor substrate 20 and the bonding layer 11 are peeled off. If a multilayer substrate T including the oxide layer 11a is used, laser peeling can be performed regardless of the type of the first element layer 16.

[0028] Furthermore, according to this embodiment, the bonding layer 11 is not formed on the second semiconductor substrate 20, but on the first semiconductor substrate 10. Therefore, the bonding layer 11 is firmly bonded to the first semiconductor substrate 10. Since the bonding layer 11 and the second semiconductor substrate 20 are peeled off without peeling off the interface between the bonding layer 11 and the first semiconductor substrate 10, the peel strength is low and it is easy to peel off. The peeled second semiconductor substrate 20 is then bonded to a new first semiconductor substrate 10 for reuse.

[0029] Next, referring to FIGS. 3 and 4, a first example of the process following FIG. 1 will be described. The method for manufacturing the multilayer substrate is shown in FIG. 3, and includes steps S201 to S204. Step S201, as shown in FIG. 4(A), includes forming a first element layer 16 on the surface of the thinned first semiconductor substrate 10. The first element layer 16 includes, for example, an image sensor. The image sensor is, for example, a BSI (Back Side Illumination) type.

[0030] Step S202, as shown in FIG4(B), includes bonding the first element layer 16 to the second element layer 31 formed on the third semiconductor substrate 30, with the two elements facing each other. The second element layer 31 is formed on the third semiconductor substrate 30 before bonding with the first element layer 16. As shown in FIG10(A), a release layer 35 may also be formed between the third semiconductor substrate 30 and the second element layer 31. The third semiconductor substrate 30 is, for example, a silicon wafer, and the second element layer 31 includes, for example, logic circuitry of an image sensor. The first element layer 16 and the second element layer 31 constitute the element layer 32.

[0031] Before bonding the first element layer 16 and the second element layer 31, the surfaces of the first element layer 16 and the second element layer 31 can be activated by plasma, etc., and can also be hydrophilized by the supply of water or water vapor. During bonding, hydrogen bonds are generated between the OH groups. In addition, covalent bonds can also be generated by the dehydration condensation reaction of hydrogen bonds.

[0032] Step S203 involves peeling the second semiconductor substrate 20 from the bonding layer 11. First, as shown in FIG4(C), a modified layer 15 is formed at the interface between the second semiconductor substrate 20 and the bonding layer 11 using laser light LB transmitted through the second semiconductor substrate 20. The oxide layer 11a of the bonding layer 11 has a high absorption rate of laser light LB, and the modified layer 15 is formed at the interface between the second semiconductor substrate 20 and the oxide layer 11a. Alternatively, the modified layer 15 may also be formed inside the bonding layer 11.

[0033] Next, as shown in FIG4(D), starting from the modified layer 15 formed at the interface (or inside the bonding layer 11) between the second semiconductor substrate 20 and the bonding layer 11, the second semiconductor substrate 20 and the bonding layer 11 are peeled off. For example, the upper suction cup (not shown) holds the second semiconductor substrate 20, and the lower suction cup (not shown) holds the third semiconductor substrate 30. However, the arrangement of the second semiconductor substrate 20 and the third semiconductor substrate 30 can also be reversed. Next, as the upper suction cup rises relative to the lower suction cup, starting from the modified layer 15, the crack expands into a planar shape, and the second semiconductor substrate 20 and the bonding layer 11 are peeled off.

[0034] In addition, it can also be used as an alternative to the upward movement of the upper suction cup, or in addition to the upward movement of the upper suction cup, the downward movement of the lower suction cup can be implemented. Also, the rotation of the lower suction cup around the vertical axis can also be implemented.

[0035] Step S204, as shown in FIG4(E), includes the step of peeling the second semiconductor substrate 20 from the bonding layer 11 and removing the bonding layer 11. The bonding layer 11 is removed by CMP (Chemical Mechanical Polishing) or the like. As a result, the thinned first semiconductor substrate 10 is exposed to the surface of the stacked substrate T.

[0036] Furthermore, the bonding layer 11 may not be removed if it does not affect subsequent processes. Also, the bonding layer 11 is not removed when used as a getter layer as described later. The getter layer is a layer that captures impurities such as heavy metals.

[0037] Next, referring to FIGS. 5 and 6, a second example of the process following FIG. 1 will be described. The method for manufacturing the multilayer substrate is shown in FIG. 5, and includes steps S301 to S304. As shown in FIG. 6(A), step S301 includes the step of forming a first element layer 16 on the surface of the thinned first semiconductor substrate 10. The first element layer 16 includes, for example, a backside PDN (Power Delivery Network).

[0038] As shown in FIG6(B), step S302 includes bonding the first element layer 16 to the second element layer 31 formed on the third semiconductor substrate 30 face to face. The second element layer 31 is formed on the third semiconductor substrate 30 before bonding with the first element layer 16. The third semiconductor substrate 30 is, for example, a silicon wafer, and the second element layer 31 includes, for example, logic circuitry of a backside PDN. The first element layer 16 and the second element layer 31 constitute element layer 32.

[0039] Before bonding the first element layer 16 and the second element layer 31, the surfaces of the first element layer 16 and the second element layer 31 can be activated by plasma, etc., and can also be hydrophilized by the supply of water or water vapor. During bonding, hydrogen bonds are generated between the OH groups. In addition, covalent bonds can also be generated by the dehydration condensation reaction of hydrogen bonds.

[0040] Step S303 is similar to step S203 in FIG3, in which the second semiconductor substrate 20 is peeled off from the bonding layer 11. First, as shown in FIG6(C), a modifier layer 15 is formed at the interface between the second semiconductor substrate 20 and the bonding layer 11 using laser light LB transmitted through the second semiconductor substrate 20. Alternatively, the modifier layer 15 may also be formed inside the bonding layer 11. Next, as shown in FIG6(D), the second semiconductor substrate 20 and the bonding layer 11 are peeled off, starting from the modifier layer 15 formed at the interface between the second semiconductor substrate 20 and the bonding layer 11.

[0041] As shown in FIG6(E), in step S304, after the second semiconductor substrate 20 is peeled off from the bonding layer 11, a via 17 is formed between the bonding layer 11 and the first semiconductor substrate 10. The via 17 is a through electrode formed through the bonding layer 11 and the first semiconductor substrate 10. In addition, the formation of the via 17 (step S304) can also be performed before the formation of the first element layer 16 (step S301).

[0042] Next, referring to FIGS. 7 and 8, a third example of the process following FIG. 1 will be described. The method for manufacturing the multilayer substrate is shown in FIG. 7, and includes steps S401 to S404. As shown in FIG. 8(A), step S401 includes forming a via 18 on the thinned first semiconductor substrate 10 and forming a first element layer 16 on the surface of the first semiconductor substrate 10. The via 18 is a through electrode formed through the first semiconductor substrate 10. The first element layer 16 includes, for example, DRAM (Dynamic Random Access Memory). More specifically, DRAM may also be HBM (High Bandwidth Memory).

[0043] As shown in FIG8(B), step S402 includes a step of bonding the first element layer 16 to the carrier substrate 40 facing each other. The carrier substrate 40 is temporarily bonded to the first element layer 16 using, for example, an adhesive not shown in the figure. A glass substrate is used as the carrier substrate 40, for example.

[0044] Step S403 is similar to step S203 in FIG3, in which the second semiconductor substrate 20 is peeled off from the bonding layer 11. First, as shown in FIG8(C), a modifier layer 15 is formed at the interface between the second semiconductor substrate 20 and the bonding layer 11 using laser light LB transmitted through the second semiconductor substrate 20. Alternatively, the modifier layer 15 may also be formed inside the bonding layer 11. Next, as shown in FIG8(D), the second semiconductor substrate 20 and the bonding layer 11 are peeled off, starting from the modifier layer 15 formed at the interface between the second semiconductor substrate 20 and the bonding layer 11.

[0045] Step S404 includes peeling the second semiconductor substrate 20 from the bonding layer 11, forming a mask pattern on the surface of the bonding layer 11, and using the mask pattern to etch the bonding layer 11. The etching is, for example, dry etching. After etching the bonding layer 11, the mask pattern is removed. As a result, as shown in FIG8(E), the via 18 is exposed.

[0046] Next, referring to FIGS. 9-11, an example of the process following FIG. 3 will be described. As shown in FIG. 9, the method for manufacturing the multilayer substrate includes steps S501-S504. The multilayer substrate T shown in FIG. 10(A) is obtained by the process shown in FIG. 3. The multilayer substrate T sequentially has a first semiconductor substrate 10, a device layer 32, a release layer 35, and a third semiconductor substrate 30. The release layer 35 may also include an oxide layer, similar to the bonding layer 11. Furthermore, the release layer 35 may also include a nitride layer. A modified layer 15 may also be formed on the nitride layer. Furthermore, the release layer 35 may also have a multiple-layer structure. Furthermore, the multilayer substrate T may also have a bonding layer 11 with a gettering layer function on the surface of the first semiconductor substrate 10 opposite to the device layer 32.

[0047] As described above, component layer 32 may also include a first component layer 16 and a second component layer 31. The first component layer 16 includes, for example, a semiconductor memory. The second component layer 31 includes, for example, peripheral circuitry (also called "peripheral devices") of the semiconductor memory or input / output circuitry (also called "IO") of the semiconductor memory.

[0048] As shown in FIG10(B), step S501 includes the step of forming a die attach film (DAF) 33 on the surface of the bonding layer 11 (or the first semiconductor substrate 10 when there is no bonding layer 11). The die attach film 33 is a die bonding adhesive. The die attach film 33 is used for the stacking of semiconductor wafers, etc. The die attach film 33 may have either conductivity or insulation. The die attach film 33 is obtained by coating a liquid material and then drying it.

[0049] As shown in FIG10(C), step S502 includes the step of cutting the bonding layer 11, the first semiconductor substrate 10, the device layer 32, and the release layer 35. A trench 19 is formed through the bonding layer 11, the first semiconductor substrate 10, the device layer 32, and the release layer 35. When a die-bonding film 33 is pre-formed on the bonding layer 11, the die-bonding film 33 is also cut, and the trench 19 is also formed through the die-bonding film 33. The cutting method is, for example, laser cutting or blade cutting.

[0050] Laser cutting includes the step of using laser light LB2 to perform an etching process. The die-bonding thin film 33, bonding layer 11, first semiconductor substrate 10, element layer 32 and release layer 35 are heated by absorbing laser light LB2, and sublimate or evaporate. As a result, a trench 19 is formed.

[0051] The control unit can also change the energy of the laser beam LB2 when cutting the first semiconductor substrate 10 and when cutting the element layer 32 and the release layer 35. For example, when processing the first semiconductor substrate 10, an energy level that can process silicon is set. On the other hand, when processing the element layer 32 and the release layer 35, an energy level that can process the conductive film and the oxide film, but cannot process silicon is set. Damage to the third semiconductor substrate 30 can be prevented when processing the element layer 32 and the release layer 35.

[0052] As shown in FIG11(A), step S503 includes attaching the multilayer substrate T to the adhesive tape 51 disposed on the opposite side of the third semiconductor substrate 30, and mounting the adhesive tape 51 onto the frame 52. The frame 52 is formed into a ring shape, and the adhesive tape 51 is attached to the frame 52 to cover the opening of the frame 52.

[0053] A die-bonding film 33 is disposed between the bonding layer 11 (or the first semiconductor substrate 10 if there is no bonding layer 11) and the adhesive tape 51. Furthermore, in this embodiment, the die-bonding film 33 may be pre-formed on the bonding layer 11, or it may be pre-attached to the surface of the adhesive tape 51. In the latter case, steps S503 and S501 are performed simultaneously. In this case, the cutting of the die-bonding film 33 may also be performed after step S504, which will be described later.

[0054] Step S504 is similar to step S203 in FIG3, where the third semiconductor substrate 30 is peeled off from the release layer 35. First, as shown in FIG11(B), a modifier layer 15 is formed at the interface between the third semiconductor substrate 30 and the release layer 35 using laser light LB transmitted through the third semiconductor substrate 30. The modifier layer 15 may also be formed inside the release layer 35. Next, as shown in FIG11(C), the third semiconductor substrate 30 and the release layer 35 are peeled off, starting from the modifier layer 15 formed at the interface between the third semiconductor substrate 30 and the release layer 35. After peeling, adhesive tape 51 can be used to prevent the semiconductor wafers from scattering. The semiconductor wafers are then picked up one by one.

[0055] After the third semiconductor substrate 30 and the release layer 35 are peeled off, the bonding layer 11 remains on the surface of the first semiconductor substrate 10. The remaining bonding layer 11 is used as a getter layer to capture impurities such as heavy metals. Therefore, there is no need for a process to form a getter layer.

[0056] Conventionally, a device layer 32 is formed on the surface of a thick first semiconductor substrate 10. The device layer 32 is cut with a blade, and then a protective tape is attached to the device layer 32. After that, the first semiconductor substrate 10 is ground to thin it. The blade cuts the device layer 32 completely and cuts the first semiconductor substrate 10 in half. Then, the first semiconductor substrate 10 is divided by grinding from the opposite side of the device layer 32 to obtain a plurality of semiconductor wafers. Then, the steps of forming a getter layer on the ground surface of the first semiconductor substrate 10, placing tape 51 on the opposite side of the protective tape through the first semiconductor substrate 10, mounting the first semiconductor substrate 10 to the frame 52 by the tape 51, and removing the protective tape are performed.

[0057] According to this embodiment, the first semiconductor substrate 10 is thinned before the element layer 32 is formed (see Figure 4). (1) Since the first semiconductor substrate 10 is not ground after the element layer 32 is formed as in the past, damage to the element layer 32 and the first semiconductor substrate 10 can be suppressed. In addition, according to this embodiment, the element layer 32 and the first semiconductor substrate 10 are cut to obtain a plurality of semiconductor wafers. Next, the first semiconductor substrate 10 is mounted on the frame 52 by means of adhesive tape 51 disposed on the opposite side of the third semiconductor substrate 30. Then, the third semiconductor substrate 30 is removed by laser peeling. The third semiconductor substrate 30 is harder than the conventional protective tape. (2) Until the third semiconductor substrate 30 is removed, the semiconductor wafer can be reinforced by the third semiconductor substrate 30, thereby suppressing damage to the semiconductor wafer. (3) Unlike the past, the application and removal of protective tape is not required. (4) The bonding layer 11 remaining after the removal of the third semiconductor substrate 30 can be used as a getter layer without the need for a getter layer formation process. As explained above, the productivity of semiconductor wafers can be improved according to this embodiment.

[0058] Furthermore, in this embodiment, as shown in FIG10(A), a bonding layer 11 is formed on the stacked substrate T of the first semiconductor substrate 10, and the bonding layer 11 may also be formed on the second semiconductor substrate 20. At this time, the effects of (1) to (4) above can also be obtained, thereby improving the productivity of semiconductor wafers. In addition, as shown in FIG10(A), when the bonding layer 11 is formed on the stacked substrate T of the first semiconductor substrate 10, (5) the second semiconductor substrate 20 and the bonding layer 11 can be easily peeled off.

[0059] Next, referring to FIG12 and the like, the substrate processing apparatus 100 that performs step S103 of FIG1 will be described. The substrate processing apparatus 100 includes a loading and unloading section 101, a transport section 110, a laser processing section 120, a dividing section 130, and a control section 140.

[0060] The loading / unloading section 101 has a loading section 102 for loading cartridges C. The cartridges C house a plurality of laminated substrates T as shown in FIG2(A). The laminated substrates T include a first semiconductor substrate 10, a second semiconductor substrate 20, and a bonding layer 11 for bonding the first semiconductor substrate 10 and the second semiconductor substrate 10. Furthermore, the number of loading sections 102 and the number of cartridges C are not limited to the number shown in FIG12.

[0061] The transport unit 110 is disposed next to the transport-in / transport unit 101, the laser processing unit 120, and the dividing unit 130, and transports the laminated substrate T thereon. The transport unit 110 has a transport arm 111 for holding the laminated substrate T. The transport arm 111 is capable of moving in the horizontal direction (both the X-axis and Y-axis directions) and the vertical direction, and rotating about the vertical axis.

[0062] As shown in FIG2(B), the laser processing unit 120 forms a modified layer 15 on a predetermined dividing surface that will divide the multilayer substrate T in the thickness direction using laser light LB. The laser processing unit 120 includes, for example, a stage 121 for holding the multilayer substrate T, and an optical system 122 for irradiating the multilayer substrate T held on the stage 121 with laser light LB. The stage 121 is, for example, an XYθ stage or an XYZθ stage. The optical system 122 includes, for example, a condenser lens. The condenser lens focuses the laser light LB onto the multilayer substrate T. The optical system 122 may also include a galvanometer-type scanner.

[0063] As shown in FIG2(C), the dividing portion 130 divides the stacked substrate T starting from the modified layer 15 formed on the predetermined dividing surface. The dividing portion 130 includes, for example, an upper suction cup 131 and a lower suction cup 132. The upper suction cup 131 holds the first semiconductor substrate 10, and the lower suction cup 132 holds the second semiconductor substrate 20. However, the arrangement of the first semiconductor substrate 10 and the second semiconductor substrate 20 can also be reversed. Then, when the upper suction cup 131 rises relative to the lower suction cup 132, the crack expands into a planar shape starting from the modified layer 15, and the stacked substrate T is divided equally on the first predetermined dividing surface 12. In addition, the rising of the upper suction cup 131 can also be used as an alternative, or the lower suction cup 132 can be lowered in addition to the rising of the upper suction cup 131. Also, the rotation of the lower suction cup 132 about the vertical axis can also be implemented.

[0064] The control unit 140 is, for example, a computer, as shown in FIG12, and includes a CPU (Central Processing Unit) 141 and a memory medium 142 such as memory. The memory medium 142 stores programs that control various processes executed on the board processing device 100. The control unit 140 controls the operation of the board processing device 100 by having the CPU 141 execute the programs stored in the memory medium 142.

[0065] The control unit 140 sets the predetermined dividing surface inside the first semiconductor substrate 10. The control unit 140 forms a modified layer 15 on the first predetermined dividing surface 12, and divides the first semiconductor substrate 10 starting from the formed modified layer 15, thereby thinning the first semiconductor substrate 10 which is bonded to the second semiconductor substrate 20 by the bonding layer 11.

[0066] In addition, the substrate processing apparatus 100 shown in FIG12 can also be used in addition to step S103 in FIG1. ​​For example, it can also be used in step S203 in FIG3, step S303 in FIG5, step S403 in FIG7, and step S504 in FIG9.

[0067] When implementing step S203 of FIG. 3 or step S303 of FIG. 5, the control unit 140 sets the predetermined dividing surface at the interface between the second semiconductor substrate 20 and the bonding layer 11, and peels the second semiconductor substrate 20 from the bonding layer 11, starting from the modified layer 15 formed at the interface. At this time, the upper suction cup 131 of the dividing unit 130 holds the second semiconductor substrate 20, and the lower suction cup 132 holds the third semiconductor substrate 30. The modified layer 15 may also be formed inside the bonding layer 11.

[0068] When implementing step S403 of FIG7, the control unit 140 sets the predetermined dividing surface at the interface between the second semiconductor substrate 20 and the bonding layer 11, and peels the second semiconductor substrate 20 and the bonding layer 11 starting from the modified layer 15 formed at the interface. At this time, the upper suction cup 131 of the dividing unit 130 holds the second semiconductor substrate 20, and the lower suction cup 132 holds the carrier substrate 40.

[0069] When performing step S504 of FIG. 9, the control unit 140 sets the predetermined dividing surface at the interface between the third semiconductor substrate 30 and the release layer 35, and peels the third semiconductor substrate 30 and the release layer 35 starting from the modified layer 15 formed at the interface. At this time, the upper suction cup 131 of the dividing unit 130 holds the third semiconductor substrate 30, and the lower suction cup 132 holds the adhesive tape 51. The modified layer 15 may also be formed inside the release layer 35. Furthermore, the transport arm 111 of the transport unit 110 holds the stacked substrate T by holding the frame 52 shown in FIG. 11.

[0070] The above describes the manufacturing method of the multilayer substrate and the embodiment of the substrate processing apparatus of the present invention. The present invention is not limited to the above-described embodiments. Various changes, modifications, substitutions, additions, deletions, and combinations can be made within the scope of the claims. Such modifications and additions are naturally within the technical scope of the present invention. [Simplified Explanation of the Diagram]

[0009] Figure 1 is a flowchart showing a manufacturing method of a multilayer substrate according to an embodiment. Figure 2(A) is a cross-sectional view showing an example of S102, Figure 2(B) is a cross-sectional view showing an example of S103, and Figure 2(C) is a cross-sectional view showing an example of S103, continuing from Figure 2(B). Figure 3 is a flowchart showing the first example of the process following Figure 1. Figure 4(A) is a cross-sectional view showing an example of S201, Figure 4(B) is a cross-sectional view showing an example of S202, Figure 4(C) is a cross-sectional view showing an example of S203, Figure 4(D) is a cross-sectional view showing an example of S203, continuing from Figure 4(C), and Figure 4(E) is a cross-sectional view showing an example of S204. Figure 5 is a flowchart showing the second example of the process following Figure 1. Figure 6(A) is a cross-sectional view showing an example of S301; Figure 6(B) is a cross-sectional view showing an example of S302; Figure 6(C) is a cross-sectional view showing an example of S303; Figure 6(D) is a cross-sectional view showing an example of S303, continuing from Figure 6(C); Figure 6(E) is a cross-sectional view showing an example of S304. Figure 7 is a flowchart showing the third example of the process following Figure 1. Figure 8(A) is a cross-sectional view showing an example of S401; Figure 8(B) is a cross-sectional view showing an example of S402; Figure 8(C) is a cross-sectional view showing an example of S403; Figure 8(D) is a cross-sectional view showing an example of S403, continuing from Figure 8(C); Figure 8(E) is a cross-sectional view showing an example of S404. Figure 9 is a flowchart showing an example of the process following Figure 3. Figure 10(A) is a cross-sectional view showing an example of a multilayer substrate prepared before S501; Figure 10(B) is a cross-sectional view showing an example of S501; Figure 10(C) is a cross-sectional view showing an example of S502. Figure 11(A) is a cross-sectional view showing an example of S503; Figure 11(B) is a cross-sectional view showing an example of S504; Figure 11(C) continues from Figure 11(B) and shows an example of S504. Figure 12 is a plan view showing a substrate processing apparatus according to an embodiment.

Claims

1. A method for manufacturing a multilayer substrate, comprising the following steps: forming a bonding layer including an oxide layer on the surface of a first semiconductor substrate; contacting the oxide layer of the bonding layer with a second semiconductor substrate, and bonding the first semiconductor substrate and the second semiconductor substrate through the bonding layer; after bonding, forming a modified layer on a predetermined first slitting surface that is intended to divide the first semiconductor substrate in the thickness direction using laser light; and thinning the first semiconductor substrate by dividing the first semiconductor substrate starting from the modified layer formed on the predetermined first slitting surface, thereby bonding the first semiconductor substrate to the second semiconductor substrate through the bonding layer; wherein the oxide layer of the bonding layer is a thermal oxide layer formed by thermal oxidation of the surface of the first semiconductor substrate.

2. The method for manufacturing a multilayer substrate as claimed in claim 1 further includes the following steps: forming a modified layer on an annular second predetermined dividing surface disposed around the periphery of the first predetermined dividing surface using laser light; and dividing the first semiconductor substrate by dividing the modified layer formed on the first predetermined dividing surface and the second predetermined dividing surface, thereby thinning the first semiconductor substrate bonded to the second semiconductor substrate by the bonding layer, while removing the bevel of the first semiconductor substrate.

3. A method for manufacturing a multilayer substrate as claimed in claim 1 or 2, wherein, The first semiconductor substrate and the second semiconductor substrate are silicon wafers, and the oxide layer of the bonding layer is a silicon oxide layer.

4. The method for manufacturing a multilayer substrate as claimed in claim 1 or 2 further includes the following steps: forming a first element layer on the surface of the thinned first semiconductor substrate; after forming the first element layer, forming a modifier layer at the interface between the second semiconductor substrate and the bonding layer or inside the bonding layer using laser light transmitted through the second semiconductor substrate; and peeling the second semiconductor substrate from the bonding layer, starting from the modifier layer formed at the interface between the second semiconductor substrate and the bonding layer or inside the bonding layer.

5. A method for manufacturing a multilayer substrate, comprising the following steps: preparing a multilayer substrate obtained by the following steps, the steps comprising: forming a bonding layer including an oxide layer on the surface of a first semiconductor substrate; contacting the oxide layer of the bonding layer with a second semiconductor substrate, and bonding the first semiconductor substrate and the second semiconductor substrate by means of the bonding layer; after bonding, forming a modification layer on a predetermined first slitting surface that is intended to slit the first semiconductor substrate in the thickness direction using laser light; and thinning the first semiconductor substrate bonded to the second semiconductor substrate by slitting the first semiconductor substrate starting from the modification layer formed on the predetermined first slitting surface; and forming a first element layer on the surface of the thinned first semiconductor substrate; After the first element layer is formed, a modified layer is formed at the interface between the second semiconductor substrate and the bonding layer or inside the bonding layer using laser light transmitted through the second semiconductor substrate; and the second semiconductor substrate is peeled off from the bonding layer, starting from the modified layer formed at the interface between the second semiconductor substrate and the bonding layer or inside the bonding layer.

6. The method for manufacturing a multilayer substrate as claimed in claim 5 further includes the following steps: after the formation of the first element layer, before forming a modified layer at the interface between the second semiconductor substrate and the bonding layer or inside the bonding layer, the first element layer and the second element layer formed on the third semiconductor substrate are bonded face to face.

7. The method for manufacturing a multilayer substrate as claimed in claim 6 further includes the following steps: peeling the second semiconductor substrate from the bonding layer and removing the bonding layer.

8. The method for manufacturing a multilayer substrate as claimed in claim 6 further includes the following steps: forming a via in the bonding layer and the first semiconductor substrate after the second semiconductor substrate is peeled off from the bonding layer, or before the first element layer is formed.

9. The method for manufacturing a multilayer substrate as claimed in claim 5 further includes the following steps: after forming the first element layer, before forming a modified layer at the interface between the second semiconductor substrate and the bonding layer or inside the bonding layer, the first element layer is bonded to the carrier substrate facing each other.

10. The method for manufacturing a multilayer substrate as claimed in claim 9 further includes the following steps: after peeling the second semiconductor substrate from the bonding layer, forming a mask pattern on the surface of the bonding layer, and etching the bonding layer using the mask pattern.

11. A method for manufacturing a multilayer substrate as described in claim 6 or 7, wherein, A release layer is formed between the third semiconductor substrate and the second element layer; the manufacturing method of the stacked substrate further includes the following steps: after peeling the second semiconductor substrate from the bonding layer, cutting the first semiconductor substrate, the first element layer, the second element layer and the release layer; after cutting, mounting the first semiconductor substrate onto a frame using adhesive tape disposed on the opposite side of the third semiconductor substrate; after mounting the first semiconductor substrate onto the frame, irradiating the release layer with laser light transmitted through the third semiconductor substrate, thereby forming a modified layer at the interface between the third semiconductor substrate and the release layer or inside the release layer; and peeling the third semiconductor substrate from the release layer starting from the modified layer formed at the interface between the third semiconductor substrate and the release layer or inside the release layer.

12. A substrate processing apparatus comprising: a transport unit for transporting a stacked substrate, the stacked substrate including a first semiconductor substrate, a bonding layer formed on the surface of the first semiconductor substrate, and a second semiconductor substrate bonded to the first semiconductor substrate by the bonding layer, the bonding layer including an oxide layer contacting the second semiconductor substrate; a laser processing unit for forming a modified layer on a predetermined first slitting surface that is intended to slit the stacked substrate in the thickness direction using laser light; a slitting unit for slitting the stacked substrate starting from the modified layer formed on the predetermined first slitting surface; and a control unit for controlling the transport unit, the laser processing unit, and the slitting unit; wherein the control unit sets the predetermined first slitting surface inside the first semiconductor substrate, forms a modified layer on the predetermined first slitting surface, and slits the first semiconductor substrate starting from the formed modified layer, thereby thinning the first semiconductor substrate bonded to the second semiconductor substrate by the bonding layer; The oxide layer of the bonding layer is a thermal oxide layer formed by thermally oxidizing the surface of the first semiconductor substrate.

13. The substrate processing apparatus as claimed in claim 12, wherein, The control unit performs the following operations: forming a modified layer on a ring-shaped second predetermined dividing surface set around the first predetermined dividing surface using laser light; and dividing the first semiconductor substrate by starting from the modified layer formed on the first predetermined dividing surface and the second predetermined dividing surface, thereby thinning the first semiconductor substrate bonded to the second semiconductor substrate by the bonding layer, while removing the bevel of the first semiconductor substrate.

14. The substrate processing apparatus as described in claim 12 or 13, wherein, The first semiconductor substrate and the second semiconductor substrate are silicon wafers, and the oxide layer of the bonding layer is a silicon oxide layer.

Images