Semiconductor device, method of manufacturing the same and method of transmitting information

Abstract

An optical medium for transmitting and receiving signals from an external source, such as an optical fiber. The optical medium receives signals, routes signals to various attached components, and converts signals between optical and electronic signals when needed. The various attached components may include memory devices (such as high-bandwidth memory), processing elements (such as processing units), combinations thereof, or the like.

Description

Semiconductor device, manufacturing method thereof, and information transmission method Embodiments of the present invention relate to semiconductor devices, and more particularly, to optical interposers. Electronic signal processing is a technology used for signal transmission and processing. In recent years, optical signal processing has been used in an increasing number of applications, especially those related to the use of optical fiber for signal transmission. Optical signal processing and processing are often combined with electronic signal processing and processing to provide comprehensive applications. For example, optical fiber can be used for long-distance signal transmission, while electronic signals can be used for short-distance signal transmission, processing, and control. This results in devices that integrate long-distance optical components with short-distance electronic components for conversion between optical and electronic signals, as well as processing of both. A package can therefore include both an optical (photonic) die with optical devices and an electronic die with electronic devices. An embodiment of the present invention provides a method for manufacturing a semiconductor device, comprising receiving a photonic medium, the photonic medium comprising at least one optical input; and a plurality of electronic external connections; bonding a first semiconductor device to a first set of electronic external connections; bonding a second semiconductor device to a second set of electronic external connections; and bonding a first input / output semiconductor device to a third set of electronic external connections, wherein the first input / output semiconductor device is operably connected to both the first semiconductor device and the second semiconductor device through at least one first optical element. An embodiment of the present invention provides a method for transmitting information, comprising receiving a first optical signal in an optical medium; converting the first optical signal into a first electronic signal in the optical medium; transmitting the first electronic signal to a first input / output die; transmitting a second electronic signal from the first input / output die to the optical medium; converting the second electronic signal into a second optical signal; and routing the second optical signal to a region below a first semiconductor device. An embodiment of the present invention provides a semiconductor device comprising an optical intermediary; a first electronic integrated circuit die electrically connected to the optical intermediary; a second electronic integrated circuit die electrically connected to the optical intermediary; and a first input / output device electrically connected to the optical intermediary. The following disclosure provides many embodiments or examples for implementing different elements of the subject matter provided. Specific examples of each element and its configuration are described below to simplify the description of the embodiments of the present invention. Of course, these are merely examples and are not intended to limit the embodiments of the present invention. For example, if the description refers to a first element formed on a second element, it may include an embodiment in which the first and second elements are in direct contact, and it may also include an embodiment in which an additional element is formed between the first and second elements so that they are not in direct contact. In addition, the embodiments of the present invention may repeat reference numbers and / or letters in various examples. Such repetition is for the purpose of simplicity and clarity, and is not intended to indicate the relationship between the different embodiments and / or configurations discussed. Furthermore, spatially relative terms such as "below," "beneath," "lower," "above," "upper," and similar terms may be used to facilitate describing the relationship between one component or feature and another component or feature in the drawings. Spatially relative terms are intended to encompass different orientations of the device in use or operation, as well as the orientations depicted in the drawings. When the device is rotated 90 degrees or otherwise, the spatially relative adjectives used herein will be interpreted based on the resulting orientation. The present disclosure will now be described with respect to specific embodiments in which a photonic intermediary is used to provide an inter / intra optical engine (OE) that provides optical and electrical interconnections between multiple semiconductor devices. However, the present disclosure is not intended to limit these concepts, as these concepts may be implemented in any suitable embodiment, and all such embodiments are fully intended to be within the scope of these concepts. 1 , the formation of an optical interposer 100 is illustrated, according to some embodiments. In the specific embodiment illustrated in FIG1 , the optical interposer 100 in a photonic integrated circuit (PIC) includes a first substrate 101, an insulator layer 103, a first active layer 105 of an optical element, a first metallization layer 107, a second active layer 109 of the optical element, a first bonding layer 111, first bonding pads 112 (e.g., for external electrical connections), through-substrate vias 113, contact pads 115, and a first external connector 117. In one embodiment, the optical interposer 100, the first substrate 101, the insulator layer 103, and the first active layer 105 of the optical element may collectively be part of a silicon-on-insulator (SOI) substrate at the beginning of the fabrication process. Referring first to the first substrate 101, the first substrate 101 may be a semiconductor material such as silicon or germanium, a dielectric material such as glass, or any suitable material that allows structural support for devices thereon and also allows interconnections to be formed between the sides of the first substrate 101 (as further described below). The insulator layer 103 may be a dielectric layer separating the first substrate 101 from the first active layer 105 thereover, and may additionally serve as part of a cladding material surrounding subsequently fabricated optical elements (discussed further below). In one embodiment, the insulator layer 103 may be silicon oxide, silicon nitride, germanium oxide, germanium nitride, combinations thereof, or the like, formed using a method such as implantation (e.g., to form a buried oxide (BOX) layer), or may be deposited onto the first substrate 101 using a deposition method such as chemical vapor deposition (CVD), atomic layer deposition (ALD), physical vapor deposition (PVD), combinations thereof, or the like. However, any suitable material and fabrication method may be used. The material used for the first active layer 105 is initially (before patterning) a conformal layer of the material of the first active layer 105 that will be used to fabricate the optical element. In some embodiments, the material of the first active layer 105 can be a translucent material that can serve as the core material of the desired optical element, such as a semiconductor material, such as silicon, germanium, silicon nitride, combinations thereof, or the like. In embodiments where the material for the first active layer 105 is deposited, the material for the first active layer 105 can be deposited using methods such as epitaxial growth, chemical vapor deposition, atomic layer deposition, physical vapor deposition, combinations thereof, or the like. In other embodiments where an implantation method is used to form the insulator layer 103, the material for the first active layer 105 can be part of the first substrate 101 prior to the implantation process to form the insulating layer 103. However, any suitable material and fabrication method can be used to form the material of the first active layer 105. Once the material for the first active layer 105 is prepared, the optical elements of the first active layer 105 are fabricated using the material of the first active layer 105. In one embodiment, the optical elements of the first active layer 105 may include, for example, optical waveguides (e.g., ridge waveguides, rib waveguides, buried channel waveguides, diffused waveguides, etc.), couplers (e.g., grating couplers, edge couplers, etc.), optical switches (e.g., Mach-Zehnder silicon photonic switches, microelectromechanical switches, micro-ring resonators, etc.), amplifiers, multiplexers, demultiplexers, optical-to-electrical converters (e.g., PN junctions), electro-optical converters, lasers, combinations thereof, or the like. However, any suitable optical element may be used. To form the optically shaped first active layer 105 from an initial material, the material of the first active layer 105 can be patterned into the desired shape of the first active layer 105 of the optical element. In one embodiment, the material of the first active layer 105 can be patterned using, for example, a photolithographic mask and an etching process. However, any suitable method can be used to pattern the material of the first active layer 105. For some optical components, such as waveguides or edge couplers, the patterning process can be the fabrication of all or at least a substantial portion of these components. Additionally, for components that utilize further fabrication processes, such as Mach-Zehnder silicon photonic switches utilizing resistive heating elements, additional processes can be performed before or after patterning of the material of the first active layer 105. For example, implantation processes of different materials (e.g., resistive heating elements), additional depositions, and patterning processes, combinations of all of the above, or similar processes can be used to aid in further fabrication of various desired optical components. All such fabrication processes and all suitable optical components can be used for fabrication, and all such combinations are fully intended to be within the scope of the embodiments. Once the optical element of the first active layer 105 is fabricated, a first metallization layer 107 is formed to electrically connect the first active layer 105 of the optical element to control circuitry, to each other, and to subsequently attached devices (not shown in FIG. 1 , but further shown and described below with reference to FIG. 2A and FIG. 2B ). In one embodiment, the first metallization layer 107 is formed from alternating layers of dielectric and conductive material and can be formed by any suitable process (e.g., deposition, damascene, dual damascene, etc.). In certain embodiments, multiple metallization layers may be present to interconnect the various optical elements, but the precise number of first metallization layers 107 depends on the design of the optical medium 100. After forming the first metallization layer 107, a second active layer 109 of optical elements is formed. In one embodiment, the optical elements of the second active layer 109 may include elements such as couplers (e.g., edge couplers, grating couplers, etc.) for connecting to external signals (not shown in FIG. 1, but further illustrated and described below with reference to FIG. 2A and FIG. 2B), optical waveguides (e.g., ridge waveguides, rib waveguides, buried channel waveguides, diffused waveguides, etc.), optical switches (e.g., Mach-Zehnder silicon photonic switches, microelectromechanical switches, microring resonators, etc.), amplifiers, multiplexers, demultiplexers, optical-to-electrical converters (e.g., PN junctions), electro-optical converters, lasers, combinations thereof, or the like. However, any suitable optical element may be used. In one embodiment, the second active layer 109 of the optical device can be formed by first depositing a material for the second active layer 109 on the first metallization layer 107. In one embodiment, the material for the second active layer 109 can be a dielectric material, such as silicon nitride, silicon oxide, combinations thereof, or the like, deposited using a deposition method such as chemical vapor deposition, atomic layer deposition, physical vapor deposition, combinations thereof, or the like. However, any suitable material and any suitable deposition method may be used. Once the material of the second active layer 109 has been deposited or otherwise formed, it can be patterned into the desired shape for the desired optical element. In one embodiment, the material of the second active layer 109 can be patterned using, for example, a photolithographic mask and etching process. However, any suitable method for patterning the material of the second active layer 109 can be used. For some optical components, such as waveguides or edge couplers, the patterning process can be used to form all or at least a portion of the fabrication of these components. In addition, for those components that use further fabrication processes, such as Mach-Zehnder silicon photonic switches that use resistive heating elements, additional processes can be performed before or after the patterning of the material of the second active layer 109. For example, implantation processes of different materials (e.g., resistive heating elements), additional deposition, and patterning processes, combinations of all of the above processes, or similar processes can be used to help further fabricate various desired optical components. All such fabrication processes and all suitable optical components can be used for fabrication, and all such combinations are fully intended to be included within the scope of the embodiments. Once the optical elements of the second active layer 109 are fabricated, a first bonding layer 111 is formed over the optical elements of the second active layer 109. In embodiments, the first bonding layer 111 can be used for fusion bonding (also known as oxide-to-oxide bonding) or as part of a hybrid bonding process (further described below with reference to FIG. 2A and FIG. 2B ). According to some embodiments, the first bonding layer 111 is formed from a silicon-containing dielectric material, such as silicon oxide, silicon nitride, or the like. The first bonding layer 111 can be deposited using any suitable method, such as CVD, high-density plasma chemical vapor deposition (HDPCVD), PVD, atomic layer deposition (ALD), or the like, to a thickness ranging from approximately 0.65 μm to approximately 6 μm, such as approximately 5.5 μm. However, any suitable material, deposition process, and thickness may be used. Once the first bonding layer 111 is formed, a plurality of first openings are formed in the first bonding layer 111 to expose the conductive portions of the underlying film layers in preparation for forming bond pad vias. A plurality of second openings are also formed in the first bonding layer 111, with portions of the openings widened in preparation for forming first bonding pads 112 within the first bonding layer 111. Once the first and second openings are formed within the first bonding layer 111, they can be filled with a seed layer and a metal plate to form bond pad vias and first bonding pads 112 within the first bonding layer 111. The seed layer can be deposited blanketing the top surface of the first bonding layer 111, the exposed conductive portions of the underlying film layers, and the sidewalls of the first and second openings. The seed layer can include a copper layer. Depending on the desired material, the seed layer can be deposited using processes such as sputtering, evaporation, plasma enhanced chemical vapor deposition (PECVD), or similar processes. The metal plate can be deposited over the seed layer using an electroplating process such as electroplating or electroless plating. The metal plate can include copper, a copper alloy, or the like. The metal plate can also be a filler material. Before forming the seed layer, a barrier layer (not separately shown) can be blanket deposited over the top surface of the first bonding layer 111 and over the sidewalls of the first and second openings. The barrier layer can include titanium, titanium nitride, tantalum, tantalum nitride, or the like. After filling the first opening and the second opening, a planarization process such as chemical mechanical polishing (CMP) is performed to remove excess portions of the seed layer and the metal plate, thereby forming a bonding pad via and a first bonding pad 112 within the first bonding layer 111. In some embodiments, the bonding pad via is used to connect the first bonding pad 112 to an underlying conductive portion, and to connect the first bonding pad 112 to the first active layer 105 through the underlying conductive portion. The optical medium 100 also includes a plurality of through-substrate vias (TSVs) 113 extending through the first substrate 101 to provide fast access for power, data, and ground through the first substrate 101. In one embodiment, the TSVs 113 can be formed by first forming through-silicon via openings in one or more of the first substrate 101, the insulating layer 103, and the first metallization layer 107 (depending on when the TSVs 113 are formed during the manufacturing process). The TSV openings can be formed by applying and developing a suitable photoresist (not shown) and removing portions of the first substrate 101, the insulating layer 103, and the first metallization layer 107 to expose portions to a desired depth. The TSV openings can be formed to extend into the first substrate 101 to a depth greater than the desired final height of the first substrate 101. Once the through-substrate via openings are formed within the first substrate 101, a liner can be formed within the through-substrate via openings. The liner can be, for example, an oxide or silicon nitride formed from tetraethylorthosilicate (TEOS), but any suitable dielectric material can alternatively be used. The liner can be formed using a plasma-enhanced chemical vapor deposition (PECVD) process, but other suitable processes such as physical vapor deposition or thermal processes can alternatively be used. Furthermore, the liner can be formed to a thickness ranging from about 0.1 μm to about 5 μm, such as about 1 μm. Once the liner is formed along the sidewalls and bottom of the TSV opening, a barrier layer (also not separately shown) can be formed, and the remaining portion of the TSV opening can be filled with a first conductive material. The first conductive material can include copper, but other suitable materials such as aluminum, alloys, doped polysilicon, combinations thereof, and the like can alternatively be used. The first conductive material can be formed by electroplating copper onto a seed layer (not shown), filling, and overfilling the TSV opening. Once the TSV opening is filled, the excess liner, barrier layer, seed layer, and first conductive material outside the TSV opening can be removed by a planarization process such as chemical mechanical polishing (CMP), but any suitable removal process can be used. Once the TSV openings are filled, the first substrate 101 can be thinned to expose the TSVs 113. In one embodiment, thinning the first substrate 101 can be performed using a planarization process such as chemical mechanical planarization, in which an etchant and an abrasive are used with a grinding wheel to react and grind away material until a planar surface is formed and the TSVs 113 are exposed. However, any other suitable method, such as a series of one or more etching processes, can also be used to expose the TSVs 113. Contact pads 115 may be formed above and in electrical contact with through-substrate vias 113. Contact pads 115 may comprise aluminum, although other materials, such as copper, may also be used. Contact pads 115 may be formed using a deposition process, such as sputtering, to form a material layer (not shown). Portions of the material layer may then be removed using a suitable process, such as photolithography masking and etching, to form contact pads 115. However, any other suitable process, such as electroplating, may also be used. First external connector 117 can be formed to provide multiple conductive areas for contact between contact pad 115 and another external device (e.g., a printed circuit board (PCB) (not shown separately). First external connector 117 can be a conductive bump (e.g., a ball grid array, microbumps, etc.) or a conductive post using a material such as solder and copper. In embodiments where first external connector 117 contacts a bump, first external connector 117 can comprise a material such as tin, or other suitable materials such as silver, lead-free tin, or copper. In embodiments where first external connector 117 is a tin solder bump, first external connector 117 can be formed with a tin layer having a thickness of approximately 20 μm by conventional methods such as evaporation, electroplating, printing, solder transfer, or solder ball placement. Once the tin layer is formed on the structure, reflow can be performed to shape the material into the desired bump shape. Figures 2A and 2B respectively illustrate a cross-sectional view and a top view of a first semiconductor device 201, a second semiconductor device 203, and a third semiconductor device 205 after being bonded to an optical intermediary 100. Figure 2A illustrates a cross-sectional view taken along line AA' in Figure 2B. In some embodiments, the first semiconductor device 201 is an electronic integrated circuit (EIC) (device without optical devices), such as a stacked device comprising multiple interconnected semiconductor substrates. For example, the integrated circuit die 50 may be a high-bandwidth memory (HBM) module, a hybrid memory cube (HMC) module, or a similar memory device comprising multiple stacked memory dies. In such an embodiment, the first semiconductor device 201 includes a plurality of semiconductor substrates 212 interconnected by second through-substrate vias (TSVs) 214. For simplicity, FIG. 2A illustrates this structure for the bottom die within the module, but does not separately illustrate the structure for the other dies. Each semiconductor substrate 212 may or may not have an active device layer 216 and an interconnect structure 218 thereover, a second bonding layer 220 (similar to the first bonding layer 111), and associated second bonding pads 222 (similar to the first bonding pads 112). Of course, while the first semiconductor device 201 is an HBM module in the embodiments, the embodiments are not limited to such an HBM module. Rather, the first semiconductor device 201 may be any suitable semiconductor device, such as a processor die or other type of functional die. In particular embodiments, the first semiconductor device 201 may be a processing unit (xPU), a logic die, a three-dimensional integrated circuit (3DIC) die, a central processing unit (CPU), a graphics processing unit (GPU), a system-on-a-chip (SoC) die, a micro-electromechanical system (MEMS) die, combinations thereof, or the like. Any suitable device having any suitable functionality may be used, and all such devices are fully intended to be within the scope of the embodiments. Once the first semiconductor device 201 is prepared, the first semiconductor device 201 can be bonded to the optical intermediary 100. In an embodiment, the first semiconductor device 201 can be bonded to the optical intermediary 100 using, for example, a system on integrated circuit (SoIC) bonding, such as hybrid bonding. In such an embodiment, the first semiconductor device 201 is bonded to the first bonding layer 111 of the optical intermediary 100 by bonding the first bonding pad 112 to the second bonding pad 222 and by bonding the first bonding layer 111 to the second bonding layer 220. In this embodiment, as an example, the top surfaces of the first semiconductor device 201 and the optical intermediary 100 can first be treated using, for example, a dry process, a wet process, a plasma process, exposure to an inert gas, exposure to H 2. Exposure to N 2. Exposure to O 2. Or a combination of the above. However, any suitable activation process may be used. After the activation process, the first semiconductor device 201 and the optical intermediary 100 can be cleaned using, for example, a chemical rinse, and then the first semiconductor device 201 is aligned and placed in physical contact with the optical intermediary 100. The first semiconductor device 201 and the optical intermediary 100 are then subjected to a heat treatment and contact pressure to hybrid bond the first semiconductor device 201 and the optical intermediary 100. For example, a pressure of approximately 200 kPa or less and a temperature ranging from approximately 25° C. to approximately 250° C. can be applied to the first semiconductor device 201 and the optical intermediary 100 to weld the first semiconductor device 201 and the optical intermediary 100. The first semiconductor device 201 and the optical intermediary 100 can then be subjected to a temperature equal to or higher than the eutectic point of the material of the first bonding layer 111, for example, ranging from approximately 150° C. to approximately 650° C., to weld the metal bonding pads. In this manner, the fusion bonding of the first semiconductor device 201 and the optical intermediary 100 forms a hybrid bonded device. In some embodiments, the bonded dies are baked, annealed, pressed, or otherwise processed to strengthen or complete the bond. Furthermore, while a hybrid bonding process is described above, this is for illustrative purposes only and is not intended to be limiting. In yet other embodiments, the optical interposer 100 may be bonded to the first semiconductor device 201 via direct surface bonding, metal-to-metal bonding, or another bonding process. Direct surface bonding processes produce an oxide-to-oxide bond or substrate-to-substrate bond by performing a cleaning and / or surface activation process followed by application of pressure, heat, and / or other bonding process steps to the bonding surfaces. In other embodiments, the first semiconductor device 201 and the optical interposer 100 are bonded via a metal-to-metal bond achieved by fusion welding conductive elements. Any suitable bonding process may be used, and all such methods are fully intended to be within the scope of the embodiments. Furthermore, in some embodiments, the electrical bond existing between the first semiconductor device 201 and the optical intermediary 100 (e.g., the electrical connection between the first bond pad 112 and the second bond pad 222) is the path that each signal (whether optical or electronic) follows to communicate between the first semiconductor device 201 and the optical intermediary 100. Thus, in this particular embodiment, electronic signals, rather than optical signals, are communicated between the first semiconductor device 201 and the optical intermediary 100. However, in other embodiments, optical signals may also be communicated between the first semiconductor device 201 and the optical intermediary 100. Any combination of optical and electrical connections may be utilized, and all such combinations are fully intended to be within the scope of the embodiments. The second semiconductor device 203 can be similar to the first semiconductor device 201. For example, in one embodiment, the second semiconductor device 203 can be a high-bandwidth memory stack having a stack of multiple memory dies interconnected by through-silicon vias extending through the semiconductor substrate. However, in other embodiments, the second semiconductor device 203 can be different from the first semiconductor device 201, such as having a different structure (e.g., a single substrate) or having different functionality. All suitable combinations of the first semiconductor device 201 and the second semiconductor device 203 can be used, and all such combinations are fully intended to be within the scope of the embodiments. Furthermore, the second semiconductor device 203 can be bonded to the optical intermediary 100 in a manner similar to that of the first semiconductor device 201. For example, the second semiconductor device 203 can be bonded to the optical intermediary 100 using, for example, a hybrid bonding process. However, any suitable bonding process that is the same as or different from the bonding process used to bond the first semiconductor device 201 to the optical intermediary 100 can be used, and all such bonding processes are fully intended to be included within the scope of the described embodiments. The third semiconductor device 205 can be, for example, an input / output (I / O) device designed to interwork with the first semiconductor device 201 and the second semiconductor device 203. For example, in some embodiments, the third semiconductor device 205 can be used to control the flow of signals into and out of the first semiconductor device 201 and the second semiconductor device 203, and also coordinate with signals entering and leaving the optical medium 100 via, for example, an optical fiber 211 (discussed further below). However, the third semiconductor device 205 can be any suitable semiconductor device, such as a CPU, a GPU, a memory, or the like. The third semiconductor device 205 can be bonded to the optical intermediary 100 in a manner similar to the first semiconductor device 201. For example, the third semiconductor device 205 can be bonded to the optical intermediary 100 using, for example, a hybrid bonding process. However, any suitable bonding process, the same as or different from the bonding process used to bond the first semiconductor device 201 to the optical intermediary 100, can be used, and all such bonding processes are fully intended to be included within the scope of the described embodiments. Once the first semiconductor device 201, the second semiconductor device 203, and the third semiconductor device 205 have been bonded to the optical interconnect, an encapsulant 209 is formed over and around each device. In one embodiment, the encapsulant 209 may be a molding compound, an epoxy resin, or the like. The encapsulant 209 may be applied by compression molding, transfer molding, or similar methods. The encapsulant 209 is further formed in the gap regions between the first semiconductor device 201, the second semiconductor device 203, and the third semiconductor device 205. The encapsulant 209 may be applied in a liquid or semi-liquid form and then cured. Once encapsulant 209 is placed, a planarization process is performed on encapsulant 209. Once planarization is performed, the top surfaces of encapsulant 209, first semiconductor device 201, second semiconductor device 203, and third semiconductor device 205 are substantially coplanar (within process variation) after the planarization process. The planarization process can be, for example, chemical mechanical polishing (CMP), a grinding process, or the like. In some embodiments, planarization can be omitted. Fiber 211 serves as the optical input / output of optical medium 100. In one embodiment, fiber 211 is positioned to optically couple fiber 211 to an optical input, such as an edge coupler (not separately shown in FIG. 2A ), located within second active layer 109. By positioning fiber 211 adjacent to the edge coupler within second active layer 109, optical signals exiting fiber 211 are directed through the second active layer 109 of the optical element. Similarly, fiber 211 is positioned so that optical signals exiting the second active layer 109 of the optical element are directed into fiber 211 for transmission. However, any suitable location may be utilized. Optical fiber 211 may be fixed in position using, for example, an optical glue (not shown separately). In some embodiments, the optical glue comprises a polymer material such as epoxy-acrylate oligomers and may have a refractive index ranging from about 1 to about 3. However, any suitable material may be used. FIG2B illustrates a top view of the structure of FIG2A , and FIG2A illustrates a cross-sectional view of the structure of FIG2B along line AA'. As shown in the top view, the second active layer 109 is arranged to route optical signals from beneath the third semiconductor device 205 to beneath the first semiconductor device 201 and beneath the second semiconductor device 203. However, while the layout of the second active layer 109 illustrated in FIG2B is one possible layout, any suitable layout and routing of components within the second active layer 109 may be used. Returning now to FIG. 2A , arrows are depicted representing various signals (both optical and electrical) being received, transmitted, and routed throughout the optical medium 100, the first semiconductor device 201, the second semiconductor device 203, and the third semiconductor device 205. These arrows represent the general directions in which signals are routed within and between the optical medium 100, the first semiconductor device 201, the second semiconductor device 203, and the third semiconductor device 205, and do not necessarily represent the exact directions of the paths that the signals take, such as through the various waveguides and other components. First, referring to optical fiber 211, in operation, optical fiber 211 inputs a first optical signal 213 into optical medium 100 (e.g., via an edge coupler located within first active layer 105 or second active layer 109). Optical medium 100 receives first optical signal 213, converts first optical signal 213 into a first electronic signal 215, and then transmits first electronic signal 215 to third semiconductor device 205 (e.g., an I / O device). Once the third semiconductor device 205 receives the first electronic signal 215, the third semiconductor device 205 then processes the first electronic signal 215 and distributes the first electronic signal 215 back to the optical medium 100 for routing to the second semiconductor device 203. For example, the third semiconductor device 205 transmits the first electronic signal 215 (or a signal derived from the first electronic signal 215) back to the optical medium 100, where the first electronic signal 215 is converted back into a second optical signal 217, and the second optical signal 217 is routed to an area within the optical medium 100 associated with the second semiconductor device 203. Once routed, the second optical signal 217 is reconverted into a second electronic signal 219, and the second electronic signal 219 is transmitted to the second semiconductor device 203 through, for example, the second semiconductor device 203 and a first input / output region 221 within the optical medium 100. The first input / output region 221 can then distribute the second electronic signal 219 within the second semiconductor device 203 (e.g., within the HBM memory module) or decide to transmit the second electronic signal 219 to the first semiconductor device 201. In this manner, the third semiconductor device 205 is operatively connected to the second semiconductor device 203 via at least one optical element in the first active layer 105 and / or the second active layer 109. In embodiments where the second semiconductor device 203 decides to transmit the second electronic signal 219 to the first semiconductor device 201, the second semiconductor device 203 may have a second input / output region 223 that transmits the second electronic signal 219 (or, if desired, a signal derived from the second electronic signal 219) back to the optical medium 100. Once within the optical medium 100, the second electronic signal 219 may be converted into a third optical signal 225. The third optical signal 225 is then routed through the optical medium 100 to an area associated with the first semiconductor device 201. Once within the area associated with the first semiconductor device 201, the third optical signal 225 is then converted into a third electronic signal 227 (the conversion occurs within the optical medium 100), and the third electronic signal 227 is then transmitted to the first semiconductor device 201 through, for example, a third input / output region 229. The third input / output region 229 can then distribute the third electronic signal 227 or transmit the third electronic signal back to another device in the optical medium 100 via, for example, the fourth input / output region 231. In this way, the third semiconductor device 205 is operatively connected to the first semiconductor device 201 via at least one optical element in the first active layer 105 and / or the second active layer 109. In this manner, the optical intermediary 100 is used to receive a first optical signal 213 from an optical fiber 211 and transmit the received first optical signal 213 to the first semiconductor device 201 and the second semiconductor device 203 via the third semiconductor device 205 (e.g., an I / O device). At each stage, the optical intermediary 100 can receive various signals, whether electronic or optical, convert the signals into optical signals if necessary, route the optical signals as needed, convert the optical signals into electronic signals, and then transmit the electronic signals to the required components. Furthermore, as shown in the top view of FIG. 2B , additional semiconductor devices may be incorporated. As shown in FIG. 2B , fourth semiconductor device 233 , fifth semiconductor device 235 , sixth semiconductor device 237 , and seventh semiconductor device 239 are also bonded or otherwise connected to optical medium 100 to add additional capacity or functionality to the overall device. For example, in an embodiment where first semiconductor device 201 and second semiconductor device 203 are memory devices, fourth semiconductor device 233 , fifth semiconductor device 235 , sixth semiconductor device 237 , and seventh semiconductor device 239 may be additional memory devices. However, the additional semiconductor devices may have any suitable functionality. By utilizing the optical intermediary 100 to receive various optical and electronic signals, convert the signals as needed, and route the signals to attached devices, functional devices utilizing high-speed, low-heat optical components can be fabricated. Furthermore, by attaching additional devices to the optical intermediary 100, the device can be expanded as needed. For example, in an embodiment where the first semiconductor device 201 and the second semiconductor device 203 are high-bandwidth memory devices, the fourth semiconductor device 233, the fifth semiconductor device 235, the sixth semiconductor device 237, and the seventh semiconductor device 239 can be added as additional memory devices to expand the overall device and add additional memory capacity. Similarly, in an embodiment where the first semiconductor device 201 and the second semiconductor device 203 are processors (e.g., xPUs), the fourth semiconductor device 233, the fifth semiconductor device 235, the sixth semiconductor device 237, and the seventh semiconductor device 239 can be added as additional processors to expand the overall device and add additional processing power. FIG3 illustrates another embodiment of the structure depicted in FIG2A , but differs in that a first grating coupler 301 and a second grating coupler 303 are used to receive signals from an optical fiber 211 or multiple optical fibers 211. In this embodiment, the first grating coupler 301 can be used to receive and redirect out-of-plane signals from the optical fiber 211 into an adjacent in-plane waveguide for transmission into the first active layer 105 of the optical component. In one embodiment, the first grating coupler 301 can be formed using optical lithography masking and etching processes before or after patterning the remaining portion of the first active layer 105 of the optical component. However, any suitable structure and formation method may be used. The second grating coupler 303 can be used to receive signals from the optical fiber 211 for transmission to the second active layer 109 of the optical element. In one embodiment, the second grating coupler 303 can be similar to the first grating coupler 301, for example by forming a grating structure that guides incoming out-of-plane signals into an adjacent waveguide. The second grating coupler 303 can be formed using optical lithography masking and etching processes before or after patterning the second active layer 109 of the optical element. However, any suitable structure and any suitable manufacturing method can be utilized. In this embodiment, the optical fiber 211 is not coupled in-plane with the waveguide formed within the first active layer 105 and / or the second active layer 109, but is coupled out-of-plane with the waveguide, such as by coupling above the third semiconductor device 205. From this location, the optical signal from the optical fiber 211 can be guided through the third semiconductor device 205 and toward the first grating coupler 301 and / or the second grating coupler 303. Furthermore, while only a single optical fiber 211 is depicted as being present within the illustrated embodiment, this is for illustrative purposes only and is not intended to be limiting. Rather, any suitable number of optical fibers 211 may be used, such as a separate optical fiber for each of the first grating coupler 301 and the second grating coupler 303, and all such numbers of optical fibers 211 are fully intended to be within the scope of the embodiments. FIG4 illustrates another embodiment of the structure depicted in FIG2A above, but with the addition of a laser die 401 to provide light and power to the optical medium 100. In this embodiment, instead of or in addition to a laser generator fabricated as part of the optical medium 100 (e.g., a laser generator formed on the medium as part of the first active layer 105 or the second active layer 109), a laser die 401 is fabricated and bonded to the optical medium 100 to provide light and power to the optical medium 100. In some embodiments, the laser die 401 can be a bare laser die (e.g., a distributed feedback laser), a laser diode chip, a combination thereof, or the like, which generates one or more lasers 403 (e.g., lasers having different wavelengths) and then transmits one or more different lasers 403 to the light-emitting edge of the laser die 401, causing it to exit the laser die 401. One or more different laser beams 403 emitted from the laser die 401 are directed toward the optical medium 100 and received by the optical medium 100 using, for example, one or more grating couplers (not separately shown in FIG. 4 ) within the third active layer 405 of the optical medium 100. In some embodiments, the third active layer 405 of the optical medium 100 can be similar to the first active layer 105 and the second active layer 109 of the optical element and can include couplers (e.g., optical couplers), waveguides, optical switches, amplifiers, multiplexers, demultiplexers, optical-to-electrical converters, electro-to-optical converters, lasers, combinations thereof, or the like. The third active layer 405 can be fabricated using methods and processes similar to those described above with respect to the first active layer 105 and the second active layer 109, such as by depositing a silicon nitride layer, patterning the silicon nitride layer into couplers and waveguides, and then performing any further additional processing to form the remainder of the desired device within the third active layer 405 of the optical element. However, any suitable devices and methods may be used to manufacture the third active layer 405 . FIG5 illustrates another embodiment in which not only are the functional devices (e.g., first semiconductor device 201 and second semiconductor device 203) expanded to provide additional functionality, but the I / O devices (e.g., third semiconductor device 205) are also expanded. Thus, in addition to third semiconductor device 205 (e.g., the first input / output device discussed above with reference to FIG2A-2B ), this embodiment additionally includes an eighth semiconductor device 501, a ninth semiconductor device 503, and a tenth semiconductor device 505. Each of the eighth semiconductor device 501, the ninth semiconductor device 503, and the tenth semiconductor device 505 is also an I / O device, which is a functional device that facilitates the control of signals entering and exiting various functions (e.g., first semiconductor device 201, second semiconductor device 203, fourth semiconductor device 233, fifth semiconductor device 235, sixth semiconductor device 237, and seventh semiconductor device 239, etc.). In this embodiment, the optical intermediary 100 initially receives a first optical signal 213 from an optical fiber 211 and converts the first optical signal 213 into a first electronic signal 215 before transmitting the first electronic signal 215 to a third semiconductor device 205 (e.g., a first input / output device). The third semiconductor device 205 then transmits the first electronic signal 215 to a functional device (e.g., the first semiconductor device 201) and / or also to other I / O devices (e.g., the eighth semiconductor device 501, the ninth semiconductor device 503, and the tenth semiconductor device 505) by transmitting the first electronic signal 215 to the optical intermediary 100, which converts the first electronic signal 215 into a second optical signal 217 before routing it to various devices, and then converts the second optical signal 217 into a second electronic signal 219 before transmitting it to the device above it. By expanding the number of I / O devices, all I / O devices (e.g., third semiconductor device 205, eighth semiconductor device 501, ninth semiconductor device 503, and tenth semiconductor device 505) can work in conjunction with each other to control the transmission and reception of signals to and from functional devices (e.g., first semiconductor device 201, second semiconductor device 203, fourth semiconductor device 233, fifth semiconductor device 235, sixth semiconductor device 237, and seventh semiconductor device 239). By expanding the number of I / O devices, in addition to the functional devices, overall control of the devices can be distributed as needed to provide the most efficient flow to and from the functional devices, regardless of the number of functional devices used. 6A and 6B illustrate another embodiment that utilizes a third semiconductor device 205 as an external I / O die and further utilizes a first internal I / O die 601, a second internal I / O die 603, and a third internal I / O die 605 to connect the third semiconductor device 305 to functional dies (e.g., the first semiconductor device 201 and the second semiconductor device 203). FIG6A illustrates a cross-sectional view taken along line AA' of FIG6B. In this embodiment, the optical medium 100 initially receives a first optical signal 213 from an optical fiber 211 and converts the first optical signal 213 into a first electronic signal 215 before transmitting the first optical signal 213 to the third semiconductor device 205 (e.g., the first I / O device). The third semiconductor device 205 then converts the first electronic signal 215 into a second optical signal 217 before routing it to various devices by transmitting it to the optical medium 100 and then to the first internal I / O die 601, the second internal I / O die 603, and the third internal I / O die 605. Once the second optical signal 217 has been routed to the internal I / O devices (e.g., the first internal I / O die 601, the second internal I / O die 603, and the third internal I / O die 605), the optical intermediary 100 converts the second optical signal 217 into a second electronic signal 219 before routing the second electronic signal 219 to the internal I / O devices. The internal I / O devices then control the routing of the second electronic signal 219 to various functional devices (e.g., the first semiconductor device 201, the second semiconductor device 203, etc.). In a particular embodiment, each internal I / O device controls signals to and / or from two functional devices, but any suitable number of devices may be used. However, in this embodiment, when the internal I / O device transmits the second electronic signal 219 to each functional device, the internal I / O device transmits the second electronic signal 219 through the conductive portion of the optical intermediary 100 without the optical intermediary 100 converting the second electronic signal into a second optical signal. Therefore, the internal I / O device is electrically connected to the functional device without converting the signal into an optical signal. By utilizing optical intermediary 100, a disaggregated high-performance computing device can be created using an efficient combination of optical and electronic signals to route these signals between various devices. For example, an optical signal can be received, converted into an electronic signal, and then the desired signal can be routed to a functional device using a combination of optical and electronic signals. With such an efficient system, additional devices can be added and the device can be expanded to provide the required capacity. According to one embodiment, a method for fabricating a semiconductor device includes receiving a photonic medium, the photonic medium including at least one optical input and a plurality of electronic external connections; bonding a first semiconductor device to a first set of electronic external connections; bonding a second semiconductor device to a second set of electronic external connections; and bonding a first input / output semiconductor device to a third set of electronic external connections, wherein the first input / output semiconductor device is operably connected to both the first and second semiconductor devices via at least one first optical element. In one embodiment, the first semiconductor device is a high-bandwidth memory device. In one embodiment, the first semiconductor device is a processing unit. In one embodiment, the method further includes bonding the second input / output semiconductor device to a fourth set of electronic external connections; bonding the third semiconductor device to a fifth set of electronic external connections; and bonding the fourth semiconductor device to a sixth set of electronic external connections, wherein the second input / output semiconductor device is operably connected to both the third and fourth semiconductor devices via at least one second optical element. In one embodiment, the method further includes bonding a laser die to the fourth set of electronic external connections. In one embodiment, the method further includes bonding the second input / output semiconductor device to a fourth set of external electronic connections; bonding the third semiconductor device to a fifth set of external electronic connections; and bonding the fourth semiconductor device to a sixth set of external electronic connections, wherein the second input / output semiconductor device is operatively connected to both the third and fourth semiconductor devices without optical elements. In one embodiment, after bonding the second input / output semiconductor device, the second input / output semiconductor device is physically located between the third and fourth semiconductor devices. According to another embodiment, a method for transmitting information includes receiving a first optical signal in an optical medium; converting the first optical signal into a first electronic signal in the optical medium; transmitting the first electronic signal to a first input / output die; transmitting a second electronic signal from the first input / output die to the optical medium; converting the second electronic signal into a second optical signal; and routing the second optical signal to a region beneath a first semiconductor device. In one embodiment, the method further includes converting the second optical signal into a third electronic signal; and transmitting the third electronic signal to the first semiconductor device. In one embodiment, the first semiconductor device is a high-bandwidth memory device. In one embodiment, the first semiconductor device is a processing unit. In one embodiment, the method further includes receiving laser light from a laser die bonded to the optical medium. In one embodiment, the method further includes converting the second optical signal into a third electronic signal; and transmitting the third electronic signal to a second input / output die. In one embodiment, the method further includes transmitting a fourth electronic signal from the second input / output die to the first semiconductor device without converting the fourth electronic signal into an optical signal. According to yet another embodiment, a semiconductor device includes an optical intermediary; a first electronic integrated circuit die electrically connected to the optical intermediary; a second electronic integrated circuit die electrically connected to the optical intermediary; and a first input / output device electrically connected to the optical intermediary. In one embodiment, the semiconductor device further includes a laser die electrically and optically connected to the optical intermediary. In one embodiment, the semiconductor device further includes a second input / output device electrically connected to the optical intermediary and optically connected to the first input / output device at least partially through the optical intermediary. In one embodiment, the second input / output device is fully electrically connected to a third electronic integrated circuit die, wherein the third electronic integrated circuit die is electrically connected to the optical intermediary. In one embodiment, the second input / output device is physically located between the third electronic integrated circuit die and a fourth electronic integrated circuit die. In one embodiment, the semiconductor device further includes an optical fiber attached above the first input / output device. The above summarizes the features of several embodiments so that those with ordinary knowledge in the technical field to which the present invention belongs can better understand the viewpoints of the embodiments of the present invention. Those with ordinary knowledge in the technical field to which the present invention belongs should understand that other processes and structures can be easily designed or modified based on the embodiments of the present invention to achieve the same purposes and / or advantages as the embodiments introduced herein. Those with ordinary knowledge in the technical field to which the present invention belongs should also understand that such equivalent structures do not deviate from the spirit and scope of the present invention, and various changes, substitutions, and replacements can be made without violating the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be defined as the scope of the attached patent application. 50: Integrated circuit die 100: Optical intermediary 101: First substrate 103: Insulator layer 105: First active layer 107: Metallization layer 109: Second active layer 111: First bonding layer 112: First bonding pad 113: Through-substrate via 115: Contact pad 117: First external connection 201: First semiconductor device 203: Second semiconductor device 205: Third semiconductor device 209: Encapsulant 211: Optical fiber 212: Semiconductor substrate 213: First optical signal 214: Second through-substrate via 215: First electronic signal 216: Active device layer 217: Second optical signal 218: Interconnect structure 219: Second electronic signal 220: Second bonding layer 221 : First input / output region 222 : Second bonding pad 223 : Second input / output region 225 : Third optical signal 227 : Third electronic signal 229 : Third input / output region 231 : Fourth input / output region 233 : Fourth semiconductor device 235 : Fifth semiconductor device 237 : Sixth semiconductor device 239 : Seventh semiconductor device 301 : First grating coupler 303 : Second grating coupler 401 : Laser die 403 : Laser 405 : Third active layer 501 : Eighth semiconductor device 503 : Ninth semiconductor device 505 : Tenth semiconductor device 601 : First input / output die 603 : Second input / output die 605 : Third input / output die AA': Section line The embodiments of the present invention are best understood by the following detailed description in conjunction with the accompanying drawings. It should be noted that, in accordance with standard industry practice, various features are not drawn to scale and are for illustrative purposes only. In fact, the sizes of various components may be arbitrarily enlarged or reduced to clearly illustrate the features of the embodiments of the present invention. FIG. 1 illustrates an optical medium according to some embodiments. FIG. 2A to FIG. 2B illustrate placement of a semiconductor device on an optical medium according to some embodiments. FIG. 3 illustrates the use of a grating coupler according to some embodiments. FIG. 4 illustrates placement of a laser die according to some embodiments. FIG. 5 illustrates the use of multiple input / output devices according to some embodiments. FIG. 6A to FIG. 6B illustrate internal input / output devices according to some embodiments. 100: Optical intermediary 101: first substrate 103: Insulator layer 105: First active layer 107: Metallization layer 109: Second active layer 111: first bonding layer 112: first bonding pad 113: Through substrate guide hole 115: Contact pad 117: First external connection 201: First semiconductor device 203: Second semiconductor device 205: Third semiconductor device 209: Encapsulant 211: Fiber Optic 212:Semiconductor substrate 213: First optical signal 214: Second through-substrate via 215: First Electronic Signal 216: Active Device Layer 217: Second optical signal 218: Interconnection structure 219: Second electronic signal 220: Second bonding layer 221: First input / output area 222: second bonding pad 223: Second input / output area 225: Third optical signal 227: Third Electronic Signal 229: Third input / output area 231: Fourth input / output area

Claims

1. A method for manufacturing a semiconductor device, comprising: The device receives a photonic interposer comprising: at least one optical input; and a plurality of electronic external connections; bonding a first semiconductor device to a first set of electronic external connections; bonding a second semiconductor device to a second set of electronic external connections; bonding a third semiconductor device to a third set of electronic external connections; bonding a first input / output (I / O) semiconductor device to a fourth set of electronic external connections, wherein the first input / output semiconductor device is operatively connected to both the first semiconductor device and the second semiconductor device via at least one first optical element; and bonding a second input / output semiconductor device to a fifth set of electronic external connections, wherein the second input / output semiconductor device is electrically connected to the third semiconductor device.

2. A method for manufacturing a semiconductor device as claimed in claim 1, wherein the first semiconductor device is a high bandwidth memory device.

3. A method for manufacturing a semiconductor device as claimed in claim 1, wherein the first semiconductor device is a processing unit.

4. The method of manufacturing a semiconductor device as described in any one of claims 1 to 3 further includes: A fourth semiconductor device is coupled to a sixth set of external electronic connections, wherein the second input / output semiconductor device is operatively connected to the fourth semiconductor device through at least one second optical element.

5. A method of manufacturing a semiconductor device according to any one of claims 1 to 3, wherein a fourth semiconductor device is bonded to a sixth set of electronic external connections, wherein the second input / output semiconductor device is operatively connected to the fourth semiconductor device without passing through an optical element, wherein after the step of bonding the second input / output semiconductor device, the second input / output semiconductor device is physically located between the third semiconductor device and the fourth semiconductor device.

6. A method for transmitting a message, comprising: Receive a first optical signal in an optical medium; The first optical signal is converted into a first electronic signal in the optical medium; The first electronic signal is transmitted to a first input / output die; a second electronic signal is transmitted from the first input / output die to the optical medium; the second electronic signal is converted into a second optical signal; the second optical signal is routed to a region below a first semiconductor device, the first semiconductor device being adjacent to a second semiconductor device and a third semiconductor device, the second semiconductor device and the third semiconductor device being electrically connected to the optical medium; a third optical signal is routed from the first input / output die to a second input / output die through the optical medium; and a third electronic signal is routed from the second input / output die to the third semiconductor device.

7. The method of transmitting the message as described in request item 6 further includes: The second optical signal is converted into a fourth electronic signal; And transmit the fourth electronic signal to the first semiconductor device.

8. The method of transmitting the message as described in request item 6 further includes: The second optical signal is converted into a fourth electronic signal; the fourth electronic signal is transmitted to a third input / output chip; And transmit a fifth electronic signal from the third input / output die to the first semiconductor device without converting the fifth electronic signal into an optical signal.

9. A semiconductor device, comprising: An optical medium; A first integrated circuit die electrically connected to the optical medium; a second integrated circuit die electrically connected to the optical medium; a third integrated circuit die electrically connected to the optical medium; a first input / output device electrically connected to the optical medium, wherein the first input / output device is operatively connected to both the first integrated circuit die and the second integrated circuit die through at least one first optical element; and a second input / output device electrically connected to the optical medium, wherein the second input / output device is electrically connected to the third integrated circuit die.

10. The semiconductor device of claim 9, wherein the second input / output device is optically connected to the first input / output device at least partially through the optical medium, wherein the third integrated circuit die is electrically connected to the optical medium, and wherein the second input / output device is physically located between the third integrated circuit die and a fourth integrated circuit die.

Images