Surge withstanding film resistor structure and manufacturing method thereof

Abstract

This invention provides a dielectric thin-film resistor structure and its fabrication method. The dielectric thin-film resistor structure comprises a substrate, an alloy interface layer, a resistive layer, a conductor layer, a protective layer, and an electroplated layer. The fabrication method utilizes sputtering combined with a specially designed photomask to form a strip-shaped structure of metal material on the substrate. This method improves the resistor's dielectric strength, heat dissipation capability, and adhesion.

Description

Technical Field

[0001] This invention relates to a method for preparing an electrically resistant thin-film resistor structure, and more particularly to a method for manufacturing a thin-film resistor element with electrical resistance and heat dissipation properties. Prior Technology

[0002] A surge refers to a sudden high voltage or large current phenomenon in a circuit. When a resistor encounters a surge, a large current will flow through it, resulting in an instantaneous increase in power, which will cause the resistor to heat up, affect its stability, or even damage the resistor chip.

[0003] The effects of heat on resistors include performance degradation, physical damage, and reduced reliability. Sustained or frequent high temperatures can cause the resistor material to degrade, potentially leading to resistance drift and affecting circuit stability and accuracy. In extreme cases, excessively high temperatures can cause resistors to burn out or crack, or even cause circuit failure. Furthermore, frequent heating and cooling cycles accelerate the aging process of resistors, thereby reducing their long-term reliability. Summary of the Invention

[0004] Electrical withstand capability (also known as surge resistance) refers to the maximum voltage that a resistor can withstand without breakdown or damage. In order to improve the surge withstand capability of thin film resistors, this invention develops novel technical solutions for protective coatings, film materials, structures, circuit protection, and manufacturing methods to overcome the shortcomings and disadvantages of existing technologies.

[0005] This invention provides a method for preparing an electrically resistant thin-film resistor structure, comprising:

[0006] Set up a substrate;

[0007] An alloy interface layer and a resistive layer are sequentially formed on a first surface of the substrate. The alloy interface layer has a plurality of first continuous strip structures, and the resistive layer has a plurality of second continuous strip structures. The plurality of first continuous strip structures are aligned with the plurality of second continuous strip structures.

[0008] An upper conductor layer is formed at both ends of the resistive layer and the alloy interface layer, and a lower conductor layer is formed at both ends of a second surface of the substrate, and then sintered.

[0009] A protective layer is formed on the resistive layer and the upper conductor layer;

[0010] Folding is performed along a first direction of the substrate;

[0011] A conductor is formed at each of the two ends of the resistive layer, forming a conductor composite structure;

[0012] Folding is performed along a second direction of the substrate; and

[0013] An electroplated layer is formed at both ends of the protective layer and the conductor composite structure.

[0014] Preferably, the alloy interface layer and the resistive layer are sputtered using the same photomask.

[0015] Preferably, the method for fabricating the electrically resistant thin-film resistor structure further includes forming the electrically resistant thin-film resistor structure on both the first surface and a second surface of the substrate.

[0016] Preferably, the upper conductor layer and the lower conductor layer are thick-film conductors, and the thickness of the upper conductor layer and the lower conductor layer is 3~60µm.

[0017] Preferably, the resistive layer is a thin film alloy, and the thickness of the resistive layer is 20~10 5 nm.

[0018] Furthermore, the present invention provides an electrically resistant thin-film resistor structure comprising:

[0019] One substrate;

[0020] An alloy interface layer is disposed on a first surface of the substrate; wherein the alloy interface layer has a plurality of first continuous strip structures;

[0021] A resistive layer partially covers the alloy interface layer; wherein the resistive layer has a plurality of second continuous strip structures, and the plurality of first continuous strip structures are aligned with the plurality of second continuous strip structures;

[0022] A conductor composite structure is disposed at both ends of the substrate, and is connected to the resistive layer and the alloy interface layer to form two electrodes;

[0023] A protective layer is disposed on the resistive layer, exposing the two electrodes; and

[0024] An electroplated layer is disposed on the side of the substrate, covering both sides of the substrate.

[0025] Preferably, the interval between the plurality of first continuous strip structures is greater than the thickness of the plurality of strip structures.

[0026] Preferably, the conductor composite structure comprises: an upper conductor layer, a lower conductor layer, and a side conductor layer, wherein the upper conductor layer, the lower conductor layer, the resistive layer, and the alloy interface layer abut against the same surface of the side conductor layer.

[0027] Preferably, the upper conductor layer and the lower conductor layer are thick-film conductors, and the thickness of the upper conductor layer and the lower conductor layer is 3~60µm.

[0028] Preferably, the resistive layer is a thin film alloy, and the thickness of the resistive layer is 20~10 5 nm. Simple Explanation of the Diagram

[0029] Figures 1 to 3 are cross-sectional schematic diagrams of the preparation steps of the first embodiment of the present invention. Figure 4 is a cross-sectional schematic diagram of the first embodiment of the present invention. Figure 5 is a cross-sectional schematic diagram of the second embodiment of the present invention. Figure 6 is a cross-sectional schematic diagram of the third embodiment of the present invention. Figures 7 to 13 are top views of each step of the manufacturing method of the first embodiment of the present invention. Figure 14 is an enlarged cross-sectional view of the alloy interface layer of the present invention. Figure 15 is a flowchart of the manufacturing method of the first embodiment of the present invention. Implementation

[0030] The following embodiments, in conjunction with the accompanying drawings, are used to illustrate the spirit of the present invention, enabling those skilled in the art to clearly understand the technology of the present invention. However, they are not intended to limit the scope of the present invention, and the scope of the patent right of the present invention should be defined by the claims. It is particularly emphasized that the drawings are for illustrative purposes only and do not represent the actual size or quantity of the components. Some details may not be fully drawn in order to achieve the simplicity of the drawings.

[0031] For the sake of brevity, the resistor shown in the figure is used as an example, but it should be understood that it is used as an example and not to limit the invention. The high-temperature resistant resistor element of the present invention can be implemented in any shape.

[0032] Please refer to Figures 1 to 4 and Figures 7 to 15 together. Figures 1 to 3 are cross-sectional schematic diagrams of the preparation steps of the first embodiment of the present invention. Figure 4 is a cross-sectional schematic diagram of the first embodiment of the present invention. Figures 7 to 13 are top view schematic diagrams of the preparation steps of the first embodiment of the present invention. Figure 14 is a cross-sectional schematic diagram of the strip structure of the present invention. Figure 15 is a flowchart of the manufacturing method of the first embodiment of the present invention.

[0033] The electrically resistant thin-film resistor structure 1 of the present invention includes a substrate 10, an alloy interface layer 20, a resistor layer 30, a conductor composite structure 40, an upper conductor layer 41, a lower conductor layer 42, a side conductor layer 43, and a protective layer 50.

[0034] The method for manufacturing the electrically resistant thin-film resistor structure 1 of the present invention is as follows:

[0035] Step S01: Set up substrate 10. The material of substrate 10 can be aluminum oxide or aluminum nitride, etc.

[0036] In step S02, as shown in Figure 7, an alloy interface layer 20 is sputtered onto the substrate 10. As shown in Figures 1 and 7, the alloy interface layer 20 is formed on the substrate 10 by sputtering. The alloy interface layer 20 has a plurality of first continuous strip structures 21. The first continuous strip structures 21 are parallel to each other and span the short side of at least one dielectric thin film resistor 1. Figures 7 to 13 use four dielectric thin film resistors as examples, but the invention is not limited thereto. The spacing between each first continuous strip structure is greater than the thickness of the first continuous strip structure 21. The cross-section of the short side of the first continuous strip structure can be circular, semi-circular, quadrilateral, polygonal, etc., but is not limited thereto.

[0037] The alloy interface layer 20 can be made of titanium, copper, aluminum, nickel, gold, carbon, silicon, or their alloys, and the thickness of the alloy interface layer 20 can be 1 to 10⁴ nm. As shown in Figure 14, the alloy interface layer 20 can have a plurality of first continuous strip structures 21, increasing the contact surface area between the alloy interface layer 20 and the resistive layer 30, forming an interlaced interface.

[0038] In step S03, as shown in Figure 8, a resistor layer 30 is sputtered onto the alloy interface layer 20. The resistor layer 30 has a plurality of second continuous strip structures 31, which are parallel to each other and span the short side of at least one dielectric thin film resistor 1. The spacing between each second continuous strip structure 31 is greater than the thickness of the second continuous strip structure 31. The cross-section of the short side of the second continuous strip structure 31 can be circular, semi-circular, quadrilateral, polygonal, etc., but is not limited to these shapes.

[0039] The material of the resistive layer 30 can be titanium, copper, aluminum, nickel, gold, carbon, silicon and their alloys. The resistive layer 30 is a thin film alloy and the thickness of the resistive layer 30 is 20~10 5 nm.

[0040] In step S04, as shown in Figures 2 and 9, conductor layers 41 are printed on both ends of the resistor layer 30, and lower conductor layers 42 are printed on both ends of the second surface of the substrate 10, followed by sintering. The upper conductor layer 41 is positioned relative to or aligned with the lower conductor layer 42. The upper conductor layer 41 and the lower conductor layer 42 are connected in pairs along the first direction DR1 and are not connected along the second direction DR2, that is, the upper conductor layer 41 or the lower conductor layer 42 has a gap between the resistor cutting lines X-X'.

[0041] The upper conductor layer 41 and the lower conductor layer 42 are thick film conductors with a thickness of 3~60µm. The thickness ratio of the resistive layer to the upper and lower conductor layers is 2~10 5:3×10 3~6×10 4, which can increase heat dissipation capacity, electrical resistance and strengthen the bonding between different parts.

[0042] Step S05, please refer to Figure 10, according to the required resistance value, perform laser repair on the resistance layer to form a repair cutting line 70 to achieve the target resistance value.

[0043] In step S06, referring to Figures 3 and 11, a protective layer 50 is printed on the resistive layer 30 and the upper conductor layer 41, covering the entire resistive layer 30 and partially covering the upper conductor layer 41. This protective layer 50 effectively prevents moisture or sulfur gas from penetrating and provides a large area for heat dissipation, reducing thermal effects and maintaining good electrical performance. The material of the protective layer 50 can be phenolic, epoxy, or acrylic resin.

[0044] Step S07, please refer to Figure 12, fold the substrate 10 along the first direction DR1, the first direction DR1 is the short side direction of the substrate 10 (i.e. Y-Y' resistor cutting line direction), and the second direction DR2, which is orthogonal to the first direction DR1, is the long side direction of the substrate 10 (i.e. X-X' resistor cutting line direction). Fold the substrate 10 along the first direction DR1 to the length of a single resistor dimension.

[0045] In step S08, referring to Figures 3 and 11, side conductor layers 43 are side-deposited or sputtered at both ends of the alloy interface layer 20, resistive layer 30, upper conductor layer 41, and lower conductor layer 42, such that the upper conductor layer 41 and lower conductor layer 42 abut against the same surface of the side conductor layer 43, to form a C-shaped conductor composite structure 40. The conductor composite structure 40 is made of printed conductor ink, wherein the ink composition may be composed of nickel, copper, lanthanum, silver, palladium, or a combination thereof.

[0046] Step S09, please refer to Figures 4 and 12, the substrate 10 is folded along the second direction DR2 to further reduce the size and achieve the width of a single resistor.

[0047] In step S10, an electroplated layer 60 is formed at both ends of the protective layer 50 and the conductor composite structure 40. The electroplated layer 60 covers the conductor composite structure 40 and part of the resistive layer 30. The electroplated layer 60 is a composite structure with three layers from the inside out, and its material from the inside out is copper, nickel, and tin. The electroplated layer 60 provides a large area for heat dissipation, reduces the thermal effect, and maintains good electrical performance.

[0048] Please refer to steps S03 and S09, where the process can be simplified by fabricating the conductor composite structure 40 in stages. If the protective layer 50 is printed on the side conductor layer 43 after the resistor folding is printed, the protective layer 50 can be printed over a large area, shortening the process time and steps.

[0049] Please refer to Figure 14. The alloy interface layer 20 and the resistive layer 30 are formed on the substrate 10 using sputtering technology with the same metal photomask having multiple strip patterns, creating a design of multiple continuous strip structures. The alloy interface layer 20 has particles 21 with a size of 0.1-100 nanometers that enhance the bonding force of the resistive layer 30. Therefore, it is beneficial to improve the stability of the resistor when subjected to large voltages or currents instantaneously. Without affecting other performance characteristics, it enhances heat dissipation, electrical resistance, and strengthens the bonding between different parts.

[0050] Please refer to Figure 5, which shows the electrical-resistant thin-film resistor structure 2 of the second embodiment of the present invention. The difference from Figure 4 is that the upper conductor layer 41 is directly disposed on the first surface of the substrate 10, while the alloy interface layer 20 and the resistor layer 30 are disposed on the second surface of the substrate 10, the lower conductor layer 42 is disposed on the resistor layer 30, and the protective layer 50 is disposed on the first surface of the substrate 10 and the resistor layer 30.

[0051] Please refer to Figure 6, which shows the electrical-resistant thin-film resistor structure 3 of the third embodiment of the present invention. The difference from Figure 4 is that the first surface and the second surface of the substrate 10 are provided with an alloy interface layer 20 and a resistor layer 30, and the upper conductor layer 41 and the lower conductor layer 42 are respectively disposed on the resistor layer 30, and the protective layer 50 is disposed on the resistor layer 30, the upper conductor layer 41 and the lower conductor layer 42.

[0052] The upper and lower conductor layers of this invention are thick-film conductors, while the resistive layer is a thin-film alloy, providing a large-area heat dissipation function, reducing thermal effects, and maintaining good electrical performance. The alloy interface layer contains particles that strengthen the bonding force with the resistive layer, thus improving the stability of the resistor when subjected to large voltages or currents instantaneously. Without affecting other performance characteristics, it enhances heat dissipation, electrical withstand capability, and strengthens the bonding between different parts. Furthermore, the alloy interface layer and resistive layer of this invention form a first continuous strip structure and a second continuous strip structure, respectively, spanning multiple units of electrical withstand thin-film resistors, saving multiple processes and improving mass production quantity, product consistency, and yield.

[0053] 1~3: Electrically Resistant Thin Film Resistor Structure 10:Substrate 20: Alloy interface layer 21: First continuous strip structure 30: Resistive layer 31: Second continuous strip structure 40: Conductor composite structure 41: Upper conductor layer 42: Lower conductor layer 43: Side conductor layer 50: Protective layer 60: Electroplating layer 70: Repairing cutting line DR1: First direction DR2: Second Direction S01-S10: Steps X-X', Y-Y': Resistance cutting lines

Claims

1. A method for preparing an electrically resistant thin-film resistor structure, comprising: setting a substrate; sequentially forming an alloy interface layer and a resistor layer on a first surface of the substrate, the alloy interface layer having a plurality of first continuous strip structures, the resistor layer having a plurality of second continuous strip structures, the plurality of first continuous strip structures being aligned with the plurality of second continuous strip structures; forming an upper conductor layer at both ends of the resistor layer and the alloy interface layer, and forming a lower conductor layer at both ends of a second surface of the substrate, and sintering thereon; forming a protective layer on the resistor layer and the upper conductor layer; folding the substrate along a first direction; forming a conductor at each end of the resistor layer to form a conductor composite structure; folding the substrate along a second direction; and forming an electroplated layer at both ends of the protective layer and the conductor composite structure.

2. The method for preparing the electrically resistant thin-film resistor structure as described in claim 1, wherein the alloy interface layer and the resistor layer are sputtered using the same photomask.

3. The method for preparing the electrically resistant thin-film resistor structure as described in claim 1, further comprising forming the electrically resistant thin-film resistor structure on both the first surface and a second surface of the substrate.

4. The method for preparing the electrically resistant thin-film resistor structure as described in claim 1, wherein the upper conductor layer and the lower conductor layer are thick-film conductors, and the thickness of the upper conductor layer and the lower conductor layer is 3 to 60 µm.

5. A method for preparing an electrically resistant thin-film resistor structure as described in claim 1, wherein the resistor layer is a thin-film alloy and the thickness of the resistor layer is 20–105 nm.

6. A dielectric thin-film resistor structure, comprising: a substrate; an alloy interface layer disposed on a first surface of the substrate; wherein the alloy interface layer has a plurality of first continuous strip structures; a resistor layer partially covering the alloy interface layer; wherein the resistor layer has a plurality of second continuous strip structures, the plurality of first continuous strip structures being aligned with the plurality of second continuous strip structures; a conductor composite structure disposed at both ends of the substrate, connecting with the resistor layer and the alloy interface layer to form two electrodes, the conductor composite structure comprising: an upper conductor layer, a lower conductor layer, and a side conductor layer, wherein the upper conductor layer, the lower conductor layer, the resistor layer, and the alloy interface layer abut against the same surface of the side conductor layer; a protective layer disposed on the resistor layer and exposing the two electrodes; and an electroplated layer disposed on the side of the substrate, covering both sides of the substrate.

7. The electrically resistant thin-film resistor structure as claimed in claim 6, wherein a spacing between the plurality of first continuous strip structures is greater than the thickness of the plurality of strip structures.

8. The dielectric thin-film resistor structure as described in claim 6, wherein the upper conductor layer and the lower conductor layer are thick-film conductors, and the thickness of the upper conductor layer and the lower conductor layer is 3 to 60 µm.

9. The electrically resistant thin-film resistor structure as described in claim 6, wherein the resistor layer is a thin-film alloy and the thickness of the resistor layer is 20–105 nm.

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